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verilog
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Nov 10, 2020 - Verilog
Cocotb deposits values on signals. It does not behave like another driver. This should be made more explicit. And this is where the documentation for Force
, Release
, and Freeze
should go, not in the middle of the quickstart.
To accompany this an example of interacting with a tri-state bus would be very useful, since that is the most likely reason those behaviors would be used.
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Nov 3, 2020 - JavaScript
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Jul 16, 2020 - Verilog
Internal code coverage shows the following DPI functions in verilated_dpi aren't covered at all. We should improve the tests to check them and validate against another simulator.
void* svGetArrElemPtr(const svOpenArrayHandle h, int indx1, ...) {
void svPutBitArrElem1VecVal(const svOpenArrayHandle d, const svBitVecVal* s, int indx1) {
void svPutBitArrElem2VecVal(const svOpenArrayHandle d,
Proposed Behaviour
None of the core VPR algorithms should care if the relevant t_physical_tile
is an input / output / IO type.
Current Behaviour
Some behavior is still dependent on whether a tile is an input / output / IO type.
Possible Solution
The relevant code shouldn't need to care. Once all callsites of is_input_type/is_output_type/is_io_type are removed, the
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Feb 27, 2018 - Verilog
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Type of issue: other enhancement
Impact: no functional change
Development Phase: request
Other information
This is more a meta-issue mostly related to the beginners user experience. I think most of these issues are not done by more experienced devs.
If the current behavior is a bug, please provide the steps to reproduce the problem: