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darklife / darkriscv

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opensouce RISC-V cpu core implemented in Verilog from scratch in one night!

cpu fpga core processor riscv rtl verilog risc-v rv32i softcore processor-design rv32e

Updated Dec 8, 2021
Verilog

katef / eurorack-cpu

Sponsor

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A CPU implemented in a modular synthesizer

modular synthesizer cpu-emulator processor-design

Updated Dec 31, 2021

zslwyuan / Basic-SIMD-Processor-Verilog-Tutorial

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Implementation of a simple SIMD processor in Verilog, core of which is a 16-bit SIMD ALU. 2's compliment calculations are implemented in this ALU. The ALU operation will take two clocks. The first clock cycle will be used to load values into the registers. The second will be for performing the operations. 6-bit opcodes are used to select the functions. The instruction code, including the opcode, will be 18-bit.

cpu processor simd verilog alu adder instruction-set-architecture cadence-virtuoso multiplier verilog-project processor-design

Updated Oct 31, 2018
Verilog

alirezakay / RISC-CPU

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A multi-cycle RISC CPU (processor) like MIPS-CPU architecture in VHDL ( a hardware-side implementation )

processor-architecture cpu vhdl isa cpu-model instruction-set-architecture mips-processor vhdl-modules risc-processor vhdl-code cpu-architecture multi-cycle processor-design

Updated Jun 19, 2021
VHDL

AnkurRyder / 8085-Processor

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8-bit RISC Processor on Logisim

circuit-simulator logisim processor-design

Updated Oct 1, 2020

shehanmunasinghe / tinyGPU

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A Predicated-SIMD processor implementation in SystemVerilog

gpu simd systemverilog hdl computer-organization processor-design

Updated Jul 14, 2021
SystemVerilog

KevinWang96 / Chip-Multi-processor-System-based-on-Cardinal-Bidirectional-Ring-Network-on-chip

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EE577b-Course-Project

verilog-hdl multiprocessor processor-design networkonchip synopsys-dc cadence-ncverilog cadence-conformal

Updated May 6, 2020
Verilog

LeviBohnacker / EDRICO

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EDRICO (Educational DHBW RISC-V Core) is a small 32-bit RISC-V core implementing the Integer base architecture and Zicsr extension. It is developed as part of a students project at the DHBW Ravensburg by Noah Wölki and Levi Bohnacker

embedded risc-v 32-bit processor-design risc-vcore

Updated Jul 19, 2021
VHDL

lazyoracle / vhdl-processor

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An 8-bit processor in VHDL based on a simple instruction set

processor-architecture fpga processor vhdl verilog vivado hardware-designs hdl xilinx-fpga processor-simulator hardware-description-language digital-electronics altera-fpga processor-design

Updated Mar 7, 2019
VHDL

kara-abdelaziz / SEP-CPU

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SEP, for Simple Enough Processor, is an elaborated from scratch simulated (on Logisim) educational CPU

processor-architecture cpu processor computer-architecture digital-design computer-organization processor-design processor-simulation

Updated Aug 31, 2021
Assembly

Sooryakiran / Domain-Specific-Hardware-Accelerator-VLSI-CAD-Project

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Domain Specific Hardware Accelerators - VLSI CAD Project

processor-architecture ram hardware processor bus bluespec hardware-designs vlsi hardware-acceleration vlsi-physical-design bluespec-systemverilog processor-design vector-processor vlsi-design bluespec-systemverilog-language vlsi-cad

Updated Jan 11, 2021
Bluespec

0xD503 / ARM-Single-Cycle-Processor

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ARM architecture single-cycle processor designed according to book "Digital design and computer architecture: ARM edition" as a practice in digital design.

processor-architecture arm embedded model-simulation processor-design

Updated Jun 27, 2019
SystemVerilog

harmim / vut-inp-project2

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Návrh počítačových systémů - Projekt 2 - Procesor s Harvardskou architekturou

processor harvard vut inp fitkit vhld processor-design

Updated Nov 5, 2017
C

overengineer / SpecialPurposeProcessor

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FPGA implementation of a special purpose processor that performs single operation using custom ALU. You can take look at the [related blog post] (https://overengineer.github.io/SpecialPurposeProcessor) for further details.

fpga verilog processor-design

Updated Jan 3, 2019
Verilog

Subangkar / Computer-Architecture-CSE-306-BUET

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Simulation of Designs of Basic Computer & Processor Architecture(4-bit MIPS CPU, Floating Point Adder) in Logisim as assignments of Computer Architecture Sessional course of CSE 306 of CSE, BUET

processor-architecture cpu mips simulation cse computer-architecture alu circuit-simulation logisim mips-architecture mips-processor registers floating-point-arithmetic 4-bit processor-design 4-bit-cpu 16-bit-floating-point-adder cse-buet buet

Updated Aug 11, 2018
VHDL

itankar / mips-cpu

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Verilog implementation of a subset of MIPS 32 Bit Processor Instructions, ISA design, Assembler Design and Compiler design

processor-architecture embedded-systems processor-design

Updated Nov 28, 2018
Verilog

fatihkaan22 / mips32-modified

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verilog mips32 processor-design

Updated Feb 2, 2021
Verilog

Time0o / z80-verilog-report

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Verilog Implementation of a Z80 Compatible Processor Architecture - Lab Report

z80 processor-design

Updated Mar 28, 2021
TeX

Bennyaw / SimpleProcessor_Verilog

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A simple processor designed using Verilog and Altera DE1 development board.

simple modelsim verilog-hdl quartus processor-design altera-de1

Updated Apr 22, 2020
Verilog

lirui-shanghaitech / EE113_PROCESSOR

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The reference design of EE113's final project (Digital integrated Circuit design Fall 2020) at ShanghaiTech University

digital-design processor-design vlsi-design

Updated Aug 12, 2020

Ajarlin / CS211-Computer-Architecture

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Computer Architecture: 01:198:211 This course covers the fundamental issues in the design of modern computer systems, including the design and implementation of key hardware components such as the processor, memory, and I/O devices, and the software/hardware interface.

c data-representation assembly-x86 digital-logic-design computer-arithmetic processor-design cache-design main-memory-design