RISC-V Zve32x Vector Coprocessor
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May 14, 2022 - Assembly
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vector-processor
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An Extended Version of the T0x multithreaded cores, with a custom general purpose parametrized SIMD/MIMD vector coprocessor and support for 3-5 way superscalar execution. The core is pin-to-pin compatible with the RISCY cores from PULP
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Jul 5, 2021 - Assembly
Vector processor for RISC-V vector ISA
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Oct 19, 2020 - SystemVerilog
Transactional Verilog design and Verilator Testbench for a RISC-V TensorCore Vector co-processor for reproducible linear algebra
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Dec 19, 2021 - Verilog
Development and simulation framework for Application Specific Vector Processor
data-driven
dsp
architecture
simd
simulation-framework
digital-signal-processing
cycle-accurate
systemc
model-based
network-on-chip
heterogeneous-computing
vector-processor
single-instruction-multiple-data
asip
application-specific
system-simulation
vector-core
heterogeneous-structure
system-level-simulation
multimode-processing
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Mar 8, 2020 - C++
Design of Banked Memory Access Unit for Load Store Instructions of a 32-bit Vector Processor
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Nov 29, 2018 - Verilog
Domain Specific Hardware Accelerators - VLSI CAD Project
processor-architecture
ram
hardware
processor
bus
bluespec
hardware-designs
vlsi
hardware-acceleration
vlsi-physical-design
bluespec-systemverilog
processor-design
vector-processor
vlsi-design
bluespec-systemverilog-language
vlsi-cad
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Jan 11, 2021 - Bluespec
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