verilog

Type of issue: documentation

I'm not sure about if it was a system configuration problem on my computer. Most of my computers runs Archlinux with Java 18. It seems the pin text of RAM is too large and overlaps each other:

While I didn't found a way to configure font of the canvas in menus. I found that a modifica

EH1 has a lot of examples where a sequent CFunc contains only a handful ot statements (often 1 or 2) and is called only once. This causes a performance penalty when --output-split puts these in a different function than _eval and hence the compiler can't inline them, so we should inline these ourselve when it's obviously the right thing to do.

#23 was closed, and a follow on action was to document how to configure the cocotb logger to separate it and the simulator stdout.

Tuo Xie requested the ability to visualize clocking (pins & wires I believe). We should make it easier to visualize subsets of the device routing resource and types of routing nets.

Proposed Behaviour

Add filtering to the rr_nodes displayed (ToggleRR), and to the nets displayed (ToggleNets). I think we should have an option to filter what is shown by node type, node name (segment or pin t