Programmable Logic Circuit PLC
Programmable Logic Circuit PLC
PLC
INPUTS FROM OUTPUTS TO
DEVICES DEVICES
SPECIFIC FEATURES OF A PLC
• Rugged and designed to withstand vibrations,
temperature, humidity and noise.
• Easily programmable.
ARCHITECTURE OF A PLC..
BASIC STRUCTURE
• CPU- controls and processes all the operations within the PLC.
• Bus – carries information to and from the CPU, memory and i/o units.
• Memory :
* ROM- permanent storage of operating system and fixed
data
* RAM- memory for user’s program( battery is used to
prevent loss of data when power goes off)
* Temporary Buffer- stores for i/o channels
Some important terms
• PROGRAM STEP:
It is an instruction for some event to occur.
(ex) examine the state of A
• PROGRAM TASK:
Consists of a number of steps.
(ex) examine the state of A, examine state of B, if
both A and B are closed energize solenoid P.
INPUT/OUTPUT
• provides interface between the
system and the outside world.
1. Scan the inputs associated with one rung of the ladder program.
2. Solve the logic operation involving those inputs.
3. Set/reset the outputs for that rung.
4. Move on to the next rung and repeat the operations 1,2 and3.
5. Move on to the next rung and repeat the operations 1,2 and3.
6. Move on to the next rung and repeat the operations 1,2 and3.
and so on until the end of the program.
Two types:
1.Continuous updating
2.Mass input/output copying
CONTINUOUS UPDATING
• CPU scans the input channels in order.
• Each input point is examined individually and its effect in the
program is determined.
• built-in delay (3ms)- ensures only valid input signals are read
by the microprocessor( avoids reading the same input twice).
• A number of inputs may have to be scanned, each with a 3ms
delay, before the program has the instruction for a logic
operation to be executed and an output to occur.
• Outputs are latched- so they retain their status until the next
updating.
• Disadvantage: longer time.
MASS I/O COPYING
• To allow more rapid execution – a specific area of RAM is used as a
buffer store between the control logic and the i/o unit.
• Each i/o unit has an address in the memory.
1. At the start of a program cycle- CPU scans all inputs and copies their
status into the i/o address in RAM.
2. During execution - the stored input data is read from the RAM.
3. After execution - the outputs are stored in the reserved i/o section of
RAM.
4. At the end of a program – outputs are transferred from RAM to output
channels.
• The outputs are latched so that they retain their status until the next
updating.
PROGRAMMING
Ladder diagrams-
• writing a program in a similar manner to drawing a
switching circuit.
• Two vertical lines- power rails.
• Horizontal rungs of the ladder between the 2 lines-
circuit connections.
• Inputs must always precede outputs.
• There must be atleast one output on each line.
• Each rung should start with an input(s) and end with
an output.
• The inputs and outputs are numbered- notations as
given by the manufacturer.
Contd…..
QUESTION: SOLUTION:
• EXAMPLE-2:
On-off temperature control in which the input goes
from low to high when the temperature sensor
reaches the set temperature.
QUESTION: SOLUTION:
LOGIC FUNCTIONS
0 LD X400
1 AND X401
2 OUT Y430
OR system
0 LD X400
1 OR X401
2 OUT Y430
NOR system
0 LDI X400
1 ANI X401
2 OUT Y430
NAND system
0 LDI X400
1 ORI X401
2 OUT Y430
XOR system
Step Instruction Notation
0 LD X400
1 ANI X401
2 LDI X400
3 AND X401
4 ORB
5 OUT Y430
TIMERS
• Used to carry out tasks which involve time delay
and time counting.
Delay-on timer
DELAY-OFF TIMERS
• A timer which switches off an output after a time delay.
• When the input contacts are momentarily closed the
output is energized and the timer started.
• The output contacts latch the input and keep the output
on.
• After a preset time of the timer, the timer comes on and
breaks the latch circuit, so switching the output off.
CASCADED TIMERS
• To give larger delay times that which is not possible
by just one timer – timers are linked together.
• They are called cascaded timers.
ON-0FF CYCLIC TIMER
• Used to cause an output to go on for a certain time
and then off for a certain period and repeat this
cycle.
INTERNAL RELAYS
• Also called as auxiliary relay or marker.
• It also starts
output 1 and
makes it possible
for outputs 2 and
3 to be activated.
APPLICATION OF INTERNAL RELAYS-1
• To automate a pneumatic circuit (2 cylinders)
in which double solenoid valves are used in
the sequence A+B+B-A-.
APPLICATION OF INTERNAL RELAYS-2
• Used for resetting a latch.
•When the contacts of input 1
are momentarily pressed then
the output is energized.
• Two types:
* Down- counter: the counter counts from
present value to zero(events are subtracted from the
set value) and when zero is reached its contact state
changes.
* Up-counter: counts up to the preset value
(events are added until the number reaches the set
value) and when this is reached its contact changes
state.
SAMPLE COUNTING PROGRAM
• K10 indicates that the contact state changes
on the 10th pulse.
• When input1 closes momentarily, the
counter is reset to set value.
• Then the number of pulses resulting from
the contacts of input2 closing and opening
are counted.
• When it reaches the set value(10), the
counter contact closes.
• The output is thus switched on after 10
pulses.
• If the contacts of input1 are momentarily
closed during the count, the counter will
reset to 10.
Contd…
• In Mitsubishi code:
Step Instruction Notation
0 LD X400
1 RST C460
2 LD X401
3 OUT C460
4 K 10
5 LD C460
6 OUT Y430
SAMPLE APPLICATION OF COUNTERS
• Consider the problem of the control for a machine which is
required to direct 6 items along one path for packaging in a box,
and then 12 items along another path for packaging in another box.
SHIFT REGISTERS
• A number of internal relays are grouped together to form a
register.
• Provides storage area for a series sequence of individual bits.
• A 4-bit register can be formed using 4 internal relays, an 8-bit
using 8.
• The bits can be shifted along by one bit when there is a
suitable input to the register.
• (ex) initially an 8- bit register might have:
1 0 1 1 0 1 0 1
then there is an input of a 0 shift pulse:
0 0 1 0 1 1 0 1 0 1
with the result that all the bits shift along one place and the
last bit overflows.
INPUTS TO SHIFT REGISTERS
• Three inputs
1. To load data into the first element of the register
(OUT) - a logic level 0 or 1 is loaded into the first
element of the shift register.
• The operations that may be carries out with a PLC on data words
normally include:
1. Moving data.
2. Comparison of magnitudes of data, (i.e.)greater then, equal to or
less than.
3. Arithmetic operations such as addition and subtraction.
4. Conversions between binary coded decimal (BCD), binary and octal.
DATA REGISTERS
• Data instructions also require memory addresses.
• The locations in the PLC memory allocated for data are termed as
data registers.
• Thus, some PLCs have A-D converter fitted to input channels and D-
A converter fitted to output channels.
4. What speed and power is required for the CPU? This is linked to
the number of types of instruction that can be handled by a PLC. As
the number of types increases , a faster CPU is required. Likewise,
the greater the number of i/o to be handled the faster the CPU
required.
PROBLEMS…..
1. What are the logic functions used for switches (a) in
series (b) in parallel?
Fig (b)
Fig (a)
12. Explain how a PLC can be used to handle an
analog input.