Debug Port Design Guidelines
Debug Port Design Guidelines
Note: The lists of mandatory signal/pin connections are those required by our Processor-Controlled Test
(PCT) Test and Debug Solutions other uses of the debug ports may need additional connections.
INTRODUCTION
Traditionally, low-level microprocessor code was debugged using an emulator. An emulator is an
instrument that replaces a socketed processor, and provides the developer with the debug functions to
download code, set breakpoints, single step code, and so on.
As processor speed increased, it became impossible to design emulators of this type, so CPU vendors
began to embed the debug functions on the processor die. Typically, these functions are accessible via
the JTAG port, but in some cases proprietary interface pins are used (e.g. Freescale BDM).
CPU vendors use different naming conventions for their debug interfaces, but throughout this document,
the term debug port is frequently used as a generic term.
A debug port is typically an on-board connector or series of test points that link to a set of test/debug pins
on the processor package. If JTAG is used, it consists of the 5 JTAG signals and 0-3 other signals. The
number of additional sideband signals required depends on the processor type.
http://www.asset-intertech.com/Products/Processor-Controlled-Test/PCT-Software.aspx#PCTResources
If your board has a 60-pin male debug header (XDP), then you can use this by inserting the POD-II
adapter supplied by us.
If your board does not have a header, but has a socketed processor, you can use one of our interposer
products. An interposer is a break-out PCB that sits between the processor and the socket. The POD-II is
required to condition signals this is plugged into the interposer, as shown in Illustration 6.
If your processor is soldered, and your board does not have a debug header, then you will have to
construct a simple test jig to get access to the appropriate test points (Illustration 2). Contact us if you
require assistance with this. Although, the debug port specification defines a 26-pin connector (or 60 pin in
the case of XDP), the pins required for the operation of PCT Test and Debug solutions are:
The PowerPC Common On-Chip Processor (COP) debug port uses the processors JTAG bus and
some additional signals.
Processor-Controlled Test 4000 Design-for-Test. See DFT4000 document at the following address:
http://www.asset-intertech.com/Products/Processor-Controlled-Test/PCT-Software.aspx
See the reference manual for your specific processor, e.g. MPC5200 Hardware Specifications.
Search for MPC5200 on the Freescale website if the link below doesnt return the document:
http://www.freescale.com/files/32bit/doc/data_sheet/MPC5200.pdf?fsrch=1
If your board has a debug header, which is designed following the above specification, then you can plug
directly into this.
If your processor is soldered, and your board does not have a debug header, then you will have to
construct a simple test jig to get access to the appropriate test points (Illustration 2). Contact us if you
require assistance with this.
Although the PowerPC COP debug port specification defines a 16-pin connector, the pins required for
the operation of PCT Test and Debug solutions are:
The PowerArchitectureBackground Debug Mode (BDM) debug port uses a proprietary 3-pin bus with
additional signals.
If your board has a 10-pin BDM debug header, which is designed following the above specification, then
you can plug directly into this.
If your processor is soldered, and your board does not have a debug header, then you will have to
construct a simple test jig to get access to the appropriate test points (Illustration 2). Contact us if you
require assistance with this.
Although the PowerArchitectureBDM debug port specification defines a 10-pin connector, the pins
required for the operation of PCT Test and Debug solutions are:
Debug Port
Signal
Pin No.
1 VFLS0
3 GND
4 DSCLK
6 VFLS1
7 HRESET
8 DSDI
9 VDD
10 DSDO
The ARM debug port uses the processors JTAG bus, and some additional signals.
If your board has a 20-pin debug header that is designed following the above specification, then you can
plug directly into this.
If your processor is soldered, and your board does not have a debug header, then you will have to
construct a simple test jig to get access to the appropriate test points (Illustration 2). Contact us if you
require assistance with this.
Although, the ARM debug port specification defines a 20-pin connector, the pins required for the
operation of PCT Test and Debug solutions are:
Debug Port
Signal
Pin No.
1 VTref
3 nTRST
4 GND
5 TDI
7 TMS
9 TCK
13 TDO
15 nSRST
The IBM 4xx 16-pin debug port uses the processors JTAG bus, and some additional signals.
http://www-01.ibm.com/chips/techlib/techlib.nsf/techdocs/D060DB54BD4DC4F2872569D2004A30D6
If your board has a 16-pin debug header, which is designed following the above specification, then you
can plug directly into this.
If your processor is soldered, and your board does not have a debug header, then you will have to
construct a simple test jig to get access to the appropriate test points (Illustration 2). Contact us if you
require assistance with this.
Although, the IBM debug port specification defines a 16-pin connector, the pins required for the
operation of PCT Test and Debug solutions are:
Debug Port
Signal
Pin No.
1 TDO
3 TDI
4 TRST
6 Power Sense
7 TCK
9 TMS
16 GND
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