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Projekt Description 2015

This document outlines the design process for a step-down DC-DC buck converter project. It includes instructions on: 1) Calculating the switching frequency based on component specifications and output ripple requirements. 2) Sizing power devices based on voltage, current, losses and thermal considerations. This includes selecting suitable semiconductor components, calculating losses, and estimating heat sink requirements. 3) Simulating the open-loop and closed-loop converter design using circuit simulation software to analyze the final design.

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Sakib Kabir
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Download as PDF, TXT or read online on Scribd
0% found this document useful (0 votes)
67 views

Projekt Description 2015

This document outlines the design process for a step-down DC-DC buck converter project. It includes instructions on: 1) Calculating the switching frequency based on component specifications and output ripple requirements. 2) Sizing power devices based on voltage, current, losses and thermal considerations. This includes selecting suitable semiconductor components, calculating losses, and estimating heat sink requirements. 3) Simulating the open-loop and closed-loop converter design using circuit simulation software to analyze the final design.

Uploaded by

Sakib Kabir
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as PDF, TXT or read online on Scribd
You are on page 1/ 10

Project work in Power Electronics

PE-PD: Design of a step-down (buck) dc-dc converter

September 2015

1 Introduction
The aim of this project work is to design a step-down (buck) converter according to given
specifications. It should give the student an insight of the design procedure of a power
converter. The student is supposed to calculate suitable values for the passive components in
the circuit and to select suitable semiconductor devices. The controller design is based on
state-space averaging with the so-called K-factor approach. A circuit simulator, PSpice, is
used for analyzing the final design by means of simulations. Additional information to this
handout can be found in the textbook in Chapter 7 and Chapter 10.

The design goal is to achieve safe converter operation while keeping the cost of
manufacturing down. Therefore, components should not be excessively oversized. All design
decisions should be carefully motivated in the report.

The project work is to be summarized in a compact report, which should not exceed Four (4)
A4 pages excluding figures. The report must be handed in before the deadline (1st
December). Each group will then book a time through the course webpage to discuss the
report.

All simulation modules, datasheets and project related computer files can be downloaded
from KTH Social.

1
2 Dimensioning of the circuit
The circuit drawing of the step-down converter can be found in Figure 1. In the figure,
L represents the stray inductance of the circuit, RL represents the resistance of the inductance
and ESR denotes the capacitors series resistance. In the project work the load is modeled as a
resistor RLoad .

T
L RL
iL Io
+
Vd
- +

ESR
D Vo
Rload
C

Figure 1: Step-down dc-dc converter

The remaining specifications are given in the separated paper and are different between the
groups.

2.1 Switching frequency


For the given constrains of (Cmax Lmax ) and the ripple in the output voltage Vo , calculate an
initial value for the switching frequency ( f SW ) of the switching device. Round the calculated
value for f SW to the closest multiple of 1kHz. This value should be used below. Assume that
the converter operates in continuous conduction mode.

2.2 Losses in power devices


The main contributions to the losses in power semiconductor devices are switching losses
( PSW ) and on-state losses ( Pon ). These losses increase the operating temperature of the device
and have, therefore, to be cooled away in order not to destroy the component. The cooling
equipment has to be chosen carefully to guarantee a reliable and safe system.

2.2.1 On-state losses


All power semiconductor devices have power losses during their conduction period. The
magnitude of this power loss depends on the on-state voltage drop across the device and the
current through it. The on-state voltage drop, von , depending on the device current, iT , can be
found in the datasheet of the component. For the IGBT, assume that the gate-emitter voltage

2
to be VGE 15V . The on-state voltage and current are denoted VCE and IC for the IGBT, while
VF and IF for the diode. Be sure to consider the actual junction temperature when determining
the voltage drop. The average on-state power loss can then be calculated by
TSW
1
Pon
TSW (v
0
on iT ) dt , (1)

where iT denotes the device current.

2.2.2 Switching losses


The switching losses in power semiconductors depend on the switching frequency and the
current and voltage, which have to be turned on and off. Datasheets usually provide the turn-
on and turn-off energies (Eon, Eoff) at reference current and voltage values. These values have
to be converted to the actual case according to

vT iT
Eon / off Eon / offref , (2)
vTref iTref

where uT and iT are the instantaneous voltage and current values which have to be switched
and uTref and iTref are the reference values at which the reference switching energies have been
measured. The mean value of the switching losses over time is found by dividing the amount
of loss-energy per cycle with the switching period. Accordingly,

( Eon Eoff )
PSW . (3)
TSW

The reverse recovery losses of the diode are not considered in this project work.

2.2.3 Calculations
1. According to the specifications for the voltage, the current and the switching
frequency, choose a suitable power diode and switching device and briefly explain
your choice. The datasheets for possible devices can be found on the course web page.
Have a look at all the datasheets and choose devices, which will guarantee safe
operation. Attach the datasheets of the selected components as an appendix to the
written report.

Hint 1: Can over-voltages or currents be expected?


Hint 2: When you choose the components for the converter design, please make sure
that the maximum absolute ratings of the devices are not exceeded.
Hint 3: Is it cost-effective to choose overestimated components in order to ensure safe
and reliable operation?

2. Determine the values for Eon , Eoff , for both the diode and the switching device. Dont
forget to scale the switching energies according to Equation 2. The reference values
can be found in the datasheet under the section Inductive switching.

3
Hint 1: Determine the temperature on which you have calculated the power losses and
use the typical values for Eon , Eoff given in the datasheet!
Hint 2: Neglect the diode reverse recovery losses!

3. Assume the input and the output voltage of the converter, as they are specified in the
data table (average value of Vo ). Calculate the switching losses of the switching
component and the on-state losses of both the diode and the switch, assuming that the
converter operates at maximum load. Also calculate the total losses of the
semiconductors.

Hint 1: Derive the current and voltage waveforms of the devices and assume these to
be completely smooth (no ripple). Also assume instantaneous switching
characteristics.
Hint 2: Draw the voltage and current waveforms for the switching device and the
diode as well. This will help you determining the on and off state for each component
and solve Equation 1.

4. Summarize the results!

2.3 Choice of heat sink


As mentioned before, high junction temperatures of semiconductor devices may lead to a
destruction of the component. Therefore, it is necessary to cool away losses effectively in
order to guarantee safe operation of the system. Figure 2 shows an equivalent network
description of the thermal system. Determine the maximum thermal resistance and estimate
the geometry of the heat sink.

Figure 2: Steady state thermal network equivalent.

The procedure is outlined below:

a. Calculate the maximum allowed heat sink temperature with respect to both the IGBT
and the diode. The thermal resistance from junction to case can be found from the
datasheets. On the other hand, the thermal resistance from case to sink depends on the
mounting technique and is neglected in this project work (set to zero).

4
b. Calculate the maximum allowed temperature rise from heat sink to ambient.

c. Calculate the thermal resistance corresponding to the maximum allowed heat sink
temperature, ambient temperature and total dissipated losses.

d. Use Equation 29-23 in the textbook to estimate the geometry of the necessary heat
sink. Also include a sketch in your report.

Hint 1: Skim through pages 730-743 (Chapter 29) in the textbook for additional
information!
Hint 2: In order to estimate the geometry of the heat sink, use Section 29-4-3 of the
textbook.

3 Simulations and control


The simulations are performed with the simulation package PSpice. A compact manual of this
program can be found in Appendix A. PSpice simulation templates can be downloaded from
the course web page. Make sure to extract the zip-file preserving the directory structure,
needed by PSpice. When using WinZip, present on the computers in the student room, check
the Use folder names in the extract dialog.

3.1 Open-loop control


At first, the circuit is to be simulated with an open loop control, which means that the actual
value of the output voltage is not fed back to the control system. For this purpose, choose
suitable values (trial and error method) for the inductance and the output capacitor, which do
not exceed the specified maximum value. Furthermore, obtain the values for the internal
resistances RL and ESR according to the specifications and adjust these values in the circuit
drawing. Also adjust the pulse width (ton ; in the circuit diagram under Parameters) in order
to obtain the specified output voltage. The switching frequency is edited by changing the
value for period also to be found under Parameters in the circuit drawing. Change the
value of the output resistance, so that the load current matches the specification.

Exchange (according to Appendix A) the IGBT and the diode in the circuit drawing with the
ones chosen in Section 2.2.3. Run the simulation (Filename: project1)!

1. Calculate the current ripple in the inductance L and compare the result with the
simulation.

2. Determine the ripple in the output voltage! Are the simulations according to the
specifications? If not, why?

Hint: Try to choose the inductor L and capacitor C in such a way that the given conditions for
CL and the ripple in the output voltage are fulfilled. Note that the current ripple should also
be as low as possible, while the losses and the volume of an inductor also affect the total cost
of the system.

5
3.2 Closed-loop control
In order to fulfill the specifications it is not sufficient to use an open-loop control. Load-steps,
variation in the input voltage and other disturbances may occur and deteriorate the desired
performance of the system. The control system in this project work is derived from the control
system described in the textbook in Chapter 10 (Section 10-5-1 to 10-5-3). The described
control is based on a forward converter topology and can, therefore, easily be adapted for a
buck converter.

3.2.1 Power Stage, output filter and PWM controller


The transfer function of the power stage and the output filter (see Figure 10-19) can be
described by (Example 10-1 in the textbook)

02 s z
Tp ( s) Vd 2 , (4)
z s 20 s 02
1 1
with 0 , z and
LC ESR C

1 ( ESR RL )

C Rload L

20

The transfer function of the pulse-width modulator can be described by

1
Tm ( s )
, (5)
VR


where VR is the peak value of the saw tooth carrier wave.

The total transfer function between vo and the control voltage vc can now be described by

T1 (s) Tp ( s) Tm ( s) . (6)

3.2.2 Compensated error amplifier and total transfer function


The overall open-loop transfer function of the control system is

TOL (s) T1 (s)Tc (s) , (7)

6
where Tc ( s) is the transfer function of the compensated error amplifier. In order to yield a
TOL ( s) , which meets the performance requirements expected, the compensated error amplifier
has to be properly designed. Typical desired characteristics for TOL ( s) are as follows:

1) The gain of TOL ( s) at the crossover frequency should be 1.

2) The crossover frequency, fcross=cross/2 , should be as high as possible but


approximately an order of magnitude below the switching frequency.

3) The phase margin (PM) should be in a range of 45 60 in order to guarantee


stability.

4) The gain at low frequencies should be high to minimize the steady-state error in the
power supply output.

A transfer function for the error amplifier, which is a good starting point to meet these
requirements, is

A (s z 2 )
Tc( s) , (8)
s (s p )

cross
where A is the amplification factor and z 2 , p K cross . Note, that z from
K
Section 3.2.1 is not the same as z 2 ! The remaining constants and equations, which are
necessary for the calculations (next section) can be found in the textbook (Section 10-5-2).

3.2.3 Design of the control circuit


The purpose of this task is to adopt the parameters of the transfer function of the error
amplifier, Tc ( s) (Equation 10-102 in the textbook), in such a way that the requirements of the
total transfer function TOL ( s) are fulfilled. The file for PSpice is denoted project2.

1) Choose the crossover frequency cross to be one decade lower than the switching
frequency you chose in Section 2.1 of this handout.

2) Determine the gain Gp ( cross ) and the phase p ( cross ) of Tp ( s) at the


crossover frequency.

3) Choose a phase margin of PM 60 .

4) Assume the phase angle of the modulator to be m 0 and compute both z 2 and p
by calculating the K factor.

5) Determine the amplification constant A such that GOL ( cross ) 1 !

7
Use the calculated values to edit the compensated error amplifier in the circuit drawing in
PSpice (project2) and run the simulation. Dont forget to adjust the output voltage reference
value as well as all passive components.

Which changes can be seen compared to the open loop control? Comment on this in the
report!

Hint: If the K-factor has been calculated as negative, then try to adjust either the crossover
frequency cross or the value for L.

3.3 Load-step
In the last task of the project work, a load-step is analyzed. It is assumed, that the load current
will be increased from I o 15A to I o 20A . The file for the PSpice simulation is denoted
project3. This is done by decreasing the load resistance (Parallel connection of two
resistors).
How does the converter with its control system react on a load step?
How is the dynamic performance affected by your choice of L and C?
Describe the results in your report!

8
Appendix A (About PSpice)
About PSpice

SPICE (Simulation Program with Integrated Circuit Emphasis) was developed at the University of California
Berkeley. PSpice is a commercial version, a registered trademark of OrCAD Corporation
(http://www.orcad.com).

PSpice is the simulation program while Capture is the drawing program

Starting up
To launch Capture, click on the following: Start - Program - OrCAD Capture
Under the File menu, click on Open Project
Navigate or type in the filename with the full path name and thereafter click on Open button.

This is the highest level project file where all the information about related files to this project are stored. Follow
down the hierarchy by expanding Design Resources, Schematic1, page1.
Double-click on PAGE1. This will open the schematic circuit drawing used for simulations.

Using Capture Schematic

Note that PSpice is case insensitive, that is, uppercase and lowercase letters mean the same. We have the option
of using the following letters to indicate various power-of-ten: f for 1e-15, p for 1e-12, n for 1e-9, u for 1e-6, m
for 1e-3, k for 1e3, meg for 1e6, g for 1e9, and t for 1e12.

Each circuit should have one node designated as the ground node, which is connected to the ground symbol.

To change the value of a resistance, inductance or capacitance, doubleclick on the value and change it to a new
value.

For some of the components an initial condition can be set. This can be done by setting a value in the IC box.
The initial conditions that can be set are an initial current for the inductance and an initial voltage for the
capacitance.

Adding parts to the schematic circuit drawing.

Click on the place menu in Capture and choose part and a dialog box will open. Choose the correct component
and click ok. The chosen component, attached to the pointer appears. Drag it to the appropriate place. To place
this component, click the left mouse button. Get rid of the component selected to the pointer by pressing the Esc
key.
Selecting a component: Drag the pointer on top of the component and click the left mouse button or,
draw a box around the component (without selecting anything else). The selected component will turn
purple.
Deleting a component: select the component and press the delete key.
Undo: Any previous action can be undone by choosing undo under edit.
Dragging a component: First select it, and while holding down the ALT key (if it is connected by
wires), drag it holding the left mouse button down. Labels and values on the schematic can also be
dragged individually.
Rotating a component: Select a component. Press the control (CTRL) key on the keyboard and keep
typing r until the desired orientation is achieved.
Flipping a component: select a component. Click on the right mouse button and select mirror
horizontally or mirror vertically.
Place Markers: Place markers to plot voltages and currents of interest. Markers can also be rotated.

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RUNNING THE SIMULATION
Before the simulation, make certain that a proper simulation time has been chosen.
Under the PSpice menu, click on edit simulation profile.
Enter the chosen value in the Run to time box. Click on OK.
Save the schematic: Under the file menu, select save.
Start the analysis: Start the simulation by clicking on the run icon (or under the PSpice menu, click
on Run). The PSpice simulation status window shows up which indicates the simulation status
Exploring PSpice: Within PSpice, explore many possibilities by pulling down various menus, For
example in a plot, one or more waveforms can be scaled, waveforms can be labeled, certain portions of
the plot can be zoomed in, limits on the axes can be manually specified.

PLOTTING RESULTS

By using voltage and the current probes, voltages and currents can be plotted in PSpice window. The
Voltage/Level marker can be used to watch the electric potential where the marker is placed. The Voltage
differential markers are used to plot the voltage between the markers. The current marker is used to plot the
current through a device.

The IGBT supplied in Capture

Terminal 72 is the Gate


Terminal 71 is the Drain
Terminal 73 is the Source

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