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Counter Design

The document discusses different types of counters, including synchronous, asynchronous, binary, and BCD counters. It provides examples of designing 3-bit synchronous binary up counters using T flip-flops and JK flip-flops. It also discusses designing a BCD counter and a 3-bit bidirectional counter. Additionally, it covers ripple counters, ring counters, and Johnson counters. The key characteristics and design process of different counters are explained through examples and diagrams.

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0% found this document useful (0 votes)
944 views

Counter Design

The document discusses different types of counters, including synchronous, asynchronous, binary, and BCD counters. It provides examples of designing 3-bit synchronous binary up counters using T flip-flops and JK flip-flops. It also discusses designing a BCD counter and a 3-bit bidirectional counter. Additionally, it covers ripple counters, ring counters, and Johnson counters. The key characteristics and design process of different counters are explained through examples and diagrams.

Uploaded by

sujaganesan2009
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
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Download as DOCX, PDF, TXT or read online on Scribd
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Counter is a sequential circuit that goes through a prescribed sequence of states upon the

application of input pulses, clock or count pulse. The sequence of stated may follow a binary
count or any other sequence. It is used for counting the no. of occurrences of an event and
useful for generating timing sequences to control operations in a digital systems. Basically
the counter is classified in to two types. They are 1. Synchronous counter 2.Asynchronous
counter (or) ripple counter.

Synchronous counter:

The counter consists of n flip flops and it can count in binary from 0 to 2n - 1. In synchronous
counter, all the flip flops connected in the circuit will be triggered by the single clock pulse.

Binary counter: A counter that follows the binary sequence is called as binary counter. The
state diagram of a 3-bit binary counter is shown below. As seen from the binary states
indicated inside the circles, the flip flop outputs repeat the binary count sequence with a
return to 000 after 111.

Design of synchronous counter:

1. Draw the state diagram of the counter from the specification given in the problem
statement.
2. Convert the state diagram into state table which contains the present state, next state.
3. Determine the number of flip flops used and choose the type of flip flop to be used. Name
the flip flops
4. Find the flip flop inputs for the various combinations of present and next state by using the
excitation table of flip flop to be used.
5. Obtain the boolean expression for the flip flop inputs and minimise using any boolean
simplification methods.
6.Draw the logic diagram of the simplified expression using flip flops and basic logic gates.
Example:
Design a 3-bit binary up counter using T flip flop.
Solution:
State diagram of 3-bit binary counter.
State Table:
Present State Next State Flip flop inputs
ABC ABC TA TB TC
000 001 0 0 1
001 010 0 1 1
010 011 0 0 1
011 100 1 1 1
100 101 0 0 1
101 110 0 1 1
110 111 0 0 1
111 000 1 1 1
To construct 3-bit binary counter, 3 flip flops need to be used. T - flip flop is chosen.
The excitation table of T flip flop is given as follows:
Present State Next State Flip flop Input
(Q(t)) (Q(t+1)) (T)
0 0 0
0 1 1
1 0 0
1 1 1
From the state table, the boolean expression for the flip flop inputs are:
TA = m3+m7
TB = m1+m3+m5+m7
TC = 1
Using K - map to simplify the obtained boolean expression:

TA TB TC

TA = BC TB = C TC = 1

Logic Diagram:

CP QA CP QB QC
CP

TA TB TC
VCC

The 3-bit binary counter can also be constructed using JK Flip Flop. As JK Flip Flop has two
inputs the flip flop inputs are named as JA,KA,JB,KB,JC and KC. Hence the state table of the
counter is as follows:
Present State Next State Flip flop inputs
ABC ABC JA KA JB KB JC KC
000 001 0 X 0 X 1 X
001 010 0 X 1 X X 1
010 011 0 X X 0 1 X
011 100 1 X X 1 X 1
100 101 X 0 0 X 1 X
101 110 X 0 1 X X 1
110 111 X 0 X 0 1 X
111 000 X 1 X 1 X 1
The excitation table of JK flip flop is given as follows:
Present State Next State Flip flop Input
(Q(t)) (Q(t+1)) J K
0 0 0 X
0 1 1 X
1 0 X 1
1 1 X 0
The simplified functions are:
JA, = BC, KA = BC, JB = C, KB = C, JC = 1 and KC = 1.
The logic diagram is

CP QA CP QB QC
CP

KA JA KB JB KC JC
VCC

Example:
Design a counter with BCD sequence using T Flip Flop.
Sol:
The given counter has the BCD Sequence means the count sequence with 0000, 0001, 0010
...1001 and return to 0000. This counter is also called as BCD counter. The state diagram of
this counter can be drawn as
State Table:
Present State Next State Flip flop inputs
ABCD ABCD TA TB TC TD
0000 0001 0 0 0 1
0001 0010 0 0 1 1
0010 0011 0 0 0 1
0011 0100 0 1 1 1
0100 0101 0 0 0 1
0101 0110 0 0 1 1
0110 0111 0 0 0 1
0111 1000 1 1 1 1
1000 1001 0 0 0 1
1001 0000 1 0 0 1
Boolean Equations are,
TA = m7+m9+d(10 - 15)
TB = m3+m7+d(10 - 15)
TC = m1+m3+m5+m7+ d(10 - 15)
TD = 1
Simplified equations are
TA = BCD+AD
TB = CD
TC = A'D
TD = 1
Logic Diagram:

Example:
Design a 3 - bit binary bidirectional counter that is capable of counting either up or down.
Sol:
An input line Up/Down' specifies the direction of counting.
Up/Down' = 1 -> Count upward. The circuit acts as Binary up counter.
Up/Down' = 0 -> Count downward. The circuit acts as Binary down counter.
Input equations for binary up counter is TA = BC, TB = C and TC = 1.
Input equations for binary down counter is TA = B'C', TB = C' and TC = 1.
Logic Diagram:
Ripple Counter:
The flip flop output transition serves as a source for triggering other flip flops. In other
words, the CP inputs of all flip flops are not triggered at the same time.
Construction of Ripple counter:
To construct the ripple counter, the circuit should satisfy two conditions. They are,
1. Negative edge triggering flip flop need to be used to construct Ripple counter.
2. Flip flop should be used in complement mode.
Basic Ripple Counter:

The circuit behaves as two bit up counter and its timing wave form is shown in the fig.
3- bit down counter:
Ring Counter

Timing waveform

Johnson Counter

Truth Table for a 4-bit Johnson Ring Counter

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