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Exercise 1

This document contains 10 problems related to simplifying Boolean expressions and designing digital logic circuits using techniques like Boolean algebra, K-maps, and NAND/NOR gates. The problems involve simplifying expressions, implementing functions with logic gates, designing circuits to satisfy certain conditions, and building a BCD error detector circuit.

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Kaka Hiếu
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496 views

Exercise 1

This document contains 10 problems related to simplifying Boolean expressions and designing digital logic circuits using techniques like Boolean algebra, K-maps, and NAND/NOR gates. The problems involve simplifying expressions, implementing functions with logic gates, designing circuits to satisfy certain conditions, and building a BCD error detector circuit.

Uploaded by

Kaka Hiếu
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as DOCX, PDF, TXT or read online on Scribd
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DIGITAL SYSTEMS

EXERCISES 1
Problem 1. Simplify the following expressions using Boolean Algebra
a. 𝑓 = 𝐴𝐵𝐶 + 𝐴̅𝐶
b. ℎ = (𝑄 + 𝑅)(𝑄̅ + 𝑅̅
c. 𝑝 = 𝐴𝐵𝐶 + 𝐴𝐵̅𝐶 + 𝐴̅
d. 𝑞 = ̅̅̅̅̅
𝑅𝑆𝑇(𝑅 ̅̅̅̅̅̅̅̅̅̅̅̅̅
+ 𝑆 + 𝑇)
e. 𝑤 = 𝐴̅𝐵̅𝐶̅ + 𝐴̅𝐵𝐶 + 𝐴𝐵𝐶 + 𝐴𝐵̅𝐶̅ + 𝐴𝐵̅𝐶
f. 𝑥 = (𝐵 + 𝐶̅ )(𝐵̅ + 𝐶) + 𝐴 ̅̅̅̅̅̅̅̅̅̅̅̅̅
̅ + 𝐵 + 𝐶̅
g. 𝑦 = (𝐶 + 𝐷 ) + 𝐴𝐶 𝐷 + 𝐴𝐵̅𝐶̅ + 𝐴̅𝐵̅𝐶𝐷
̅̅̅̅̅̅̅̅ ̅ ̅
h. 𝑧 = 𝐴𝐵(𝐶 ̅̅̅̅
̅ 𝐷 ) + 𝐴̅𝐵𝐷 + 𝐵̅𝐶̅ 𝐷
̅

Problem 2. Simplify the circuits shown in the figures below using Boolean Algebra

a.

b.

Problem 3. Use a K-map to simplify (all possible cases)


a. 𝐹(𝐴, 𝐵, 𝐶) = ∑(1,2,3,4,6,7)
b. 𝐹(𝐴, 𝐵, 𝐶, 𝐷) = ∑(1,3,4,5,6,7,12,13)
c. 𝐹(𝐴, 𝐵, 𝐶, 𝐷) = ∑(2,5,7,8,10,12,13,15)
d. 𝐹(𝐴, 𝐵, 𝐶, 𝐷) = ∑(0,6,8,9,19,11,13,14,15)
e. 𝐹(𝐴, 𝐵, 𝐶, 𝐷) = ∑(0,4,5,6,7,8,9,10,11,13,14,15)
f. 𝐹(𝐷, 𝐶, 𝐵, 𝐴) = ∑(0,2,3,5,7,8,10,11,12,13,14,15)
g. 𝐹(𝐷, 𝐶, 𝐵, 𝐴) = ∑(0,1,4,5,7,8,10,13,14,15)
h. 𝐹(𝐷, 𝐶, 𝐵, 𝐴) = ∑(1,2,5,10,12) + ∑𝑑(0,3,4,8,13,14,15)
Problem 4. Use a K-map to simplify (all possible cases)
a. 𝐹(𝐴, 𝐵, 𝐶, 𝐷) = ∑𝑚(0,1,2,5,7,8,10,14,15) + 𝑑(3,13)
Digital System – Fall 2019 | 1
b. 𝐹(𝐴, 𝐵, 𝐶, 𝐷) = ∏ 𝑀(1,3,4,5,11,12,14,15). 𝐷(0,6,7,8)
c. 𝐹(𝐴, 𝐵, 𝐶, 𝐷) = ∑𝑚(1,3,6,8,11,14) + 𝑑(2,4,5,13,15)
d. 𝐹(𝐴, 𝐵, 𝐶, 𝐷) = ∏(1,5,6,7,9,11,15). 𝐷(5,7,10,12)
e. 𝐹(𝐷, 𝐶, 𝐵, 𝐴) = ∑(0,1,4,6,10,14) + 𝑑(5,7,8,9,11,12,15)
f. 𝐹(𝐸, 𝐷, 𝐶, 𝐵, 𝐴) = ∑𝑚(1,3,10,14,21,26,28,30) + 𝑑(5,12,17,29)
g. 𝐹(𝐴, 𝐵, 𝐶, 𝐷) = ∏ 𝑀(0,2,3,4,7,8)
Problem 5. Design a circuit that produces a HIGH out only when all three inputs are the same
level.
a. Use a truth table and K map to produce the SOP solution
b. Use two-input XOR and other gates to find a solution.
Problem 6. The following function is in minimum sum of products form. Implement it using
only two-input NAND gates. No gate may be used as a NOT gate.
a. 𝐺 = 𝐴𝐵𝐶𝐸̅ + 𝐴̅ 𝐵̅ 𝐸̅ + 𝐵̅ 𝐶̅ 𝐸 + 𝐴̅𝐵𝐶𝐸 + 𝐴𝐷
̅
b. 𝐾 = 𝐴̅ 𝐵̅ 𝑋 + 𝐴𝐵̅ 𝑋̅ + 𝐴̅𝐵𝑋̅ + 𝐴𝐵𝑋
Problem 7. Construct he given circuit using NAND gates only:
a. Using top-down approach
b. Using bottom-up approach

Problem 8. A manufacturing plant needs to have a horn sound to signal quitting time. The
horn should be activated when either of the following conditions is met:
a. It’s after 5 o’clock and all machines are shutdown
b. It’s Friday, the production run for the day is complete, and all machines are
shutdown.
Design a logic circuit that will control the horn.
Problem 9. Figure below shows a diagram for an automobile alarm circuit used to detect
certain undesirable conditions. The three switches are used to indicate the status of the door by
the driver’s seat, the ignition, and the headlights, respectively. Design the logic circuit with
these three switches as inputs so that the alarm will be activated whenever either of the
following condition exists:

Digital System – Fall 2019 | 2


a. The headlights are on while the ignition is off
b. The door is open while the ignition if on
Problem 10. A BCD code is being transmitted to a remote receiver. The bits are A3, A2, A1,
and A0, with A3 as the MSB. The receiver circuitry includes a BCD error detector circuit that
examines the received code to see if it is a legal BCD code (i.e., <= 1001). Design this circuit to
produce a HIGH for any error condition.

Digital System – Fall 2019 | 3

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