Department of Computer Science and Engineering (CSE) : United International University Course Syllabus
Department of Computer Science and Engineering (CSE) : United International University Course Syllabus
13 Text Book Computer Organization and Design: The Hardware/Software Interface, Fifth
Edition, Patterson and Hennessy, Morgan Kaufmann/ Elsevier, 2009.
14 Reference Introduction to Computing Systems: From Bits and Gates to C and Beyond,
Second Edition, Patt and Patel, McGraw-Hill.
Computer Organization, Hamacher, Vranesic, and Zaky, McGraw-Hill.
Computer Architecture and Implementation, Harvey Cragon, Cambridge
University Press.
Structured Computer Organization, Andrew Tanenbaum, Prentice Hall.
15 Course Contents Information representation and transfer, Instruction and data access
(approved by methods, the control unit: hardwired and microprogrammed, memory
UGC) organization, I/O systems, channels, interrupts, DMA, Von Neumann SISD
organization, RISC and CISC machines.
Pipelined machines, Interleaved memory system, Caches, Hardware and
architectural issues of parallel machines, Array processors, associative
processors, multiprocessors, systolic processors, data flow computers and
interconnection networks, High level language concept of computer
architecture.
16 Course
Outcomes (COs) COs Description
CO1 Analyze the operations of a Modern Computer from Software level to
Hardware level
CO2 Explain instructions of a MIPS based Instruction Set Architecture
CO3 Demonstrate the Arithmetic Operations of MIPS architecture
CO4 Design Pipelined and Non-Pipelined processors for MIPS architecture
CO5 Compare the usage of different types of Interleaved Memory
CO6 Analyze details of parallel processing using multiprocessors
17 Teaching Methods Lecture, Case Studies, Project Developments.
18 CO with
Assessment CO Assessment (%)
Methods Method
- Attendance 5
- Assignments 5
CO1, CO2, CO3, Class Tests 20
CO4, CO5, CO6
CO1, CO2, CO3 Midterm exam 30
CO4, CO5, CO6 Final exam 40
19 Mapping of COs and Program outcomes
Program Outcomes(POs)
COs
PO1 PO2 PO3 PO4 PO5 PO6 PO7 PO8 PO9 PO10 PO11 PO12
CO1 C
CO2 C
CO3 C
CO4 C
CO5 C
CO6 C
20 Lecture Outline
Lecture
Reading
Class Topics/Assignments COs Outcomes/Activi
Reference
ties
Introduction to Computer
1 Architecture, Components of CO1 1.2, 1.3
Computer
2 Performance of Processor CO1 1.4,1.5, 1.6
Power Wall, Multiprocessor, Pitfalls,
3 CO1 1.7, 1.9
Amdahl’s Law
Introduction to ISA, Operations of 2.1, 2.2,
4 CO2 Class Test 1
Computer, Operands of Computer 2.3
Signed & Unsigned number,
5 CO2 2.4, 2.5
Representing Instructions
Logical Operations, Branching
6 CO2 2.6, 2.7 Assignment 1
Instructions
7 Procedures CO2 2.8
8 Communicating with People CO2 2.9
Arithmetic of Computer, Addition &
9 CO3 3.1, 3.2 Class Test 2
Subtraction
Multiplication Algorithm, Optimized
10 CO3 3.3
Multiplication Algorithm
Division Algorithm & Modified
11 CO3 3.4
Division Algorithm
12 Floating Point CO3 3.5
MIDTERM EXAM
Logic Design Convention, Building a
13 CO4 4.2, 4.3
Datapath
Simple Non-Pipelined
14 CO4 4.4
Implementation of MIPS Datapath
15 Pipelining Overview CO4 4.5 Class Test 3
16 Pipeline Hazards CO4 4.5
17 Pipelined Datapath & Control CO4 4.6
Data Hazards: Forwarding versus
18 CO4 4.7, 4.8 Class Test 4
Stalling, Branch Prediction
Introduction to Memory Hierarchy,
19 CO5 5.1, 5.2
Cache Technologies
20 Basics of Cache CO5 5.3
21 Improving Cache Performance CO5 5.4
The Difficulty of Creating Parallel
22 Processing Programs, SISD, MIMD, CO6 6.2, 6.3 Class Test 5
SIMD, SPMD, and Vector
23 Hardware Multithreading CO6 6.4
Multicore and Other Shared Memory
24 CO6 6.5
Multiprocessors
Letter Grade Marks % Grade Point Letter Grade Marks% Grade Point
A (Plain) 90-100 4.00 C+ (Plus) 70-73 2.33
A- (Minus) 86-89 3.67 C (Plain) 66-69 2.00
B+ (Plus) 82-85 3.33 C- (Minus) 62-65 1.67
B (Plain) 78-81 3.00 D+ (Plus) 58-61 1.33
B- (Minus) 74-77 2.67 D (Plain) 55-57 1.00
F (Fail) <55 0.00