Direct Memory Access (DMA) : What Is A DMA Controller?
Direct Memory Access (DMA) : What Is A DMA Controller?
For the execution of a computer program, it requires the synchronous working of more than
one component of a computer. For example, Processors – providing necessary control
information, addresses…etc, buses – to transfer information and data to and from memory to
I/O devices…etc. The interesting factor of the system would be the way it handles the
transfer of information among processor, memory and I/O devices. Usually, processors
control all the process of transferring data, right from initiating the transfer to the storage of
data at the destination. This adds load on the processor and most of the time it stays in the
ideal state, thus decreasing the efficiency of the system. To speed up the transfer of data
between I/O devices and memory, DMA controller acts as station master. DMA controller
transfers data with minimal intervention of the processor.
The term DMA stands for direct memory access. The hardware device used for direct
memory access is called the DMA controller. DMA controller is a control unit, part of I/O
device’s interface circuit, which can transfer blocks of data between I/O devices and main
memory with minimal intervention from the processor.
DMA controller provides an interface between the bus and the input-output devices.
Although it transfers data without intervention of processor, it is controlled by the processor.
The processor initiates the DMA controller by sending the starting address, Number of words
in the data block and direction of transfer of data .i.e. from I/O devices to the memory or
from main memory to I/O devices. More than one external device can be connected to the
DMA controller.
DMA controller contains an address unit, for generating addresses and selecting I/O device
for transfer. It also contains the control unit and data count for keeping counts of the number
of blocks transferred and indicating the direction of transfer of data. When the transfer is
completed, DMA informs the processor by raising an interrupt. The typical block diagram of
the DMA controller is shown in the figure below.
DMA controller has to share the bus with the processor to make the data transfer. The device
that holds the bus at a given time is called bus master. When a transfer from I/O device to the
memory or vice verse has to be made, the processor stops the execution of the current
program, increments the program counter, moves data over stack then sends a DMA select
signal to DMA controller over the address bus.
If the DMA controller is free, it requests the control of bus from the processor by raising the
bus request signal. Processor grants the bus to the controller by raising the bus grant signal,
now DMA controller is the bus master. The processor initiates the DMA controller by
sending the memory addresses, number of blocks of data to be transferred and direction of
data transfer. After assigning the data transfer task to the DMA controller, instead of waiting
ideally till completion of data transfer, the processor resumes the execution of the program
after retrieving instructions from the stack.
DMA controller now has the full control of buses and can interact directly with memory and
I/O devices independent of CPU. It makes the data transfer according to the control
instructions received by the processor. After completion of data transfer, it disables the bus
request signal and CPU disables the bus grant signal thereby moving control of buses to the
CPU.
When an I/O device wants to initiate the transfer then it sends a DMA request signal to the
DMA controller, for which the controller acknowledges if it is free. Then the controller
requests the processor for the bus, raising the bus request signal. After receiving the bus grant
signal it transfers the data from the device. For n channelled DMA controller n number of
external devices can be connected.
The DMA transfers the data in three modes which include the following.
a) Burst Mode: In this mode DMA handover the buses to CPU only after completion of
whole data transfer. Meanwhile, if the CPU requires the bus it has to stay ideal and wait for
data transfer.
b) Cycle Stealing Mode: In this mode, DMA gives control of buses to CPU after transfer of
every byte. It continuously issues a request for bus control, makes the transfer of one byte and
returns the bus. By this CPU doesn’t have to wait for a long time if it needs a bus for higher
priority task.
c) Transparent Mode: Here, DMA transfers data only when CPU is executing the
instruction which does not require the use of buses.
Advantages
DMA speedups the memory operations by bypassing the involvement of the CPU.
For each transfer, only a few numbers of clock cycles are required
Disadvantages
Cache coherence problem can be seen when DMA is used for data transfer.