Scribd
Upload
83 views

CS 532

The student declares that they will not engage in cheating, copying, or plagiarism on their midterm exam for the Computer Architecture course. They take full responsibility for their conduct and understand disciplinary action may be taken if found participating in prohibited activities. The document is a student declaration form for a midterm exam in Computer Architecture. The student promises not to cheat and understands there will be consequences if caught engaging in academic dishonesty.

Uploaded by

Humaira Ch
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as DOCX, PDF, TXT or read online on Scribd
83 views

CS 532

The student declares that they will not engage in cheating, copying, or plagiarism on their midterm exam for the Computer Architecture course. They take full responsibility for their conduct and understand disciplinary action may be taken if found participating in prohibited activities. The document is a student declaration form for a midterm exam in Computer Architecture. The student promises not to cheat and understands there will be consequences if caught engaging in academic dishonesty.

Uploaded by

Humaira Ch
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as DOCX, PDF, TXT or read online on Scribd
You are on page 1/ 4

Student Declaration

I__________________________________ Registration No.__________________, hereby

declare that by attempting the paper for the course ___ Computer Architecture___,I will not

be involved in any kind of cheating/copying/plagiarizing in solving the short questions based

paper of Mid Term Examination Spring2021. I take full responsibility of my conduct. If I

found involved in any kind of such activity of cheating/copying/plagiarizing, then Institute

reserves the right to take any disciplinary action against me.

Student Signature
Mid Exam / Spring 2021 (Paper Duration 24 hours)
(Online Assignment Based Question Paper)

Course No.: CS-532 Course Title: Computer Architecture


Total Marks: 18 Date of Exams:
Degree: BSCS Semester: 6th Section: A, B
Marks
Q.No. 1 2 3 4 5 6 7 8 9 10 Obtained/
TotalMarks
Marks /18
Obtaine
d
Obtained Marks in Words:
Name of the Teacher: Tayyaba Tariq
Who taught the course:Signature of Teacher / Examiner:

To be filled by Student

Registration No.: Name:

(THEORETICAL EXAMINATION)

Answer the following questions


Q.No.1.A program runs in 5 seconds on a computer X, which has a 4 GHz clock. We are trying to
help a computer designer build a computer Y, which will run this program in 6 seconds. The designer
has determined that a substantial increase in the clock rate is possible, but this increase will affect the
rest of CPU design, causing computer B to require 0.5 times as many clock cycles as computer X for
this program. What clock rate should we tell the designer to target?
(Marks 06)
Answer: _______ ______

Q.No.2. Explain RISC and CISC architecture well also explain the detail of VLSI circuit working in
Moore’s law. (Marks 06)
Answer:-
RISC architecture:-
RISC means ``reduced instruction set computer''. it is a CPU design plan supported simple order and
it works fast.
This is atiny low or reduced set of instructions. All instructable here is predicted to induce very small
jobs. during this device, the instruction set is modest and easy, so it helps to construct more complex
instructions. Each instruction is approximately the identical length. they're rolled together to perform
complex tasks in one operation. Most commands are completed in one machine cycle. This pipe lining
is a crucial technique wont to speed up RISC machines.
RISC architecture diagram:-
Hardware and control unit
Data path
Instruction cache
Data cache
(Instruction) (data)
Main memory

CISC architecture:-
CISC stands for “complex Instruction Set Computer“. A CPU design plan supported one commands
that's good at executing multi-step tasks.
CISC computers have atiny low program. There are variety of complex commands that take a
protracted time to perform. Here, one set of instructions is protected in several stages. Each
instruction set has over 300 separate instructions. the most command is completed in 2 to 10 machine
cycles. Command pipelining isn't easily implemented in CISC.
CISC Architecture diagram:-
control unit
Instruction & Data path
Micro progeam control memory
cache
Main memory
VLSI circuit working in Moore’s law:-
Moore's Law implies Moore's perception that while computer costs are dig half. The number of
transistors on a micro-chip doubles each years. Moore's Law says that you just could assume your
computer's speed and overall performance to extend every two years, and you'll pay less for it. every
year. Moore's Law. Gordon E. Moore observed that the amount of transistors on a computer chip
doubles about every 18 to 24 months.
The moore’s law plays a serious role within the VLSI circuits. this little electronic circuits of diverse
IC’s and that they successively possess many transistors which supports the circuitry.

Q.No.3. Many companies are making computer systems. Describe complete detail of CPU working of
various automatic data processing system companies as mentioned including hp, Dell, Lenovo,
Fujitsu, Apple and IBM. (Marks 06)
Answer: _______ ______

You might also like