ASSIGNMENT # 3

CHAPTERS# 1,2,3
CH#1
ANSWERS TO REVIEW QESTIONS
SECTION 1.1:
1. True

2. Microcontroller

3. d

4. d

5. It is called dedicated system because it is dedicated to doing one job at a

time

6. Embedded system means that the application and processor are

combined into a single system.

7. Having multiple sources for a given part part means you are not hostage
to one supplier. More importantly, cmpetition among supplier brings about
lower cost for that product.

SECTION 1.2:
1. 4KB on-chip program memory(ROM)

128 bytes on-chip data memory(RAM)

16 bit Timers(usually 2,but may more or less)

2. The major difference between these two is 8052 has 256 bytes of RAM
and a 3 Timers. It also has 8K bytes of on-chip ROM where as 8051 has
128 bytes of RAM,4K byte on-chip ROM and a 2 Timers.

3. (a) 128 bytes

(b) 256 bytes

(c) 128 bytes

4. (a) 4K bytes

(b) 8K bytes

(c) 0K bytes

5. 8

6. The main difference is the type of on-chip ROM.8751 is a UV-EPROM .

AT89C51 is a Flash . DS89C420/30 is a Flash ROM with a on-chip loader.

7. True

8. True

9. 16K

PROBLEMS:
SECTION 1.1
1. A general purpose microproceesor has on chip ROM. False

2. A microcontroller has on-chip ROM. True

3. A microcontroller has on-chip I/O ports. True

4. A microcontroller has fixed amount of RAM on the chip. True

5. What components are normally put together with the

microcontroller into a single chip?

CPU,RAM,ROM,EEPROM,I/O,Timer,Serial COM port,ADC.

6. Intel's Pentium chips used in windows PCs need external RAM and ROM
chips to store data and code.

7. List three embedded products attached to a PC.

Keyboard, mouse, printer.

8. Why would someone wants to use an x86 as an embedded

processor?

Computing power and compatibility with millions and millions of PCs.

9. Give the name and manufacturer of some of the most widely used 8-
bit microcontroller?

Freescale's 6811, Intel's 8051, Zilog's Z8 and PIC 16X- Microchip

Technology.

10. In Question#9, which microcontroller has the most manufacture

sources?

8051

11. In binary based embedded product, what is the most important

factor in choosing a microcontoller?

Power consumption.

12. In an embedded controller with on-chip ROM, why does the size of
the ROM matter?

The ROM area is where the executable code is stored.

13. In choosing a microcontroller, how important is it to have multiple

sources for that chip?

Very, in case there is a hostage by one supplier.

14. What does the "third party support" mean?

Suppliers other than the manufacturer of the chip.

15. If a microontroller architecture has both 8-bit and 16-bit versions
which of the following is true?

(a) The 8-bit software will run on 16-bit system

(b) The 16-bit software will run on 8-bit system

ANSWER: (a)

SECTION 1.2
16. The 8751 has4K bytes of on-chip ROM.
17. The AT89C51 has 128 bytes of on-chip RAM.
18. The 8051 has 2 timers.
19. The AT89C51 has 256 bytes of on-chip RAM.
20. The ROM-less version of 8051 used 8031 as the part number.
21. The 8051 family has 32 pins for I/O.
22. The 8051 family has circuitry to 1 serial ports.
23. The 8751 on-chip ROM is of type UV-EPROM

24. The AT89C51 on-chip ROM is of type Flash

25. The DS5000 on-chip ROM is of type NV-RAM

26. The DS89C420/30 on-chip ROM is of type Flash with loader on

the chip

27. Give the amount of RAM and ROM for the following chips.

(a) AT89C51 (b) DS89C420/30 (c) DS89C440

(a) 128 byte RAM and 4K(Flash) ROM

(b) 256 byte RAM and 16K(Flash) ROM

(c) 256 byte RAM and 32K(Flash) ROM

28. Of the 8051 family, which memory type is the most effective if you
are using a million of them in an embedded product?

OTP

29. What is the difference between the 8031 and 8051?

8031 is ROM less version of 8051. 8031 has 0k byte ROM and
8051 has 4K byte ROM.

30 Out of the 8051 microcontroller, which one of the best for the home
development environment?(you do nlt have access to a ROM burner.)

DS89C420/30.

CH#2:
ANSWERS TO REVIEW QUESTIONS
SECTION#2.1
1. MOV A,#34H

MOV B,#3FH

ADD A,B

2. MOV A,#16H

ADD A,#0CDH

MOV R2,A

3. False

4. FF hex and 255 in decimal

5. 8
SECTION#2.2
1. The real work is performed by instructions such as MOV and ADD.
Pseudo instructions, also called assembler directives, instruct the
assembler in doing the job.

2. The instruction mnemonics, pseudo-instructions.

3. False

4. All except(c)

5. Assembler directive

6. True

7. (c)

SECTION#2.3
1. True

2. True

3. (a)

4. (b) and (d)

5. (d)

SECTION#2.4
1. 16

2. True

3. 0000H

4. 2

5. With 8K bytes, we have 8192(8x1024=8192)bytes, and the ROM space

is 0000 to 1FFFH.
SECTION#2.5
1. DB

2. 7

3. If the value is to be changed later, it can be done once in one place

instead of at every occurance.

4. (a) 4 bytes (b) 7 bytes.

5. This places the ASCII values for each character in memory location
starting at 200H. Notice that all values are in hex.

200=(41)

201=(42)

202=(43)

203=(31)

204=(32)

205=(33)

SECTION#2.6
1. PSW(program status register)

2. 8 bits

3. D1 and D5, which are referred to as PSW.1 and PSW.5,respectively.

4. Hex binary

FF 1111 1111

+ 1 + 1

100 1000 0000

This leads to CY=1 and AC=1

5. Hex binary

C2 1100 0010

+ 3D + 0011 1101

FF 1111 1111

This leads to CY=0 and AC=0

SECTION#2.7
1. 8-bit

2. Incremented

3. Decremented

4. 08

5. 0

6. 0-7

7. Register bank 3

8. RAM location 18H to 1FH

PROBLEMS:
SECTION#2.1
1. Most registers in the 8051 are 8 bits wide.

2. Registers R0-R7 are all 8 bits wide

3. Registers ACC and B are 8 bits wide.

4. Name a 16-bit register in the 8051.

DPTR,PC
5. To load R4 with the value of 65H the pound signal is (necessary,optional)
in the instruction "MOV R4, #65H"

Necessary

6. What is the result of the following code and where it is kept

MOV A, #15H
MOV R2, #13H
ADD A,R2
A=#28H, result kept in accumulator
7. Which of the following is(are) illegal?

(a) MOV R3,#500 (b) MOV R1,#50 (c) MOV R7,#00

(d) MOV A,#255H (e) MOV A,#50H (f) MOV A,#F5H

(g) MOV R9,#50H

ANSWER: (a),(d),(f),(g)

8. Which of the following is(are) illegal?

(a) ADD R3,#50 (b) ADD A,#50H (c) ADD R7,R4

(d) ADD A,#255H (e) ADD A,R5 (f) ADD A,#F5H

(g) ADD R3,A

ANSWER: (a),(c),(g)

9. What is the result of the followin code and where it is kept?

MOV R4,#25H

MOV A,#1FH

ADD A,R4
ANSWER: A=#44H, result kept in accumulator.

10. What is the result of the followin code and where it is kept?.

MOV A,#15

MOV R5,#15

ADD A,R5

ANSWER: A=1EH, result kept in accumulator

SECTION#2.2 & SECTION#2.3

11. Assembly Language is a Low-level language while C is high- level
language

12. Of C and Assembly language, which language is more efficient in

terms of code generation(i.e the amount of ROM space it uses)?

C provides a higher level syntax that makes the programmer's job much
easier,allowing them to express more logic in fewer lines of code. Often
times, code generated by a compiler is equally as good(in terms of space
and efficiency).

13. Which program produces the "obj" file?

Assembler program.

14. The source file has the extension "src" or "asm". True

15. Which file provides the listing of error messages?

lst file

16. The source file can be a non-ASCII file. False

17. Every source file must have ORG and END directive. True

18. Do the ORG and END directives produce opcodes?

No

19. Why are ORG and END directives are called pseudocode?

The ORG and END directives gives direction to the assembler

that's why it is also called pseudocode.
20. The ORG and END directives appear in the "lst" file. True

SECTION#2.4
21. Every 8051 family member wakes up at address 0000H when it is
powered up.

22. A programmer puts the first opcode at address 100H. What

happens when the microcontroller is powered up?

This means that it excepts the first opcode to be stored at ROM address
100H.

23. Find the numbers of byte in each of the following instruction.

(a) MOV A,#55H 2 bytes

(b) MOV R3,#03 2 bytes

(c) INC R2 1 byte

(d) ADD A,#0 2 byte

(e) MOV A,R1 1 byte

(f) MOV R3,A 1 byte

(g) ADD A,R2 1 byte

24. Pick up a program listing of your choice, and show the ROM
memory addresses and their contents.

25. Find the address of last location of on-chip ROM for the each of the
following:
(a) DS5000-16

16k bytes of on-chip ROM memory space,we have

16384bytes(16*1024=16384),which gives 0000-3FFFH.

(b) DS5000-8

8K bytes of on-chip ROM memory space,we have 8192

bytes(8*1024),which is 0000-1FFFH.

(c) DS5000-32

32K bytes of on-chip ROM memory space,we have 32768

bytes(32*1024),which is 0000-7FFFH.

(d) AT89C52

8K bytes of on-chip ROM memory space,we have 8192

bytes(8*1024),which is 0000-1FFFH.

(e) 8751

4K bytes of on-chip ROM memory space,we have 4096

bytes(4*1024),which is 0000-0FFFH.

(f) AT89C51

4K bytes of on-chip ROM memory space,we have 4096

bytes(4*1024),which is 0000-0FFFH.

(g) DS5000-64

64K bytes of on-chip ROM memory space,we have 65536

bytes(64*1024),which is 0000-FFFFH.

26. 89C51ED-2 has a program memory space of 64K, What are its first
and last memory addesses?

0000-FFFFH

27. A given 8051 has 7FFFFH as the address of its last location of on-
chip ROM. What is the size of on-chip ROM for this 8051?
32K byte

28. Repeat Question 27 for 3FFH?

16K byte.

SECTION#2.5
29. Compile and state the contents of each ROM location for the
following data

ORG 200H

MYDAT_1: DB "EARTH"
MYDAT_2: DB "987-65"
MYDAT_3: DB "GABEH 9B"
ANSWER:
200=45; 201=61; 202=72; 203=74; 204=68; 205=39; 206=38;

207=37; 208=2D; 209=36; 20A=35; 20B=47; 20C=41; 20D42;

20E=45; 20F=48; 210=20; 211=39; 212=38; 213=00;

30. Compile and state the contents of each ROM location for the
following data

ORG 340H
DAT_1: DB 22,56H,10011001B,32,0F6H,11111011B
ANSWER: 340=16; 342=99; 343=20; 344=F6; 345=FB;

SECTION#2.6
31. The PSW is an 8 bit register.
32. Which bits of PSW are used for the CY and AC flag bits
respectively.

PSW.7,PSW.6
33. Which bits of PSW are used for the 0V and P flag bits, respectively?

PSW.2,PSW.0
34. In the ADD instruction when is CY raised?

It is raised whenver there is carry out from the D7(PSW.7)

35. In the ADD instruction when is AC raised?

It is raised whenever there is carry from D3(PSW.3) to D4(PSW.)

during ADD and SUB operation.
36.What is the value of CY flag after the following code?

CLR C

CPL C

ANS: CY=1

37. Find the CY FLag value after the following code?

(a) MOV A,#54H

ADD A,#0C4H

hex binary

54 0101 010 0

+ C4 +1100 010 0

118 10001 1 0 0 0

This leads to CY=1

(b) . MOV A,#00

ADD A,#0FFH

hex binary

00 0000 0000

+ FF +1111 1111

FF 1111 1111

This leads to CY=0

(c) MOV A,#250

ADD A,#05

. hex binary

250 0010 0101 0000

+ 05 + 0101

255 0 010 0101 0 101

38.write a simple program in which the value 55H is added 5 times.

Code:

Org 00

MOV A,#0

AGAIN ADD A,#55

DJNZ R2,AGAIN

END

SECTION#2.7
39. Which bits of the PSW are responsible for selection of the register
bank?

PSW.3 , PSW.4
40. On power-up what is the location of the first stack?

08

41. In the 8051, which register bank conflicts with the stack?

bank1

42. In the 8051, what is the size of the stack pointer (SP) register?

8bit

43. On power-up which of the register bank is used?

Bank 0
44. Give the addfress location of RAM assigned to various bank.

BANK 0: 0 to 7

BANK 1:8 to 0FH

BANK 2: 10H to 17H

BANK 3: 18H to 1FH

45. Assuming the use of bank 0 find at what RAM location each of the
following lines stored the data.

(a) MOV R4, #32H

RAM location 4 has value 32H

(b) MOV R0, #12H

RAM location 0 has value 12H

(c) MOV R7, #3FH

RAM location 7 has value 3FH

(d) MOV R5, #55H

RAM location 5 has value 55H

46. Repeat Problem 45 for bank 2

(a)RAM location C has value 32H

(b)RAM location 8 has value 12H

(c)RAM location F has value 3FH

(d)RAM location D has value 55H

47. After power-up, show how to select bank 2 with a single

instruction

SET PSW.4

48. Show the stack and stack pointer for each line of the following
program.

ORG 00
MOV R0,#66H
MOV R3,#7FH
MOV R7,#5DH
PUSH 0
PUSH 3
PUSH 7
CLR A
MOV R3,A
MOV R7,A
POP 3
POP 7
POP 0
END
ANSWER: START SP=07
AFTER PUSH 0: AFTER PUSH 3: AFTER PUSH 7:
0A 5D
09 7F 7F
08 66 66 66
SP=08 SP=09 SP=0A
SP=0
AFTER POP 3: AFTER POP 7: AFTER POP 0:
R3=5DH R7=7FH R0=66H
SP=09 SP=08 SP=07
49. In problem 48 does the sequence of POP instruction restore the
original values of registers R0,R3, and R7? if not, show the correct
sequence of instruction.

NO.
POP 7
POP 3
POP 0
50. Show the stack and stack pointer for each line of the following
program.
ORG 0
MOV SP,#70H
MOV R5,#66H
MOV R2,#7FH
MOV R7,#5DH
PUSH 5
PUSH 2
PUSH 7
CLR A
MOV R2,A
MOV R7,A
POP 7
POP 2
POP 5
END
ANSWER: START SP=70H

AFTER PUSH 5: AFTER PUSH 2: AFTER PUSH 7:

73H 5D
72H 7F 7F
71H 66 66 66
SP=71H SP=72H SP=73H
SP=0
AFTER POP 7: AFTER POP 2: AFTER POP 5:
R7=5DH R2=7FH R5=66H
SP=72H SP=71H SP=70H

CH#3
REVIEW QUESTIONS:
SECTION#3.1
1. The mnemonic DJNZ stands for decrement and jump if not zero.
2. "DJNZ R5, BACK" combines a decrement and a jump in a
single instruction. True

3. "JNC HERE" is a 2-byte instruction.

4. In "JZ NEXT", which register content is checked to see if it is zerp?

A
5. LJMP is a 3-byte instruction.

SECTION#3.2
1. What do the mnemonics "LCALL" and "ACALL" stand for?

Long Call and Absolute CALL

2. In the 8051, control can be transferred anywhere within the 64K.

True
3. How does the CPU know where to return to after executing the RET
instruction?

The address of where to return is in the stack.

4. Describe breifly the function of the RET instruction.

Upon executing the RET instruction, the CPU pops off the
top two bytes of the stack into the PC register and starts to
execute from this new location.
5. The LCALL instruction is a 3-byte instruction.

SECTION#3.3
1. In the 8051, the machine cycle lasts 12 clock cycles of the
crystal frequency. True

2. The minimum number of machine cycles needed to execute an

8051 instruction is 1
3. For ques#2 what is the maximum number of cycles neede, and for
which instruction?

MUL and DIV each take 4 machine cycles.

4. Find the machine cycle for a crystal frequency of 12MHz.

12MHz/12= 1MHz, and MC= 1/1 MHz=1 microseconds.

5. Assuming a crystal frequency of 12MHz find the time delay
asspciated with the loop section of following DELAY subroutine.

DELAY: MOV R3,#100

HERE: NOP
NOP
NOP
DJNZ R3,HERE
RET
ANS:
[100(1+1+1+2)]*1microseconds=500mivroseconds=0.5
milliseconds.
6. In the DS89C420/30 the machine cycle lasts 12 clock cycles of the
crystal frequency.

False. It takes 1 clock.

7. Find the machine cycle for DS89C420/30 if the crystal frequency is
11.0592MHz.

11.092MHz /1=11.0592MHz;
MC=1/11.0592MHz=0.0904microsec=90.4microsec.

PROBLEM:
SECTION#3.1
1. In the 8051, looping action with the instruction "DJNZ Rx, rel
address" is limited to 256 iterations.
2. If a conditional jump is not taken, what is the next instruction to
be executed?

The instruction following the jump.

3. In calculating the target address for ajump, a dsiplacement is
added to the contents of register PROGRAM COUNTER (PC)
4. The mnemonics SJMP stands for short jump and it is a 3-
byte instruction.
5. The mnemonics LJMP stands for long jump and it is a 3
byte instruction.
6. What is the advanatage of using SJMP over LJMP?

The advantage of using SJMP over LJMP is that it is 2-byte

instruction which save some bytes of memory in many
applications where memory space is in short supply.
7. The target of a short jump is within -128 to +127 bytes of the
current PC. True

8. All 8051 jumps are short jumps. False

9. Which of the instruction is(are) not a short jump/

(a) JZ ( b) JNC (c) LJMP (d) DJNZ

(c)
10. A short jump is a 2-byte instruction. Why?

Because it saves memory.

11. All conditional jumps are short jumps. True
12. Show a code for a nested loop to perform a action 1000 times?

MOV R6, #10

NEXT: MOV R5, #100
AGAIN: DJNZ R5,AGAIN
DJNZ R6,NEXT
13. Show a code for a nested loop to perform a action of 100,000
times.

MOV R1, #10

NEXT: MOV R2, #100
NEXT_1: MOV R3, #100
AGAIN: DJNZ R3,AGAIN
DJNZ R2,NEXT_1
DJNZ R1,NEXT
14. Find the number of times the following loop is performed.

MOV R6, #200

BACK: MOV R5, #100
HERE: DJNZ R5, HERE
DJNZ R6, BACK

ANSWER: 20,000 times.

15. The target address of a jump backward is a maximum of
-128 bytes from the current PC.

16. The target address of a jump backward is a maximum of

+127 bytes from the current PC.

SECTION#3.2
17. LCALL is a 3 byte instruction.
18. ACALL is a 2 byte instruction.

19. The ACALL target address is limited to 2 byte from the

present PC.
20. The LCALL target address is limited to 64K byte from the
present PC.
21. When LCALL is executed, how many bytes of the stack are
used?

2 byte.
22. When ACALL is executed, how many bytes of the stack are
used?

1 byte.
23. Why do the PUSH and POP instruction in a subroutine need to be
equal in number?

The reason is that the stack keeps track of where the CPU
should return after completing the subroutine and must be
balanced if PUSH and POP instruction.
24. Describe the action assocciated with the POP instruction.

The POP instruction reads a byte from the address indirectly

referenced by the SP register. The value read is stored at the
specified address and the stack pointer is decremented. No
flags are affected by this instruction.

SECTION#3.3
27. Find the system frequency if the machine cycle =1.2microsec.

Machine Cycle(MC)= 1/F

1.2microseconds=1/F
F=1/1.2microseconds
F=833.33KHz
The system frequency is F=833.33KHz.
28. Find the machine cycle if the crystal frequency is 18MHz.

8051 chips
F=18MHz/12=1.5MHz
Machine Cycle(MC)=1/F
MC=1/1.5Mhz=0.6667microseconds.
29. Find the machine cycle if the crystal frequency is 12MHz.

8051 chips
F=12MHz/12=1MHz
Machine Cycle(MC)=1/F
MC=1/1Mhz=1microseconds.
30. Find the machine cycle if the crystal frequency is 25MHz.

8051 chips
F=25MHz/12=2.08MHz
Machine Cycle(MC)=1/F
MC=1/2.08Mhz=0.48microseconds.
31. LJMP and SJMP instruction take the same amount of time
to execute even though one is a 3-byte instruction and the
other is a 2-byt instruction. True
32. Find the time delay for the delay subroutine if the system has an
8051 with frequency of 11.0592 MHz.

F=11.0592/12=921.6KHz
MC=1/F=1/921.6KHz
MC=1.085microseconds.
Machine Cycle

DELAY: MOV R3, #150 1

HERE: NOP 1
NOP 1
NOP 1
DJNZ R3, HERE 2
RET 2
SOL:
There are two instructions outside the HERE loop
[150(1+1+1+2)+3]*1.085microsec=817.00microseconds.
33. Find the time delay for the delay subroutine if the system has an
8051 with frequency of 16 MHz.

F=16/12=1.333MHz
MC=1/F=1/1.333MHz
MC=0.75microseconds.
Machine Cycle
DELAY: MOV R3, #200 1
HERE: NOP 1
NOP 1
NOP 1
DJNZ R3, HERE 2
RET 2
SOL:
There are two instructions outside the HERE loop
[200(1+1+1+2)+3]*0.75microsec=752.25microseconds
34. Find the time delay for the delay subroutine if the system has an
8051 with frequency of 11.0592 MHz.

F=11.0592/12=921.6KHz
MC=1/F=1/921.6KHz
MC=1.085microseconds.
Machine Cycles

DELAY: MOV R5, #100 1

BACK: MOV R2, #200 1
AGAIN MOV R3, #250 1
HERE: NOP 1
NOP 1
DJNZ R3, HERE 2
DJNZ R2, AGAIN 2
DJNZ R5; BACK 2
RET 2
SOL:
TIME DELAY FOR SUBROUTINE:
[100*200*250(1+1+2) ]*1.085microsec=21.76seconds.
35. Find the time delay for the delay subroutine if the system has an
8051 with frequency of 16 MHz.

Machine Cycles

DELAY: MOV R2, #150 1

AGAIN: MOV R3, #250 1
HERE: NOP 1
NOP 1
NOP 1
DJNZ R3, HERE 2
DJNZ R2, AGAIN 2
RET 2

SOL:
F=16/12=1.333MHz
MC=1/F=1/1.333MHz
MC=0.75microseconds.
TIME DELAY:
FOR HERE LOOP: 250*(1+1+1+2)= 1250 MCs
FOR AGAIN LOOP: 150*(1250+1+2)=187950 MCs
THE WHOLE PROGRAM: 187950+1+2=187953 MCs
RESULT: 187953*0.75micro=0.1406seconds.
36. Repeat problem 32 for DS89C420/30.

F=11.0592/1=11.0592MHz
MC=1/F=1/11.0592MHz
MC=90.4nanoseconds.
Machine cycle

DELAY: MOV R3, #150 2

HERE: NOP 1
NOP 1
NOP 1
DJNZ R3, HERE 4
RET 3
SOL:
There are two instructions outside the HERE loop
[150(1+1+1+4)+5]*90.4nanosec=95.572microseconds.
37. Repeat problem 33 for DS89C420/30.
F=16/1=16MHz
MC=1/F=1/16MHz
MC=62.5nanoseconds.
Machine Cycle

DELAY: MOV R3, #200 2

HERE: NOP 1
NOP 1
NOP 1
DJNZ R3, HERE 4
RET 3
SOL:
[200(1+1+1+4)+3]*62.5nanosec=87.68microseconds

38. Repeat problem 34 for DS89C420/30.

Machine Cycles

DELAY: MOV R5, #100 2

BACK: MOV R2, #200 2
AGAIN MOV R3, #250 2
HERE: NOP 1
NOP 1
DJNZ R3, HERE 4
DJNZ R2, AGAIN 4
DJNZ R5; BACK 4
RET 3
SOL:
F=11.0592MHz/1= 11.0592MHz
MC= 1/F= 1/11.0592MHz
MC=90.4nanoseconds
TIME DELAY FOR SUBROUTINE:
[100*200*250(1+1+4)]*90.4nanosec=2.712seconds.

39. Repeat problem 35 for DS89C420/30.

Machine Cycle

DELAY: MOV R2, #150 2

AGAIN: MOV R3, #250 2
HERE: NOP 1
NOP 1
NOP 1
DJNZ R3, HERE 4
DJNZ R2, AGAIN 4
RET 3
SOL:
F=16MHz/1= 16MHz
MC=1/F
MC=1/16MHz=62.5nanoseconds
TIME DELAY:
[150*250(1+1+1+4)]*62.5nanoseconds=0.0164seconds.
40. In an AT89C51-based system explain performace if we replace
the AT89C51 chip with a DS89C420/30. Is it 12 times faster?

TheDS89C420/30 has a higest performance.It features a

redesigned processor core that executes every
8051ninstruction. Yes it is 12 times faster than the original for
the same crystal speed. It offers a max crystal speed of
33MHz.