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Pin Configuration of 8085

The 8085 microprocessor has 40 pins that are used for various functions: 1. Power supply and clock signals include Vcc, Vss, and crystal connections X1 and X2 for the internal clock generator. 2. The address bus consists of pins for the most significant 8 address bits A8-A15. 3. The multiplexed address/data bus uses pins AD0-AD7 to carry the lower order address bits or data. 4. Control and status signals control memory/I/O access with pins like ALE, RD, WR and IO/M. 5. Interrupts and status signals provide information on the microprocessor's current operations.

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164 views

Pin Configuration of 8085

The 8085 microprocessor has 40 pins that are used for various functions: 1. Power supply and clock signals include Vcc, Vss, and crystal connections X1 and X2 for the internal clock generator. 2. The address bus consists of pins for the most significant 8 address bits A8-A15. 3. The multiplexed address/data bus uses pins AD0-AD7 to carry the lower order address bits or data. 4. Control and status signals control memory/I/O access with pins like ALE, RD, WR and IO/M. 5. Interrupts and status signals provide information on the microprocessor's current operations.

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sarthak
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PIN CONFIGURATION OF 8085

8085 is a 40 pin IC, DIP package. The signals from the pins can be grouped as follows

1. Power supply and clock signals


2. Address bus
3. Data bus
4. Control and status signals
5. Interrupts and externally initiated signals
6. Serial I/O ports
1. Power supply and Clock frequency signals:

Vcc + 5 volt power supply


Vss Ground
X1, X2 : Crystal or R/C network or LC network connections to set the frequency of
internal clock generator.
The frequency is internally divided by two. Since the basic operating timing frequency is 3
MHz, a 6 MHz crystal is connected externally.
CLK (output)-Clock Output is used as the system clock for peripheral and
devices interfaced with the microprocessor.

2. Address Bus:

A8 - A15 (output; 3-state)


It carries the most significant 8 bits of the memory address or the 8 bits of the I/O address;

3. Multiplexed Address / Data Bus:

AD0 - AD7 (input/output; 3-state)


These multiplexed set of lines used to carry the lower order 8 bit address as well as data bus.
During the opcode fetch operation, in the first clock cycle, the lines deliver the lower
order address A0 - A7.
In the subsequent IO / memory, read / write clock cycle the lines are used as data bus.
The CPU may read or write out data through these lines.

4. Control and Status signals:

ALE (output) - Address Latch Enable.


This signal helps to capture the lower order address presented on the multiplexed address /
data bus.
RD (output 3-state, active low) - Read memory or IO device.
This indicates that the selected memory location or I/O device is to be read and that the data
bus is ready for accepting data from the memory or I/O device.
WR (output 3-state, active low) - Write memory or IO device.
This indicates that the data on the data bus is to be written into the selected memory location
or I/O device.
IO/M (output) - Select memory or an IO device.
This status signal indicates that the read / write operation relates to whether the memory or
I/O device.
It goes high to indicate an I/O operation.
It goes low for memory operations.
5. Status Signals:

It is used to know the type of current operation of the microprocessor.

Source : http://nprcet.org/e%20content/Misc/e-Learning/IT/IV%20Sem/CS%202252-Microprocessors%
20and%20Microcontrollers.pdf

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