DLD Syllabus
DLD Syllabus
Chapter 5:
Topics:
Figure 5-16
Figure 5-21
+ figure 5-23
9. Internal circuitry of the edge triggered J-K flip-flop
+ figure 5-25
+ figure 5-29
17. Serial data transfer: Shift registers ---------3 star ----- LAB
19. Clock generator circuits ------ # mark (Sir bolsilen somoi takle alochona korben)
20. Schmitt-trigger oscillator ----- # mark (Sir bolsilen somoi takle alochona korben)
Chapter 6:
Topics:
1. Binary Addition
+ Examples
6. Sign extension
7. Negation
+ Examples
+ Table + examples
Chapter 7:
topics:
+ figure 7-5
+ figure 7-10
+ figure 7-20
Chapter 9:
Topics:
+ figure 9-14
8. Four-input multiplexers
9. Eight-input multiplexers
#Topics that you have tick marked from the "Table of Contents":
9-1 Decoders
LAB:
Asynchronous, Synchronous, BCD to decimal decoder, D flip-flop, decimal to BCD encoder,
Full adder using half adder, master JK flip-flop, Decoder, Encoder, demultiplexer.
Multiplexer, SR flip-flop, full adder, half adder.
Digital logic: Boolean algebra, De Morgan’s Theorems, logic gates and their trust tables,
canonical forms, combination logic circuits, minimization techniques; Arithmetic and data
handling logic circuits, decoders and encoders, multiplexers and demultiplexers;
Combinational circuit design; Flip-flops, race around problems; Counters asynchronous
counters, synchronous counters and their applications; PLA design; Synchronous and
asynchronous logic design; State diagram, Mealy and Moore machines; State
minimizations and assignments; Pulse mode logic; Fundamental mode design.