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Unit Iii Motorola 68HC11 Architecture

The document discusses the architecture of the Motorola 68HC11 microcontroller. It describes the microcontroller's basic blocks including EPROM, RAM, serial interfaces, parallel I/O interface, clock logic, interrupt logic, and timer interrupts. The microcontroller has four 8-bit I/O ports that interact with external devices. It can run in single-chip or expanded mode, affecting the available I/O ports. Interrupts and timers are used for real-time responses to events.
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0% found this document useful (0 votes)
101 views25 pages

Unit Iii Motorola 68HC11 Architecture

The document discusses the architecture of the Motorola 68HC11 microcontroller. It describes the microcontroller's basic blocks including EPROM, RAM, serial interfaces, parallel I/O interface, clock logic, interrupt logic, and timer interrupts. The microcontroller has four 8-bit I/O ports that interact with external devices. It can run in single-chip or expanded mode, affecting the available I/O ports. Interrupts and timers are used for real-time responses to events.
Copyright
© Attribution Non-Commercial (BY-NC)
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as PDF, TXT or read online on Scribd
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UNIT III Motorola 68HC11 Architecture The MicroStamp11 module is built around the Motorola 68HC11 microcontroller IC. In order to program the MicroStamp11, you'll need to have a closer look at the 68HC11's architecture. The 68HC11's basic architectural blocks are shown in figure 3. This figure explicitly shows the peripheral subsystems in the Motorola 68HC11 micro-controller and it shows which pins those subsystems are tied to.

Figure 3: 68HC11 Architecture

From figure 3, we see that the 68HC11 has a number of pins. Some of these pins are used to control the micro-controller's operating mode, clock logic, special interrupts, or power. The majority of the pins, however, have been organized into four 8-bit input/output ports. These ports have the logical names PORTA, PORTB , PORTC, and PORTD. It is through these four ports that the 68HC11 channels most of its interactions with the outside world. As mentioned earlier, a micro-controller is often distinguished by the fact that its input/output devices are directly mapped into RAM. This is also true of the I/O ports in the 68HC11. The logical names for the I/O ports are associated with absolute addresses in RAM and these addresses are in turn tied to hardware registers. When an input pin, for example, is set to a high
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logical level, then that logic level directly sets the value in the port's hardware register. Since that hardware register is mapped directly into the micro-controller's address space, a program can then directly read that register's value by accessing memory. The I/O ports and other device pins are connected to special subsystems in the 68HC11. The subsystems shown in figure 3 are briefly described below:

EPROM: Some versions of the 68HC11 have as much as 4 kilo-bytes of internal EEPROM. If your program is sufficiently small, then your micro-controller system would not need external memory chips and could be operated in single-chip mode. RAM: The version of the 68HC11 in your MicroStamp11 has 256 bytes of internal RAM. As mentioned above, some of these bytes are mapped into hardware registers that are used to control the microcontroller. In reality the MicroStamp11 programmer only has 192 bytes of RAM that can be used for program variables. Serial Peripheral Interface (SPI): This subsystem allows the 68HC11 to communicate with synchronous serial devices such as serial/parallel slave devices. Serial Communication Interface (SCI): This subsystem allows the 68HC11 to communicate with asynchronous serial devices. The SCI interface is used to communicate with laptop computers. Parallel I/O Interface: This subsystem is generally used to provide the 68HC11 with a way of writing digital data in parallel to an external device. The usual parallel device is a memory device. Recall that the 68HC11 has a very limited amount of internal program memory. If we need to augment the EEPROM in the micro-controller with additional memory, we use the parallel I/O interface to address, read, and write data to this external memory chip. When we do this we usually operate the chip in so-called expanded mode. Running the chip in expanded mode greatly reduces the number of I/O Ports available to the system. This is because PORTB and PORTC are connected to the memory chip and hence are unavailable for other external devices. Since the MicroStamp11 uses an external memory chip, it is running the 68HC11 in expanded mode and hence only PORTA and PORTD can be used by the programmer for interfacing with the external world. Mode Selection System: This subsystem selects whether the 68HC11 runs in expanded or single-chip mode. In single chip mode, the
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68HC11 allows the user to have complete control over all four I/O ports. In expanded mode, the 68HC11 uses ports B and C to address, read, and write to external memory, hence the programmer can only use PORTA and PORTD. In the MicroStamp11 module, the chip is usually in expanded mode. Clock logic: An important feature of micro-controllers is that they work in real-time. By real-time, we mean that instruction executions are completed by specified time deadlines. This means that the microcontroller needs a clock. The clock logic subsystem provides the realtime clock for the 68HC11. The rate of the clock is determined by a crystal that is connected to the clock logic pins. The MicroStamp11 has a crystal on the module, so these pins are not available to the programmer. Interrupt Logic: Micro-controllers must be able to respond quickly to asynchronous events. The interrupt logic subsystems provides three pins that can be used to trigger hardware interrupts. A hardware interrupt automatically transfers software execution to a specified memory address in response to the hardware event (such as the pin's logic state going low). We say that this interrupt is generated asynchronously because the event can occur between ticks of the system's real-time clock. Hardware interrupts provide a means for assuring that micro-controllers respond in a timely manner to external events. Timer Interrupts: This subsystem generates interrupts that are associated with an internal timer. Remember that the 68HC11 executes instructions in step with a clock tick provided by the clock logic subsystem. With each tick of the clock, an internal register called a timer is incremented. This timer is memory mapped to an address in RAM with the logical name TCNT. SO at any instant you can fetch the current count (time) on the timer by simply reading TCNT. There are two types of interrupts associated with TCNT. An inputcompare (IC) interrupt is generated with a specified input pin changes state. When the IC interrupt occurs, then the value in TCNT is stored in an input-compare register. This register is also memory mapped so the programmer can easily read the clock tick when the input event occurred. Input compare events are often used to make very precise timing measurements.
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The other type of timer interrupt is called an output compare (OC) interrupt. The output compare event occurs when TCNT matches the value stored in an output compare register. The output compar register is also memory mapped, so its value can be easily set by the programmer. Output compare events are often used to force the micro-controller to respond to timed events.
Registers:

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Addressing Modes:

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Instruction Set:

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Programs:

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Parallel I/O Ports

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