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Note 04 Gates Matrix PDF

The document discusses basic digital logic gates and their functions. It introduces common logic gates like AND, OR, NOT, NAND, NOR, XOR and XNOR. It explains their truth tables and symbol representations. It also covers buffers, tri-state buffers and ways to represent binary input and output states as vector matrices.

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0% found this document useful (0 votes)
60 views

Note 04 Gates Matrix PDF

The document discusses basic digital logic gates and their functions. It introduces common logic gates like AND, OR, NOT, NAND, NOR, XOR and XNOR. It explains their truth tables and symbol representations. It also covers buffers, tri-state buffers and ways to represent binary input and output states as vector matrices.

Uploaded by

chaci
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as PDF, TXT or read online on Scribd
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Note_04_Gates & Matrix PHYS 355 Electronics September 2020

Computer operation.
The basic operation of a computer is to move binary information among registers fast and in large
quantities. The control of the movement is done by gates plus a program language that the computer
understands. The binary bit is often referred to as logic “0” and logic “1”, or high and low in terms of
voltages. In TTL (transistor-transistor logics) logic“0” is 0~0.8V, and logic “1” is 2.0~5.0 V. There is no
confusion here, since there are only two distinct states with a relatively large voltage gap.
The gates perform a go no-go function implemented by some transistor/diode/resistor circuit. The
circuitry may be complicated. The gates in this discussion are commercially available.
Beyond the gates there are registers or counters, multiplexer and others. In general these devices have
terminals for inputs, outputs, and controls as well as power supply. In all logic diagrams, the power
supply is left out for clarity. For now let's not worry about the detail of the input/output characteristics
(impedance).

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OR and AND gates

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At the inputs we connect a voltage source (hi or lo). At the output we connect a voltmeter to observe the

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output voltage (hi or lo). Symbolically A and B are the inputs and F is the output. The functional
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relationship is defined by the TRUTH table and is implemented by the built-in electronics.
Logic “1” is often labeled as TRUE, and logic “0” as FALSE.
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A B F F=A+B A B F F=A B
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0 0 0 0 0 0
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0 1 1 A 0 1 0 A
B F F
1 0 1 1 0 0 B
1 1 1 1 1 1
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These are hardware devices. The input A & B can be thought of as an event and the output F as the
outcome. The logic is pretty straight forward. The OR function is indicated by a + sign. The AND
is

function is indicated by a dot (multiplication).


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INVERTER
A F F=A
0 1
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1 0 A F

An over score is used to indicate the complement of a variable. A standard IC usually houses 6 inverters
in one chip. For example if we wish generate the 1’s complement of a binary number, an inverter can be
placed at each of the output digits.

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Note_04_Gates & Matrix PHYS 355 Electronics September 2020

NOR and NAND gates


The output is the complement of OR/AND. The little circle at the output is an inverter. NAND gates have
fewer components inside the chip than AND gates.

A B F F=A+B A B F F=A B
0 0 1 0 0 1
0 1 0 A 0 1 1 A
F B F
1 0 0 B 1 0 1
1 1 0 1 1 0

BUFFER
Sometime it is necessary to have a one-to-many connection. A buffer will provide more current sinking or
sourcing to the many subsequent inputs.

A F F=A
0 0

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1 1 F

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TRI-STATE
A tri-state buffer has an extra control pin. When En  1, the signal passes right through. When En  0,

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the output is put in a high impedance state, which effectively isolate the input from the output. The output
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Z means hi-Z.
En A F F=En A+En Z
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0 Z
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0 En
1 Z
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0 0
1 A F
1 1
XOR and XNOR X  F = 1 only when A is different from B.
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A B F F=A+B A B F F=A B
0 0 0 0 0 1
0 1 1 A 0 1 0 A
1 0 1 F 1 0 0 F
B B
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1 1 0 1 1 1
Th
sh

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Note_04_Gates & Matrix PHYS 355 Electronics September 2020

States
Binary numbers are displayed as a bit pattern. We would like to describe the pattern as an object so we can
manipulate it in a mathematical fashion. We represent the state of an input or output with a ket symbol
borrowed from quantum mechanics. An input has a one-bit pattern, and is represented by |a which has
two possible states: |a = |0 or |1 .

Each state is unique and can be represented by a 2-dimensional unit vector. |0 = 1 |1 = 0


0 1
It is customary to represent a base vector as a single column matrix. (or a row matrix if so preferred). The
order in which the 1 and 0 are placed in the column is by convention. For the state |0 the "1" is placed on
the top of the column.
|a 1 0
Furthermore, we can combine the two mutually exclusive vectors as a 2 by 2 matrix. 0 1
A 2-bit pattern has 4 possible states.

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1 0 0 0

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1 0 0 0
0 1 0 , 0
|a,b =|00 ,|01 ,|10 , |11 = , , 0 1 0 0

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0 0 1 0

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0 0 1 0
0 0 0 1 0 0 0 1

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The 4 states can be represented by 4 unit vectors in a 4-dimensional space. They can be compacted into a
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4x4 matrix in a similar fashion as in the case of a single bit pattern |a .
For 3 variables there will be 8 input states, represented by an 8 by 8 matrix.
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Logic Matrix
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The 2-input OR gate is represented by: F = A+B, where the + sign is defined by the TRUTH table. The
truth table is a look up table. Can we establish some mathematical (or functional) relationship between
the inputs and the output?
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 F (input )  An expression that depends on the inputs


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In the 2-input gates, we can write:  .


 Proposed F ( A, B)  c1 ( AB)  c2 ( AB)  c3 ( AB)  c4 ( AB)

 AB   c1 
is

   
 c2  AB AB AB AB
In matrix form we would write
 AB 
FOR ( A, B)   c1 c2 c3 c4    or  
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 c3 
 AB   
 AB   c4 
 

A B F
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0 0 0
0 1 1 The truth table prompts us to choose the coefficients c1 , c2 , c3 , c4 as 0, 1, 1, 1
1 0 1
1 1 1

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Note_04_Gates & Matrix PHYS 355 Electronics September 2020

FOR ( A, B)  0 ( AB)  1 ( AB)  1 ( AB)  1 ( AB), sum of products


Check it out with all possible input combinations. It checks out ok.
 FOR (0,0)  0 (11)  1 (10)  1 (01)  1 (00)  0

 FOR (0,1)  0 (10)  1 (11)  1 (00)  1 (01)  1

 FOR (1,0)  0 (01)  1 (00)  1 (11)  1 (10)  1
 F (1,1)  0 (00)  1 (01)  1 (10)  1 (11)  1
 OR

The truth table can be replaced by a function (matrix format). FOR  ( matrix op )( state variables)

Logic State Matrix (operators)


Using the concept of states, we can use matrix operation on the variables.

The proposed (OR) operator is (OR)= 1 0 0 0 The input state is a 4 by 4 matrix.


0 1 1 1

1 0 0 0
0 1 0 0 1 0 0 0
(OR) |a,b = 1 0 0 0 = |0 ,|1 ,|1 ,|1 =F

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=

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0 1 1 1 0 0 1 0 0 1 1 1
0 0 0 1

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Regular matrix multiplication, (row)  (column) yield the output matrix. Then transform back to states.

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The 4 output states agree with the TRUTH table of an OR gate.
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The matrix multiplication is trivial since |a,b is unity matrix.

(AND)= 1 1 1 0
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By inspection the (AND) operator for a 2-input AND gate is: 0 0 0 1


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1 1 1 0
(AND)|a,b = 1 1 1 0 = 0 0 0 1 = |0 ,|0 ,|0 ,|1
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unity
0 0 0 1 A B F
0 0 0
0 1 0
The result checked out with the TRUTH table of an AND gate. 1 0 0
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1 1 1
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More logic matrix operations 0 1


(NOT) =
1 0
The (NOT) operator for a 2-state function is,
is

|0 |1 |1 |0
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0 1 0 1 1 0
Operation: (NOT) | a = = each state becomes its complement.
1 0 1 0 0 1
|1 |0
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1 1 1 0 0 0 0 1
On a 4-state function (NOT)(AND) = 0 1 = = (NAND) operator
1 0 0 0 0 1 1 1 1 0

1 0 0 0 A B A B
0 1 0 0 0 0 0 1 0 0 1
(NAND)|a,b = 0 0 0 1 = = |1 ,|1 ,|1 ,|0 0 1 1
1 1 1 0 0 0 1 0 1 1 1 0
0 0 0 1 1 0 1
1 1 0
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Note_04_Gates & Matrix PHYS 355 Electronics September 2020

We need to exercise some common sense when using the operators. It is okay to write (NOT) | a ,

as the complement of the state|a . But it makes little sense to write (NOT) | ab , since there is no
complement to a 4-state. Also the operators (AND)(AND) or (AND)(OR) make no sense.

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Th
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