Course Outline

Faculty School of Science, Engineering & Technology

Department Computer Science & Engineering (CSE)

Programme B.Sc. in CSE

Course Code CSE-2329

Course Title Digital Logic Design

Course Type
Basic Science and Engineering

Year/Level/Semester 2nd year/ Undergraduate level/ 3rd Semester

Academic Session 2023

Name of the Instructor

Tanvir Ahmed

Pre-requisites (if any) EEE-1103

Credit Value 2
Contact Hours 2

✓ To obtain the knowledge of designing digital circuit based on logic theories.

Course Objective

This course covers the basics of Boolean algebra and logic design and their
implementations in designing digital circuit design like combinational circuits, sequential
Course Synopsis circuits, flip-flops, memories etc. Emphasis will be given to problem solving, projects
and lab experiments so that the students can acquire the basics of circuits of computing
devices and memories.
Program Outcomes (POs) of B. Sc. in CSE Program

At the end of the program, students will be able to

PO1 Engineering Knowledge (Cognitive): Apply the knowledge of mathematics, science,
engineering fundamentals and an engineering specialization to the solution of complex
engineering problems.
PO2 Problem Analysis (Cognitive): Identify, formulate, research the literature and analyze
complex engineering problems and reach substantiated conclusions using first principles of
mathematics, the natural sciences and the engineering sciences.
PO3 Design/Development of Solutions (Cognitive, Affective): Design solutions for complex
engineering problems and design system components or processes that meet the specified needs
with appropriate consideration for public health and safety as well as cultural, societal and
environmental concerns.
PO4 Investigation (Cognitive, Psychomotor): Conduct investigations of complex problems,
considering design of experiments, analysis and interpretation of data and synthesis of
information to provide valid conclusions.
PO5 Modern Tool Usage (Psychomotor, Cognitive): Create, select and apply appropriate
techniques, resources and modern engineering and IT tools including prediction and modeling
to complex engineering activities with an understanding of the limitations.
PO6 The Engineer and Society (Affective): Apply reasoning informed by contextual
knowledge to assess societal, health, safety, legal and cultural issues and the consequent
responsibilities relevant to professional engineering practice.
PO7 Environment and Sustainability (Affective, Cognitive): Understand the impact of
professional engineering solutions in societal and environmental contexts and demonstrate the
knowledge of, and need for sustainable development.
PO8 Ethics (Affective): Apply ethical principles and commit to professional ethics,
responsibilities and the norms of the engineering practice.
PO9 Individual Work and Teamwork (Psychomotor, Affective): Function effectively as an
individual and as a member or leader of diverse teams as well as in multidisciplinary settings.
PO10 Communication (Psychomotor, Affective): Communicate effectively about complex
engineering activities with the engineering community and with society at large. Be able to
comprehend and write effective reports, design documentation, make effective presentations and
give and receive clear instructions.
PO11 Project Management and Finance (Cognitive, Psychomotor): Demonstrate knowledge and
understanding of the engineering and management principles and apply these to one’s own work
as a member or a leader of a team to manage projects in multidisciplinary environments.
PO12 Life-Long Learning (Affective, Psychomotor): Recognize the need for and have the
preparation and ability to engage in independent, life-long learning in the broadest context of
technological change.
Course Learning Outcome:

By the end of this course students will be able to

CLO1 Implement the knowledge of Boolean algebra and logic gates in circuit design.
CLO2 Design digital electronic circuits from elementary to tertiary level.

Mapping Alignment of CLOs and PLOs

Program Learning Outcomes (PLOs)

Course PLO1 PLO2 PLO3 PLO4 PLO5 PLO6 PLO7 PLO8 PLO9 PLO10 PLO11 PLO12
Learning
Outcome
(CLOs)
CLO 1 3 3 3 2 1 1 1 1 1 2

CLO 2 2 2 3 2 3 1 1 2 2 2 2

3-Strong Correlation, 2- Medium Correlation, 1- Low Correlation

Course Plan & Mapping

Week Topic Teaching Assessment Mapping

Learning Strategy with
Strategy CLO
Lecture, Class
Introduction to the course: Interactive participation,
Week-1 Explanation of the Course Outline CLO 1
Discussion, Quiz
[3 Hours] Number system, binary codes, binary Problem Solve
logics, logic gates
Lecture, Class
Week-2 Boolean algebra, canonical and standard Interactive participation, CLO 1
[3 Hours] forms. Discussion, Quiz
Problem Solve
Lecture, Class
The Map Method. Two-, Three-, Four-, Interactive participation,
Week-3 Discussion, Quiz, CLO 1
Five And Six- variable Maps, Product of
[3 Hours] Problem Solve Assignment CLO 2
Sum Simplification

NAND And NOR Implementation, Class

Don’t Care Conditions, Multilevel Lecture, participation,
CLO 1
Week-4 Interactive Quiz
NAND Circuits, Multilevel NOR
[3 Hours] Discussion,
Circuits, Exclusive-or and Equivalence
Problem Solve
Functions
Lecture, Class
Design Procedure, Adders, Subtractors, Interactive participation,
Week-5 Code Conversion, Analysis Procedure, CLO 2
Discussion, Quiz
[3 Hours] designing various types of combinational Problem Solve
circuit using logic gates.
Week-6 Review of week 1 to week 5 classes
Mid Term Exam
Lecture, Class
MSI and LSI, Binary Parallel Adder, Interactive participation,
Week-7 look ahead carry, decimal Adder, CLO 1
Discussion, Quiz
[3 Hours] Magnitude Comparator, decoder, Problem Solve
encoder, multiplexer& demultiplexer.
Lecture, Class
Flip-flops, triggering of flip-flops, Interactive participation, CLO 1
Week-8
analysis of clocked Sequential circuits, Discussion, Quiz
[3 Hours]
state reduction and Assignment, Problem Solve
Design procedure, design with state Lecture, Class
Week-9 Interactive participation,
equations, designing various types of
[3 Hours] Discussion, Quiz CLO 2
sequential circuits. Problem Solve Assignment
Bipolar transistor characteristics, RTL, Class
Lecture, participation,
Week-10 DTL, Integrated-Injection logic, emitter
Interactive Quiz CLO1
[3 Hours] couple logic, metal-oxide Discussion,
semiconductor, complementary MOS. Problem Solve
Lecture, Class
Registers, shift registers, ripple counters, Interactive participation,
Week-11 CLO 1
asynchronous counter, synchronous Discussion, Quiz
[3 Hours] Problem Solve
counter.

Memory, read only memory, Lecture, Class

Week-12 Interactive participation,
programmable logic array, random CLO 1
[3 Hours] Discussion, Quiz
access memory, memory unit. Problem Solve
Inter register transfer, arithmetic-logic Lecture, Class
and shift-operations, design a simple Interactive participation,
Week-13 Presentation CLO 1
computer, processor organization, Discussion,
CLO 2
[3 Hours]
arithmetic logic unit, design of arithmetic Problem Solve
logic unit, design of accumulator.
Review of week 7 to week 13 classes
Week-14
Final Term Exam

Course Assessment & Evaluation:

IE- Continuous Internal Evaluation SMEE- Semester Mid & End

(20 Marks) Examination
Total Marks (100) (80 Marks)
Class
Class MID TERM FINAL
Test/Quizzes
Participation EXAMINATION EXAMINATION
10 10 30 50
Bloom;s Catagory
Remember 5 2 5 10
Understand 5 2 5 5
Apply 2 5 10
Analyze 2 5 10
Evaluate 2 5 5
Create 5 10

The respective students need to apply through prescribed application

forms for appearing in any make-up examinations for the final exam
during the announced period after publication of the semester final results.
Make up Procedures Examinations would be arranged as per the Academic Calendar and
notified Make-up Exam Schedule. A Make-up Exam will be held on a new
set of questions. Additionally, students are advised to contact with the
Controller of Examinations office for more information in this regard.

Recommended Readings:
1. Mano, M. Morris. Digital logic and computer design. Pearson Education India, 2017.
2. Floyd, Thomas L. Digital fundamentals, 10/e. Pearson Education India, 2011.
Suggested/supplementary Readings:

Other Sources:
Prepared by: Checked by: Approved by:

Tanvir Ahmed

Course Instructor Signature of The Signature of The Dean

Chairman/Head