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Instruction Format: Single Accumulator Organization

The document discusses different instruction formats used in computer systems. It describes four main types: three address, two address, one address, and zero address formats. The three address format uses three operand fields that can be memory addresses or registers. The two address format commonly uses two address fields plus one operand field. The one address format implies an accumulator register and uses only one address field. The zero address format is used in stack-organized computers and does not include any operand fields.

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246 views

Instruction Format: Single Accumulator Organization

The document discusses different instruction formats used in computer systems. It describes four main types: three address, two address, one address, and zero address formats. The three address format uses three operand fields that can be memory addresses or registers. The two address format commonly uses two address fields plus one operand field. The one address format implies an accumulator register and uses only one address field. The zero address format is used in stack-organized computers and does not include any operand fields.

Uploaded by

Hamdan
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
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Download as PDF, TXT or read online on Scribd
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Instruction Format

The instruction format is depicted in a rectangular box, symbolizing the instruction bits in
memory words or a control register. The bits grouped are divided into three parts:

1. Addressing Mode: The addressing mode indicates how the data is represented.
2. Opcode: The opcode part indicates the operation type on the data.
3. Operand: The operand part indicates either the data or the address of the data.

A computer performs a task based on the instruction provided. Instruction in computers


comprises groups called fields. These fields contain different information as for computers
everything is in 0 and 1 so each field has different significance based on which a CPU decides
what to perform.
Instruction is of variable length depending upon the number of addresses it contains.
Generally, CPU organization is of three types based on the number of address fields:
1. Single Accumulator organization
2. General register organization
3. Stack organization

Single Accumulator Organization


All the operations on a system are performed with an implied accumulator register. The
instruction format in this type of computer uses one address field.
For example, the instruction for arithmetic addition is defined by an assembly language
instruction ‘ADD.’
Where X is the operand’s address, the ADD instruction results in the operation.
AC ← AC + M*X+.
AC is the accumulator register, M[X] symbolizes the memory word located at address

General Register Organization


The general register type computers employ two or three address fields in their instruction
format. Each address field specifies a processor register or a memory. An instruction
symbolized by ADD R1, X specifies the operation R1 ← R + M *X+.
This instruction has two address fields: register R1 and memory address X.

Stack Organization
A computer with a stack organization has PUSH and POP instructions that require an address
field. Hence, the instruction PUSH X pushes the word at address X to the top of the stack. The
stack pointer updates automatically. In stack-organized computers, the operation type
instructions don’t require an address field as the operation is performed on the two items on
the top of the stack.

Types of Instruction Formats


1. Three address instruction
2. Two address instruction
3. One address instruction
4. Zero address instruction

Three Address Instruction


The format of a three address instruction requires three operand fields. These three fields can
be either memory addresses or registers.

Example: The program in assembly language X = (A + B) ∗ (C + D) Consider the instructions given


below that explain each instruction's register transfer operation.

ADD R1, A, B R1 ← M *A+ + M *B+


ADD R2, C, D R2 ← M *C+ + M *D+
MUL X, R1, R2 M *X+ ← R1 ∗ R2

Two processor registers, R1 and R2.


The symbol M [A] denotes the operand at memory address symbolized by A. The operand1 and
operand2 contain the data or address that the CPU will operate. Operand 3 contains the
result’s address.

Two Address Instructions


This instruction is most commonly used in commercial computers. This address instruction
format has three operand fields. The two address fields can either be memory addresses or
registers.
Example: The program to evaluate X = (A + B) ∗ (C + D) is as follows:

MOV R1, A R1 ← M *A+


ADD R1, B R1 ← R1 + M *B+
MOV R2, C R2 ← M *C+
ADD R2, D R2 ← R2 + M *D+
MUL R1, R2 R1 ← R1∗R2
MOV X, R1 M *X+ ← R1

The MOV instruction transfers the operands to the memory from the processor registers. R1,
R2 registers.

One Address Instruction


This instruction uses an implied accumulator for data manipulation operations. An accumulator
is a register used by the CPU to perform logical operations. In one address instruction, the
accumulator is implied, and hence, it does not require an explicit reference. For multiplication
and division, there is a need for a second register. However, here we will neglect the second
register and assume that the accumulator contains the result of all the operations.

Example: The program to evaluate X = (A + B) ∗ (C + D) is as follows:

LOAD A AC ← M *A+
ADD B AC ← A *C+ + M *B+
STORE T M *T+ ← AC
LOAD C AC ← M *C+
ADD D AC ← AC + M *D+
MUL T AC ← AC ∗ M [T]
STORE X M *X+ ← AC

All operations are done between the accumulator(AC) register and a memory operand.
M[ ] is any memory location.
M[T] addresses a temporary memory location for storing the intermediate result.
This instruction format has only one operand field. This address field uses two special
instructions to perform data transfer, namely:
 LOAD: This is used to transfer the data to the accumulator.
 STORE: This is used to move the data from the accumulator to the memory.

Zero Address Instruction


This instruction does not have an operand field, and the location of operands is implicitly
represented. The stack-organized computer system supports these instructions. To evaluate the
arithmetic expression, it is required to convert it into reverse polish notation.

Example: Consider the below operations, which shows how X = (A + B) ∗ (C + D) expression will
be written for a stack-organized computer.

TOS: Top of the Stack


PUSH A TOS ← A
PUSH B TOS ← B
ADD TOS ← (A + B)
PUSH C TOS ← C
PUSH D TOS ← D
ADD TOS ← (C + D)
MUL TOS ← (C + D) ∗ (A + B)
POP X M *X+ ← TOS

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