STANDARDIZATION OF

CIRCUITS - 2019
REPORT ON STANDARDIZATION OF THE TYPICAL CIRCUITS
FOR ELECTRONIC INTERLOCKING

[Report No.- SS/155/2019]

[RESEARCH DESIGN AND STANDARDS ORGANIZATION]

[MINISTRY OF RAILWAYS]
Phone : 0522 - 2456389
~~.~~
~ ~ 3ltx +iACP ~
Fax: 0522 - 2462635
~-226011
E-mail: [email protected]
Government of India - Ministry of Railways
Research Designs & Standards Organisation
LUCKNOW - 226011

No. STS/E/Signailing Principles Vol-III ~ 'f Date: 1<l.1 0.2019

Secretary/Signal,
Railway Board,
Rail Bhawan,
New Delhi.
(Kind Attention:- Shri AS.Tomar, DirectorlSignal)

Sub: Report on Standardisation of the Typical Circuits For EI.

Ref: Railway Board's letter No. 2018/Sig/36-SD/1 Dated- 14 November 2018.

In reference to above, during conference on "Standardization of Signalling

Drawing" held on 30th Oct. 2018 at Western Railway, Mumbai, a Committee of the
following member was nominated to work with RDSO for finalization of the Typical
Circuits for Electronic Interlocking:

1. Shri S. Khandelwal - CSTE/Con.lNorth/ECR (Convener)

Presently (EDIT elecom/RDSO) (Member)
2. Shri V. K. Pandey Dy. CSTE (Pig) NR (Member)
3. Shri Siddhu Yadav Dy. CSTE/P&D/NCR
4. Shri M. M. Waris - Jt. Dir.lSignal-III/RDSO (Secretary)

In this connection the committee after round of discussions and meetings had
drafted a report which was circulated on 23 April 2019 to Zonal Railways and all EI
firm's for scrutiny and comments. The major issues covered in the draft report were
also presented during PCSTE conference held on 27.07.2019 at Guwahati.

Thereafter the comments were received from Zonal Railways and all EI firms
which was scrutinized by the committee. The deliberation was followed by a meeting
with all EI vendors on 04 July 2019 regarding incorporation of some specific
suggestions received from Zonal Railways and their feasibility in existing Electronic
Interlocking systems.

Based on above the committee has finalized the typical logics for Electronic
Interlocking. The para-wise decision of the committee on the recommendation given
in the Railway Board's letter under reference is appended in Annexure of the report.
The same is being send to you for further necessary action.

Encl: RDSO Report No. SS/155/2019.

N'
'2}~Sj' ,0\ \~.
(Shailesh Khandelwal)
Exec. Director (Telecom) / RDSO
&
Convener of Committee
REPORT ON STANDARDISATION OF THE TYPICAL CIRCUITS FOR ELECTRONIC
INTERLOCKING

2019

(REF: Railway Board’s Letter No. 2018/Sig/36-SD/1 dated 14.11.2018)

REPORT NO. SS/155/2019

RESEARCH DESIGN AND STANDARDS ORGANIZATION

(MINISTRY OF RAILWAYS)
Standardisation of typical circuits for EI-2019

Table of Contents
Chapter No. Item

I. EXECUTIVE SUMMARY
II. INTRODUCTION
III. SALIENT FEATURES OF THE DESIGN

1. EI SYSTEM START UP

2. VDU OPERATION

3. BUTTON NOMENCLATURE& LOGIC

4. OPERATING CONTROL OVER EI

-1) SM KEY
-2) EMERGENCY KEY (EMKEY_IN)
-3) EXTREME EMERGENCY KEY (EECH)

5. BLOCK/UNBLOCK LOGIC

6. ROUTE INITIATION LOGIC (LR)

7. POINT CONTROL

RDSO Report No. SS/155/2019 Page 1 of 174

Standardisation of typical circuits for EI-2019

-1) POINT LOCKING RELAY (WLR)

-2) AUTO POINT CONDITION RELAY (NCR/RCR)
-3) POINT INITIATION LOGIC (Z1NWR/Z1RWR)
-4) POINT INTERLOCKING LATCH RELAY (NWR/RWR)
-5) MID STROKE REVERSAL PREVENTING LOGIC (XR)
-6) POINT OPERATION WINDOW LOGIC (WJR)
-7) POINT SWITCHING LOGIC (NWCR/RWCR)
-8) POINT DETECTION LOGIC
-9) EXTERNAL POINT OPERATION CIRCUIT (NWCZR/RWCZR)
-10) EXTERNAL POINT DETECTION CIRCUIT (NDKR/RDKR)

8. ROUTE CHECKING LOGIC (UCR)

9. APPROACH LOCKING LOGIC (ASR)

10. ROUTE RELEASE BY TRAIN (UYR)

11. ROUTE RELEASE BY CANCELLATION (EUUYN, ESUYN)

12. SIGNAL CLEARANCE LOGIC (HR)

-1) MAIN SIGNAL (HR)

-2) MAIN SIGNAL GREEN ASPECT (DR)
-3) MAIN SIGNAL ROUTE INDICATOR (UHR)

RDSO Report No. SS/155/2019 Page 2 of 174

Standardisation of typical circuits for EI-2019

-4) CALLING-ON SIGNAL CONTROL

-5) SHUNT SIGNAL CONTROL
-6) LAMP CHECKING RELAY-MAIN SIGNAL (ECR)
-7) LAMP CHECKING RELAY – SHUNT AND CALLING ON
-8) ROUTE LAMP CHEKING RELAY (UECR)
-9) CALLING ON TIME INITIATION LOGIC
-10) COUNTERS

13. CRANK HANDLE CONTROL LOGIC

-1) NORMAL CH KEY EXTRACTION (CHYR)
-2) EMERGENCY CH KEY EXTRACTION (CHEYR)
-3) EXTREME EMERGENCY CH KEY EXTRACTION (EECH)
i) VDU PC FAIL
ii) EI FAIL
iii) VDU DISPLAY FAIL

14. LEVEL CROSSING GATE CONTROL

15. BLOCK LOGIC

-1) DOUBLE LINE SGE BLOCK LOGIC

-2) SINGLE LINE BLOCK PANEL WITH UFSBI
-3) DOUBLE LINE BLOCK PANEL WITH UFSBI

16. INDICATIONS

RDSO Report No. SS/155/2019 Page 3 of 174

Standardisation of typical circuits for EI-2019

-1) RED LAMP (RGKE)

-2) YELLOW LAMP (HGKE)
-3) GREEN LAMP (DGKE)
-4) CALLING ON (CO-HGKE)
-5) ROUTE INITIATION (LRKE)
-6) SHUNT OFF (SH’OFF’GKE)
-7) SHUNT ON (SH’ON’GKE)
-8) ROUTE INDICATION (UGKE)
-9) ROUTE CANCELLATION (NJKE)
-10) OVERLAP INDICATION (OVKE)
-11) POINT NORMAL INDICATION (NWKE/NWKRE)
-12) POINT REVERSE INDICATION (RWKE/RWKRE)
-13) POINT LOCK INDICATION (WLKE)
-14) ROUTE WHITE/RED TRACK INDICATION (TKE/TKRE)

17. ANNEXURE : Remarks on Minute of Meeting dated 30.10.2018.

RDSO Report No. SS/155/2019 Page 4 of 174

Standardisation of typical circuits for EI-2019

I. Executive Summary
In connection with the standardization of the typical design for Electronic Interlocking, a Sub Working Group
was formed as per Railway Board Letter No. 2010/Sig/WG/IP Dt. 02.05.2012 to bring uniformity over Indian
Railways.The adoption of uniform circuits over Indian Railways will help in faster design rollout and feasibility in
automation of design.The Sub Working Group had finalized Typical Designs of the Application Logics/Circuits
required for Electronic Interlocking. This was submitted in the form of report vide No. SS/137/2013.The same was
discussed in 83rdSSC and circulated for all Zonal Railways under advice from Railway Board. However, even after 4
years, it could not be adopted due to minor issues.

The issue was discussed within RDSO and in Railway Board and, it was decided to conduct a conference of
CSTE/Plannings chaired by DG(S&T), Railway Board to discuss the issues and deciding the road ahead. After
discussion in the conference on 30.10.2018 at Western Railway, Mumbai, some recommendations were made and it
was felt that typical circuits need to be reviewed including additions of left out circuits to make a comprehensive
reference for all Zonal Railways.Railway Board vide letter No.2018/Sig/36-SD/1, dtd 14.11.2018 has nominated the
committee of following officers for finalization of typical circuits.

1. Shri S. Khandelwal, CSTE(Con) North, ECR as convener.

2. Shri M.M.Waris, Jt. Director/Sig-III, RDSO as secretary
3. Shri V.K.Pandey, Dy CSTE/P&D, NR
4. Shri SiddhuYadav, Dy.CSTE/P&D, NCR

The committee started its discussions immediately and other than normal course of meetings, ideas were
exchanged on emails/digital forum and every progress made was kept apprised to all members. The
recommendation of the CSTE/Planning’s conference was approved by Railway Board, and was considered and

RDSO Report No. SS/155/2019 Page 5 of 174

Standardisation of typical circuits for EI-2019

para-wise decision of the committee is appended in Annexure for quick reference. It was also decided by the
committee to make a comprehensive and self-sufficient report superseding the previous one in order to avoid further
ambiguities while adoption of Uniform Circuit by Zonal Railways.

In this regard, a videoconference was held on 02.12.2018 and meetings of committee were held on 28.12.2018 at
RDSO/Lucknow, 03.04.2019 to 04.04.2019 at New Delhi, 18.04.2019 to 19.04.2019 at Patna. Thereafter the draft
report was prepared and circulated to all Zonal Railways vide letter No. ECR/S&T/Con/Standardization, dated
23.04.2019. The major issues covered in the draft report were also presented during PCSTE conference held on
27.07.2019 at Guwahati. The comments were received from all four EI vendors and 9 Zonal Railways. The
committee had gone through the same and deliberations were done during meetings conducted by committee with
all Electronic Interlocking firms on 04.07.2019 & followed by internal discussion for Zonal Railways comments on
05.07.2019 at Lucknow. Further discussion was held in Lucknow on 08.08.2019 and final draft was prepared and
approved on 11.10.2019. Based on the discussions the following typical circuits are recommended by the committee
for adoption.

On a special note, there was another committee constituted by Railway board for standardisation of symbols and
nomenclatures of signalling design. The standard nomenclature to be used by that committee shall be incorporated
in this report after getting its approved report. Till that time, this committee has used the tentative nomenclature for
the circuits which can later be changed without any issue.

Similarly all logical circuits in visual form shall be differentiated from external physical circuits. The logical circuits
shall start with a vertical line and ends with a dot/rung. While physical (interface) circuit will start and end with
arrowhead like existing convention. This will avoid confusion in design and troubleshooting during
failures/maintenance.

RDSO Report No. SS/155/2019 Page 6 of 174

Standardisation of typical circuits for EI-2019

This report is 2019 version for Standardization of Circuits which shall be used by all Zonal Railways for development
of detailed application logic of the station. It is recommended that further improvement shall be done based on use
and feedback. Next level circuits like IBS shall be incorporated in next Phase. However as this is a continuous
process, it is proposed that a standing committee shall be formed which shall make further improvements based on
the feedback.

DISCLAIMER: The circuits in this report are typical circuits for reference purpose only. The Zonal Railway shall get
prepared the complete application logics for the station based on these typical circuits and carry out complete testing
of the designed and approved station application logic before commissioning.

RDSO Report No. SS/155/2019 Page 7 of 174

Standardisation of typical circuits for EI-2019

RDSO Report No. SS/155/2019 Page 8 of 174

Standardisation of typical circuits for EI-2019

II. INTRODUCTION

a. Purpose and Scope

The purpose of this document is to describe the application of the interlocking principles and interlocking functions as
System Generic Requirements for the function of Electronic Interlocking applied to Indian Railway applications.

This document is the input for developing the generic Signalling design as applied to the Indian Railway. These
specific rules can be adopted during the execution phase of each project.

All principles described in this document are extracted from the IRS documents as listed in below.

b. Applicability of the document: Exceptions and Assumptions

In the meeting held at Mumbai on 30th October 2018, certain decisions were taken and circulated by railway board
vide letter No. 2018/Sig/36-SD/1 dated 14.11.2018. Accordingly, considering the decisions taken, following are
salient feature of this standardisation report.

1. All EI shall be provided with Dual VDU and therefore no provision in standardised logic has been kept for
CCIP working.
2. All EI shall be having route setting feature, but point chain group feature is not considered essential as
maximum of 2 to 3 points may be required to be operated at any time.

RDSO Report No. SS/155/2019 Page 9 of 174

Standardisation of typical circuits for EI-2019

3. Currently recommended standardised logics are proposed to be used for way side station with maximum of
100 routes. This will cover more than 95% of stations on Indian railways.
4. These stations of less than 100 routes shall not be having Sectional route release feature.
5. All operation through VDU shall be by drop down menu.
6. A drop down menu can generate multiple command bits which is equivalent to press of multiple buttons
simultaneously.
7. For emergency operations, it is recommended that an additional physical key shall be provided which shall be
configured as redundant Vital input to Electronic Interlocking like vital field inputs.
8. For each independent route with each independent overlap, there shall be one controlling relay (LR). Thus LR
shall be equal to number of routes in Route control table. This will not require provision of swinging locking/
conditional locking. Direct locking of all conflicting movement shall be provided in LR circuit.
9. Logic for FCOR relay/bit is not prepared as there are no such directives in codes and manuals and there are
differences of opinion regarding its requirement among the OEM. Hence FCOR logic is not recommended
here.
10. Circuits for automatic signalling, IB signalling, operation of Interlock LC gates, axle counter resetting are not
included as they are external to EI. These shall be catered in next Phase.
11. Siding control through Ground frame are also excluded as now most of them are converted to motor
operation.
12. The recommended circuits are valid only for EI installation with Metal to Carbon interface relays. However, in
case of Proved type Signalling relays (Metal to Metal), the requirement of circuit design is different where
opening of front contact of relay is proved by closing of back contact. Hence, the present recommended
circuits shall not be used for EI installation with Metal to Metal interface relays.

c. References
[R1] RDSO/SPN/192/2005 – RDSO Specification for Electronic Interlocking.

RDSO Report No. SS/155/2019 Page 10 of 174

Standardisation of typical circuits for EI-2019

[R2] IRS S/36. - Route relay interlocking systems

[R3] General Rules for Indian Railways.

[R4] Signal Engineering Manual Part-1 and Part-2.

[R5] Report of SAG committee on Directive Principles.

[R6] RDSO report No. SS/137/2013 for standardisation of the typical circuits for electronic interlocking

RDSO Report No. SS/155/2019 Page 11 of 174

Standardisation of typical circuits for EI-2019

SALIENT FEATURES OF THE DESIGN

The overview of LOGICS proposed as sequence of operation are summarized in the flow chart below

Route initiated from VDU GNR + UNR

Concerned points
Route Initiation Relays LR NCR/RCR initiated

Each route UCR NWKR/ Concerned points set

Route Checking Relays in desired position
Final UCR RWKRs

Route & overlap

OVSR ASR WLRs
Locking Relays

Aspect Controlling Relays HR/HHR/DR

RDSO Report No. SS/155/2019 Page 12 of 174

Standardisation of typical circuits for EI-2019

POINT OPERATION
Automatic Route set Manual Operation Emergency Operation
LR ↑ WN + WWN WN + EWN

NCR ↑ EI START

Z1NWR ↑ NWR NWKR ↑

EI LOGIC WJR ↑ + XR ↓ NWCR ↑

INTERFACE 110V feed to point NWCZR ↑ NWZR ↑

(EXT LATCH)

POINT NORMAL
NWK1R ↑
DETECTION

RDSO Report No. SS/155/2019 Page 13 of 174

Standardisation of typical circuits for EI-2019

RDSO Report No. SS/155/2019 Page 14 of 174

Standardisation of typical circuits for EI-2019

Standardization of Signalling Design:

Typical Circuits for Electronic Interlocking

RECOMMENDATIONS OF COMMITTEE

RDSO Report No. SS/155/2019 Page 15 of 174

Standardisation of typical circuits for EI-2019

CHAPTER-1 : EI START UP

RDSO Report No. SS/155/2019 Page 16 of 174

Standardisation of typical circuits for EI-2019

1. EI START UP

a) EI starts with all bits in drop condition.

b) Whenever EI is started or reset, EI does not know the status of last operation of signalling gears at the time of last shut
down.

c) Thus entire process of EI start up is divided in to three stages –

i) SYSDEL – System delay (Initial Delay to stabilise the hardware and communication among them)
ii) SYSINIT – System Initialisation (Delay to stabilise the application logic)
iii) SYSON – System is ON (System is ready for operation).
Details of above are given below.

d) System Delay- SYSDEL

i) When EI is powered an initial delay of few seconds (as per requirement of OEM) is kept for recovery. During this
recovery time -
a. Any of the Processor shall be OK/Healthy.
b. Communications between main and standby EI/Processor shall be ok.
c. All Input & output communication, Network communication etc. shall be ok.
d. Health of Input and Output Modules are checked and found ok.
e. During above period no input is read and no output is delivered.

ii) SYSDEL bit shall remain ↓ and will check complete health of all the cards, communication etc and when found OK,
will go up and then pickup SYSINIT.1 and then SYSDEL will drops.
iii) In case system does not stabilise (SYSDEL↑) within this initial time duration (as per OEM) , then SYSERR will pick up
and prevents delivering of outputs and display on VDU and wherever feasible EI shall be shut down.

RDSO Report No. SS/155/2019 Page 17 of 174

Standardisation of typical circuits for EI-2019

e) System Initialisation - SYSINIT

i) As explained above, when entire hardware, communication and system is OK, then SYSDEL will pick up SYSINIT.1
ii) SYSINIT.1↑ indicates that entire hardware and communication of EI is healthy and will remain ↑ , till SYSON↑
iii) SYSINIT.1↑ opens a time window of 120 sec for stabilisation of Application logic by STP120 sec for SYSINIT.
iv) This 120 sec time delay ensures that if any train is in motion at the time of shutting down of EI shall stop, before
interlocking start working.
v) As soon as SYSINIT↑, then SYSDEL↓.

f) During this time of SYSINIT↑ - (Approx 10 second)

Initially, when EI is powered ON, SYSINIT ↓ and all routes are locked, all buttons are Blocked, all points are flashing, all
points are locked, all signals are at ON by default and when SYSINIT↑, then -
i) Communication with OPC shall be established.
ii) All command bit from OPC are reset to down.
iii) Inputs are read and displayed. Outputs remain disabled.
iv) SYSINIT↑ enables display of all indications on VDU.
v) With SYSINIT↑, Point conditions are read and point position is stabilises in EI and on VDU.
vi) Wherever track circuits are up, ASR and OVSR pick up.
vii) Where tracks are down, concerned ASR and OVSR shall remain down.
viii) After establishing communication with OPC, buttons are UNBLOCKED by SM depending on the status of track
circuits.

g) System is ON (SYSON) – slow to pick up 10 sec.

i) After 120 seconds of SYSINIT.1↑, then SYSINIT↑ and will pick up SYSON after 10 sec. Thereafter SYSINIT.1 and
SYSINIT will drop. Dropping of SYSINIT ensure removal of bypass path provided for stabilising ASR, Point circuit etc.
ii) SM can now log into the system by Password and by SM Key.
iii) SYSON↑ will remain up till system is shutdown or reset.

h) With SYSON↑ (and SYSDEL↓ and SYSINIT↓), EI is ready and outputs can be delivered after getting command from
operator.

RDSO Report No. SS/155/2019 Page 18 of 174

Standardisation of typical circuits for EI-2019

RDSO Report No. SS/155/2019 Page 19 of 174

Standardisation of typical circuits for EI-2019

CHAPTER-2 : VDU OPERATION

RDSO Report No. SS/155/2019 Page 20 of 174

Standardisation of typical circuits for EI-2019

2. VDU OPERATION

a) VDU shall display complete yard layout as per approved SIP.

b) When there is no communication with EI, the static layout in cyan/grey(as per OEM) colour shall be displayed without any
active bits.

c) After getting input from EI, layout shall become active and display the status.

d) The details to be displayed on VDU are –

i) General – Name of station, Colour with code R/G/B, UP/DN Direction, Date and Time, etc.
ii) System Information – OEM Name/logo, Active system (A/B), Communication between VDU & EI, Communication of
EI with remote interlocking and OC.
iii) Signalling information – SM key, Signal, Track, Point, Slots, Gate, etc.
iv) Alarms

e) Operation of Signalling system shall be through drop down menus.

f) The buttons operated while selecting a menu is as under:-

Operation Button Bit triggered
When OPC1 is active OPC1↑
OPC2↓
When OPC2 is active OPC1↓
OPC2↑
SM Key Physical SMKEY_IN↑ (Remains up so long as physical SM key is in)
EUUYN cancellation EUUYN_P↑ + S15GN_P↑
ESUYN ESUYN_P↑ + S15GN_P↑

RDSO Report No. SS/155/2019 Page 21 of 174

Standardisation of typical circuits for EI-2019

(Super Emergency cancellation)

Emergency Key Physical EMKEY_IN↑ (Remains up till physical key is in)
Signal Operation S15GN_P↑ + 03UN_P↑
Calling On signal operation C15GN_P↑ + 03UN_P↑
Signal Cancellation S15GN_P↑ + EGRN_P↑
Overlap Cancellation S15GN_P↑ + EOVN_P↑
Point operation ( N to R ) 105/106 WN_P↑ + RWWN_P↑
Point Operation (R to N) 105/106 WN_P↑ + NWWN_P↑
Emergency Point operation 105/106 WN_P↑ + RWWN_P↑ + EWN_P↑
(N to R)
Emergency Point operation 105/106 WN_P↑ + NWWN_P↑ + EWN_P↑
(R to N)
Crank Handle Control Transmit CH01YN_P↑ + GSBN_P↑
Crank Handle Control Receive CH01YN_P↑ + GSRBN_P↑
Level Crossing Control Transmit LC32XN_P↑ + GSBN_P↑
Level Crossing Control Receive LC32XN_P↑ + GSRBN_P↑
Alarm Acknowledgement ACK_P↑

g) During each of the above operation, the button once pressed from VDU shall remain available for minimum of three seconds
(or as decided by OEM, based on response time of their EI).
h) All button relays in EI shall remain ↑, so long as command is continuing from VDU.

RDSO Report No. SS/155/2019 Page 22 of 174

Standardisation of typical circuits for EI-2019

CHAPTER-3 :
BUTTON NOMENCLATURE AND THEIR FUNCTION

RDSO Report No. SS/155/2019 Page 23 of 174

Standardisation of typical circuits for EI-2019

3. BUTTON NOMENCLATURE AND THEIR FUNCTION

Button and its logic are provided in Interlocking. However, in VDU operation, provision of direct operation by buttons is not kept and
all operation is through drop down menu. Each drop down menu will pick up the concerned button (or combination of buttons) and
in turn pick up the button logic as per conditions.

S.NO. NAME OF BUTTON FUNCTION EI BIT Example

1. Main Signal Button S**GN Provided for each Main signal to initiate S**GN_P S17GN_P
concerned function.
2. Shunt Signal Button SH**GN Provided for each Shunt signal to initiate SH**GN_P SH17GN_P
concerned function.
3. Calling ON Signal C**GN Provided for each Calling on signal to C**GN_P C17GN_P
button initiate concerned function.
4. Route Button UN Provided for each route for giving UN_P 01AUN_P
command to initiate route.
5. Point Button WN Provided for each point for operating the WN_P 101/102WN_P
point
6. Point group button NWWN For operation of point from Reverse to NWWN_P NWWN_P
Normal position
7. Point group button RWWN For operation of point in from Normal to RWWN_P RWWN_P
Reverse position
8. Emergency point EWN For operation of point in emergency (in EWN_P EWN_P
button track down condition)
9. LC button LC**XN For giving/taking command to open/lock LC**XN_P LC32XN_P
the gate.
10. Crank handle button CH**YN For giving/taking command to take CH1YN_P CH1YN_P
out/lock the crank handle
11. Slot button YN For giving slot to concerned cabin YN_P YN_P

RDSO Report No. SS/155/2019 Page 24 of 174

Standardisation of typical circuits for EI-2019

12. Group slot Button GSB For giving slot to LC Gate, CH and Other GSB_P GSB_P
Slot
13. Group slot return GSRB For taking back slot GSRB_P GSRB_P
Button
14. Emergency route EUUYN For releasing the route when train has EUUYN_P EUUYN_P
release button not passed the signal and all tracks in
route are clear
15. Emergency Sub-route ESUYN For cancellation of route when any of the ESUYN_P ESUYN_P
cancellation button route track is failed or route stuck up.
16. Overlap release button OYN For releasing overlap in emergency OYNR OYN_P

17. Buzzer ACKN For acknowledging the buzzer. ACK_P ACK_P

acknowledgement
button
18. Signal Raising Button EGRN For raising the signal to ON. EGRN_P EGRN_P

19. SM Operating Key SMKEY SM key for normal operation SMKEY SMKEY
20. Emergency Key EMKEY SM Key for Emergency operation through EMKEY_IN EMKEY_IN
VDU
21. Extreme Emergency EECHKEY SM key for Emergency release of all ECH_PR ECH_PR
external Key Crank handle during failure of EI/VDU

Note:

a) ‘**’ indicates the concerned number as per SIP.

b) Any Button Relays _P will pick up only when the command is received from VDU, which is logged in and connected with EI.

RDSO Report No. SS/155/2019 Page 25 of 174

Standardisation of typical circuits for EI-2019

3-1 Signal Button Logic (Main/ Calling-on/Shunt)

1) Signal button command is initiated.

2) No other signal button is pressed
3) Concerned button is unblocked
4) SYSON↑
5) No point button command is active (WNCR ↑).
6) Concerned GNR will remain up till concerned GN_P↑. VDU will pick up the button GN_P for at least 3 second.

3-2 Signal Button Normal check Logic (GNCR)

Purpose of GNCR is to ensure only one signal command is active and next signal command can be executed only after the first
signal command is over (i.e GNR↓). Each signal button shall remain up; so long as press command from VDU is available. VDU’s
are supposed to keep each button pressed for three seconds. GNCR is also useful in giving indication on VDU of button press
condition.

3-3 Route Button Logic – It proves that

1) SM Key is in.
2) Route button command is initiated
3) No other route button command is active.
4) Concerned Route button is in Unblock condition.
5) SYSON↑
6) All other common buttons are down so that only one route command is initiated at a time.
7) Concerned UNR will remain up till concerned UN_P↑. VDU will pick up the button UN_P for at least 3 second.

RDSO Report No. SS/155/2019 Page 26 of 174

Standardisation of typical circuits for EI-2019

3-1

1 2
10 11 C11 12 13 C13 15 C15 16 C16 C17 24 C24 25 C25
17GN_P GNR GNR GNR GNR GNR GNR GNR GNR GNR GNR GNR GNR GNR GNR GNR
a

2
26 C26 27 C27 28 C28 29 C29 35 36 C36 37 38 C38 SH15
GNR GNR GNR GNR GNR GNR GNR GNR GNR GNR GNR GNR GNR GNR GNR
a b

2
SH15 SH16 SH17 SH19 SH21 SH24 SH25 SH26 SH27 SH28 SH29 SH30 SH32 SH64 SH66
GNR GNR GNR GNR GNR GNR GNR GNR GNR GNR GNR GNR GNR GNR GNR
b c

3 5 4

17GN_UBLR WNCR SYSON 17 GNR

c
4
EGRNR

S 17 GNR LOGIC

RDSO Report No. SS/155/2019 Page 27 of 174

Standardisation of typical circuits for EI-2019

3-2

1
10 11 C11 12 13 C13 15 C15 16 C16 17 C17 24 C24 25 C25
GNR GNR GNR GNR GNR GNR GNR GNR GNR GNR GNR GNR GNR GNR GNR GNR
a

1
26 C26 27 C27 28 C28 29 C29 35 36 C36 37 38 C38 SH15
GNR GNR GNR GNR GNR GNR GNR GNR GNR GNR GNR GNR GNR GNR GNR
a b

1
SH15 SH16 SH17 SH19 SH21 SH24 SH25 SH26 SH27 SH28 SH29 SH30 SH32 SH64 SH66
GNR GNR GNR GNR GNR GNR GNR GNR GNR GNR GNR GNR GNR GNR GNR
b c

GNCR
c

GNCR LOGIC

RDSO Report No. SS/155/2019 Page 28 of 174

Standardisation of typical circuits for EI-2019

3-3

3
1 2 UP1 UP2 04T 2T 11T
05T 01B 01C 01D 02 03A 03B 06T
SMKEY 01AUN_P UNR UNR UNR UNR UNR UNR UNR UNR UNR UNR UNR UNR UNR
a

3 6
07T DN1 DN2 SD1 SD2 4 5
UNR UNR UNR UNR UNR GSBR GSRBR NWWNR RWWNR 01AUN_UBLR SYSON
a b

01AUNR
b

NOTE: NO BLOCKING BIT IN GSBR,

GSRBR, NWWNR , RWWNR LOGIC

01A_UNR LOGIC

RDSO Report No. SS/155/2019 Page 29 of 174

Standardisation of typical circuits for EI-2019

3-4 Route Button Normal check Logic (UNCR)

Purpose of UNCR is to ensure only one route button command is active and next route command can be executed only after the
first route command is over (i.e UNR↓). Each route button shall remain up; so long as press command from VDU is available.
VDU’s are supposed to keep each button pressed for three seconds. UNCR is also useful in giving indication on VDU of button
press condition.

3-5 Point Button Logic –It proves that

1) Point button command is initiated.

2) No other point button command is active. All point buttons are grouped together so that only one command is initiated at a time.
3) No signal command is active (GNCR ↑).
4) Concerned Point button is in Unblock condition.
5) SYSON has picked up after EI boot up delay of 120sec.
6) Concerned WNR will remain up till WN_P↑. VDU will pick up the button WN_P for at least 3 second.

3-6 Point Button Normal check Logic (WNCR)

Purpose of WNCR is to ensure only one point button command is active and next point command can be executed only after the
first point command is over (i.e.WNR↓). Each point button shall remain up; so long as press command from VDU is available.
VDU’s are supposed to keep each button pressed for three seconds. WNCR is also useful in giving indication on VDU of button
press condition.

RDSO Report No. SS/155/2019 Page 30 of 174

Standardisation of typical circuits for EI-2019

3-4

1
UP1 UP2 04T 05T 2T 11T 01A 01B 01C 01D 02 03A 03B 06T
UNR UNR UNR UNR UNR UNR UNR UNR UNR UNR UNR UNR UNR UNR
a

1
07T DN1 DN2 SD1 SD2
UNR UNR UNR UNR UNR GSBR GSRBR NWWNR RWWNR UNCR
a

GSBR LOGIC

RDSO Report No. SS/155/2019 Page 31 of 174

Standardisation of typical circuits for EI-2019

3-5

2
1 3
103/104 105/06 107/08 109/110 111/112 151/152 153/154
101/102WN_P WNR WNR WNR WNR WNR WNR WNR GNCR
a

4 5
101/102
101/102 WN_UBLR SYSON WNR
a

101/102 WNR LOGIC

3-6

1
101/102 103/104 105/06 107/08 109/110 111/112 151/152 153/154
WNR WNR WNR WNR WNR WNR WNR WNR WNCR

WNCR LOGIC

RDSO Report No. SS/155/2019 Page 32 of 174

Standardisation of typical circuits for EI-2019

3-7 Crank Handle/LC/Siding Button Logic –It proves that

1) CH button command is initiated

2) Other CH, LC gate and Siding button commands are not active.
3) SYSON↑
4) All CH/LC/Sdg buttons are grouped together so that only one command is initiated at a time.

3-8 EGRN Button Logic –It proves that

1) EGRN button command is initiated

2) SYSON is UP.
3) SM key is not proved to enable putting back the signal to danger without SM key.
4) EGRN will remain up till EGGN_P↑. VDU will pick up the button EGGN_P for at least 3 second.

3-9 EMKEY_INR key Logic – It proves that

1) Emergency Key is in for Emergency operation like EWN and ESUYN.

2) SYSON is UP.

3-10 EWN Button Logic –It proves that

1) EWN button command is initiated.

2) Emergency Key is IN.
3) SM key is not proved since it picks up with either NWWN or RWWN command.
4) SYSON is UP.

RDSO Report No. SS/155/2019 Page 33 of 174

Standardisation of typical circuits for EI-2019

3-11 EUUYN Button Logic –It proves that

1) SM Key is in.
2) EUUYN button command is initiated
3) Other group button commands are not active.
4) SYSON↑

3-12 ESUYN Button Logic –It proves that

1) ESUYN button command is initiated

2) SM Key is in.
3) Physical Emergency key is in.
4) Other group button commands are not active.

3-13 SMKEY Logic –It proves that

1) When SM key is inserted and turned, two interface relays SMKEY_IN1 and SMKEY_IN2 are picked up (refer sheet 4-1).
2) When either SMKEY_IN1 ↑ or SMKEY_IN2 ↑ or both are ↑, then SMKEY picks up.

RDSO Report No. SS/155/2019 Page 34 of 174

Standardisation of typical circuits for EI-2019

3-7

2
1
CH2 CH3 CH4 CH5 CH2 CH6 CH7 CH8 LC 1 CH1
CH1YN_P YNR YNR YNR YNR YNR YNR YNR YNR XNR YNR

2
1
CH1 CH2 CH3 CH4 CH5 CH2 CH6 CH7 CH8 LC1
LC 1 XN_P YNR YNR YNR YNR YNR YNR YNR YNR YNR XNR

CH1 YNR & LC GATE XNR BUTTON LOGIC

RDSO Report No. SS/155/2019 Page 35 of 174

Standardisation of typical circuits for EI-2019

1 2
EGRN_P SYSON EGRNR
3-8

1 2
EMKEY_IN SYSON EMKEY_INR
3-9

1 3 4
EWN_P EMKEY_INR SYSON EWNR
3-10

1 2 3 4
EUUN_P SMKEY ESUYNR SYSON EUUYR
3-11

1 2 3 4 5
ESUN_P SMKEY EMKEY_INR EUUYNR SYSON ESUYR
3-12

1
SMKEY_IN1 SMKEY
3-13
1
SMKEY_IN2

RDSO Report No. SS/155/2019 Page 36 of 174

Standardisation of typical circuits for EI-2019

3-14 Common Group Button (NWWN, RWWN,GSB, GSRB) logic – It proves that

1) SM Key is in.
2) Concerned button command is initiated.
3) No route button command is initiated.
4) All other common buttons (like NWWN, RWWN, GSB, GSRB, etc) are down
5) SYSON is UP.

3-15. Overlap Cancellation Button Logic (OYN) – It proves that

1. SM Key is IN.
2. Overlap cancellation command is initiated.
3. No other cancellation (EUUYR, ESUYR) is in progress.
4. SYSON bit is up to ensure that EI is ready.

RDSO Report No. SS/155/2019 Page 37 of 174

Standardisation of typical circuits for EI-2019

3
1 2 UP1 UP2 04T 2T 11T
05T 01B 01C 01D 02 03A 03B 06T
SMKEY GSB_P UNR UNR UNR UNR UNR UNR UNR UNR UNR UNR UNR UNR UNR
a

3
07T DN1 DN2 SD1 SD2 4
UNR UNR UNR UNR UNR GSRBR NWWNR RWWNR SYSON GSBR
a 3-14

3
1 2 UP1 UP2 04T 2T 11T
05T 01B 01C 01D 02 03A 03B 06T
SMKEY NWWN_P UNR UNR UNR UNR UNR UNR UNR UNR UNR UNR UNR UNR UNR
a

3
07T DN1 DN2 SD1 SD2 4
UNR UNR UNR UNR UNR GSBR GSRBR RWWNR SYSON NWWNR
a

1 2 3 3 4
SMKEY OYN_P EUUYR ESUYR SYSON OYNR 3-15

RDSO Report No. SS/155/2019 Page 38 of 174

Standardisation of typical circuits for EI-2019

CHAPTER- 4
OPERATING CONTROL OVER INTERLOCKING

RDSO Report No. SS/155/2019 Page 39 of 174

Standardisation of typical circuits for EI-2019

4. OPERATING CONTROL OVER INTERLOCKING

SM shall keep the operation of entire interlocking under his control through physical key (SM Key). Since most of the VDU
are not SIL compliant, cases of false command from operating VDU has been reported. Therefore it is essential to have
physical key control. The Key contact shall be taken as vital input through interface relay. To avoid possibility of single cause
failure, redundant Input of physical key in contact is taken through vital inputs on two different input cards of EI (on different
Object Controller wherever possible) as indicated on Sheet 4-1. Further these two relays are proved in parallel and picked
up a final relay SMKEY internally, which will be used in required logic circuits (refer 3-13).

Key control

An independent key box shall be provided in SM room that will keep control of operation. The key box shall have

i) SM Key – For normal operation and routine emergency operation like EGGN, EUUYN, EOYN.
ii) Emergency key - For Emergency operation like EWN & ESUYN etc.
iii) Extreme Emergency External key control – For extraction of crank handle during complete failure of EI/ VDU etc.

The functions of each key are as under:

i) SM Key
Insertion of this key authorises SM to operate and control entire interlocking. Following operations can be enabled by this
key:
i) Unblocking of Blocked buttons.
ii) Setting of point.
iii) Taking OFF all signals.
iv) Acknowledging alarm.
v) Sending and receiving slots of sidings, gate, inter cabins etc.
vi) Cancellation of route (EUUYN) & (ESUYN)
vii) Releasing and receiving crank handle key control.

It shall however be possible to put back signal to ON without presence of this key.

RDSO Report No. SS/155/2019 Page 40 of 174

Standardisation of typical circuits for EI-2019

ii) Emergency key (EMKEY)

Insertion of this key authorises SM to carryout Emergency operations like (i) Emergency point operation (EWN) (ii)
Emergency cancellation of sub route/ complete route or releasing of approach locking, back locking etc. (ESUYN)
(i) Emergency point operation (EWN) – This is required to operate the point in case of failure of track circuit after
following due procedure laid down in SWR.
(ii) Emergency cancellation of sub route/complete route or releasing of approach locking, back locking etc.(ESUYN) -
This is required after following due procedure laid down in SWR when-
a) Route is held up when any of track circuit is down.
b) Route is held up after passage of train and not getting cancelled with EUUYN under normal cancellation.

Note: These emergency operations are carried out through positive proving of insertion of emergency key by SM.

iii) Extreme Emergency external control

This control is provided externally with a key and self restoring RED colour push button. During failure of VDU/ EI or
under any other emergency, insertion of this key along with pressing and releasing of RED button enable SM to put back
all signals to danger. After activating this feature, all signals shall go to danger immediately and after a delay of minimum
of 120 seconds all crank handle key controls shall be released.

Password control

i) Password control is not proposed for use of Electronic Interlocking.

ii) However password control can be kept to take control of active VDU (i.e. OPC1 or OPC2).
iii) Password management of Operating and Maintenance VDU is not a part of EI control, but controlled by PC of VDU.
Thus, it can be decided based on local condition by Zonal railway.

RDSO Report No. SS/155/2019 Page 41 of 174

Standardisation of typical circuits for EI-2019

RDSO Report No. SS/155/2019 Page 42 of 174

Standardisation of typical circuits for EI-2019

CHAPTER-5 :BLOCK UNBLOCK LOGIC

RDSO Report No. SS/155/2019 Page 43 of 174

Standardisation of typical circuits for EI-2019

5. BLOCK UNBLOCK LOGIC

a) Block/ Unblock logic shall be provided through EI and not through OPC.

b) Block / Unblock logic implemented through one OPC shall remain effective even during changeover of OPC.

c) No extra password is necessary for Blocking and Unblocking of any individual button. When EI boots up initially all the
buttons shall be blocked by default and there shall be a facility to unblock all buttons using single command. However, a
confirmation popup may be given for “ALL UNBLOCK” option on VDU. Procedure shall be defined in SWR.

d) SM KEY IN is required for unblocking a button, while same is not required for blocking of a button.

e) Block/ Unblock shall be provided on each Signal button, Point button and route button only.

f) Block/ Unblock logic shall be effective in following manner :-

g) BLOCKING
i) SIGNAL BUTTON – Blocking of a Signal button shall prevent initiation of any route of the Main and Calling-on signal.
ii) SHUNT SIGNAL BUTTON - Blocking of a Shunt Signal button shall prevent initiation of any route of the shunt signal.
iii) POINT BUTTON - Blocking of a Point button shall prevent operation of point in either direction.
iv) ROUTE BUTTON - Blocking of a Route button shall prevent initiation of any signal route on that particular line.

h) UNBLOCKING
i) There shall not any automatic unblocking facility.
ii) Unblocking can be done on individual buttons.
iii) Unblocking can also be done by ALL UNBLOCK feature, preferable during EI startup.
i) Blocking of a button shall be indicated by a definite mark over the concerned button.

RDSO Report No. SS/155/2019 Page 44 of 174

Standardisation of typical circuits for EI-2019

The logic for Blocking/ Unblocking shall remains similar for Signal/Point/Route button.

5-1 Signal Button Unblocking Logic

1. SM key is in.
2. As and when SM desires to UnBlock the button, the UnBlock logic command (17GN_UBL) is send from VDU.
3. SM can unblock by either individual UNBLOCK button or by ALL UNBLOCK button. The are 3 ALL UNBLOCK button for
Signal (ALLGN_UBL), Point(ALLWN_UBL) and Route (ALLUN_UBL).
4. When EI is powered on, UNBlock bit shall remain down, and all buttons shall be blocked.
5. Unblocking to start only after EI is ready after startup/reboot, i.e. SYSON↑.
6. Normal position of 17GN_UBL is ↑. Drops as soon as the Button is blocked and pickup when unblocked.

5-2 Blocking Logic

1. As and when SM desires to block the button, the Block logic command (17GN_BL) is send from VDU.
2. Blocking holds through 17GN_BLR↑.
3. When EI is powered on, all bits shall remain down. During SYSINIT stage, 17GN_BLR↑ through SYSINIT1↑ and
SYSON↓. This prevents any operation from VDU during starting up of EI.
4. With 17GN_BLR↑, the concerned button is blocked.
5. When SYSON↑, the path of SYSINIT1 shall not be available and buttons can now be unblocked.
6. Blocking of a button shall prevent operation through that button.
7. Normal position of 17GN_BLR is ↓.

RDSO Report No. SS/155/2019 Page 45 of 174

Standardisation of typical circuits for EI-2019

5-1

2 1 5
17GN_UBL SMKEY SYSON 17GN_UBLR

3
ALLGN_UBL

4
17GN_UBLR 17GN_BLR

S17GN UNBLOCKING LOGIC

(SIMILAR LOGIC FOR POINT & ROUTE BUTTON)

5-2

1
17GN_BL 17GN_BLR

2
17GN_BLR 17GN_UBLR

3
SYSINIT1 SYSON

S17GN BLOCKINGLOGIC
(SIMILAR LOGIC FOR POINT & ROUTE BUTTON)

RDSO Report No. SS/155/2019 Page 46 of 174

Standardisation of typical circuits for EI-2019

CHAPTER-6 :Route initiation Logic–(LR)

RDSO Report No. SS/155/2019 Page 47 of 174

Standardisation of typical circuits for EI-2019

6 Route initiation Logic–(LR)

LR is route initiation bit and normal position of LR is down. At the time of initiation, it also checks that no conflicting route is
already initiated. It is also used for locking other conflicting routes. Each signal (Main, Calling on & Shunt) will have LR for
each signal route.

6.1. Main signal Route initiation logic (S17_01A LR).

The following are to be proved in LR logic :
1. Route initiation command given. Signal button (GNR↑) and route button( UNR↑) and previous route is released i.e.
S**ASR↑.
2. No emergency cancellation command is initiated.
3. To ensure that LR is dropped with train movement, first UYR1 back contact is proved. TSR is not proved since it will not
allow route setting in case of first controlling track is failed.
4. All points in the route, OV and isolation are not locked condition (WLR ↑) or points are in the required position (internal
latch relay NWR/ RWR ↑). NWKR/ RWKR is not taken as it suffers the disadvantage that if any point in the route fails,
then LR was dropping.
5. Point normal control relay NCR1 is down where point is required in reverse and point reverse control relay RCR1 ↓ where
point is required in normal to achieve the locking of signals require same position of points.
6. Calling on route on the same post is not initiated (LR ↓ & ASR ↑). Converse is not required because it should be possible
to initiate calling on route, even after main signal route is initiated.
7. Conflicting movements in the same direction are not initiated (LR ↓ & ASR ↑).
8. Directly opposite movements are not initiated, which require same point setting (LR ↓ & ASR ↑).
9. Other conflicting criss- cross movements are not initiated (LR ↓ & ASR ↑ may be conditional) .
10. Signal cancellation should be possible.
11. VDU_FAIL back contact to raise up the signal in case of VDU failure or Extreme Emergency Key is operated.
12. Shunt signal route on the same post is not initiated (LR ↓ & ASR ↑).

RDSO Report No. SS/155/2019 Page 48 of 174

Standardisation of typical circuits for EI-2019

6-1
1 2 3 4 5
17 01A S17 S_C_SH17 S_C_SH17 S_C17 101/102 101/102 103/104 103/104
GNR UNR ASR ESUYR EUUYR UYR1 WLR RCR1 WLR RCR1
a

101/102 103/104
S17_01A NWR NWR
LR

105/106 105/106 109/110 109/110 111/112 111/112 153/154 153/154 C17_01A C17
WLR NCR1 WLR NCR1 WLR RCR1 WLR RCR1 LR ASR
a b
105/106 109/110 111/112 153/154
NWR RWR NWR NWR

6 7 8

SH17_2T SH17 SH19_01A SH19 SH25_06T SH25 S12_UP2 S16_04T S16 C16_04T
LR ASR LR ASR LR ASR LR LR ASR LR
b c

C16 SH16_04T SH16 S28_2T S28 C28_2T C28 SH28_2T SH28 OV 28 S38_01B S38
ASR LR ASR LR ASR LR ASR LR ASR SR LR ASR
c d

8 9 10 11
C38_01A C38 SH66_01A SH66 C36_02 SH64_02 C36 SH64 S17 S17_01A
LR ASR LR ASR LR LR ASR ASR GNR VDU_FAIL LR
d
151/152
RWR EGRNR

NOTE: EXTRA LOCKING TO BE PROVED AS PER RAILWAYS RCC.

S17_01A LR LOGIC

RDSO Report No. SS/155/2019 Page 49 of 174

Standardisation of typical circuits for EI-2019

6.2 Calling on Route initiation Logic (C17_01ALR) –

The following are to be proved in Co-LR logic:

1. Calling on Route initiation command given. Signal button (C17GNR ↑) and route button (01AUNR ↑).
2. No emergency cancellation command is initiated.
3. 04TPR back contact is taken to prove that train is standing at calling on track circuit. when pick up will drop the LR
during passage of train.
4. All points in the route, OV and isolation are not locked condition (WLR ↑) or points are in the required position
(internal latch relay NWR/ RWR ↑). NWKR/ RWKR is not taken as it suffers the disadvantage that if any point in
the route fails, the route will not set.
5. Point normal control relay NCR1 is down where point is required in reverse and point reverse control relay RCR1 ↓
where point is required in normal to achieve the locking of signals require same position of points.
6. Main signal on the same post, route may be initiated but has not come ‘OFF’(OFF ECR ↓)
7. Shunt signal route on the same post is not initiated (LR ↓ & ASR ↑).
8. Conflicting movements in the same direction are not initiated (LR ↓ & ASR ↑).
9. Directly opposite movements are not initiated. Which require same point setting (LR ↓ & ASR ↑).
10. Other conflicting criss- cross movements are not initiated (LR ↓ & ASR ↑ may be conditional) .
11. Signal cancellation should be possible.
12. VDU_FAIL back contact to raise up the signal in case of VDU failure or Extreme Emergency Key is operated.

RDSO Report No. SS/155/2019 Page 50 of 174

Standardisation of typical circuits for EI-2019

6-2
1 2 3 4 5
C17 01A S_C_SH17 S_C_SH17 04T 101/102 101/102 103/104 103/104
GNR UNR ESUYR EUUYR TPR WLR RCR1 WLR RCR1
a

101/102 103/104
C17_01A NWR NWR
LR

6 7

105/106 105/106 109/110 109/110 111/112 111/112 17 17 SH17_2T SH17

WLR NCR1 WLR NCR1 WLR RCR1 HECR DECR LR ASR
a b
105/106 109/110 111/112
NWR RWR NWR

8 9

SH19_01A SH19 SH25_06T SH25_07T SH25 S12_UP2 S16_04T S16 C16_04T C16 SH16_04T
LR ASR LR LR ASR LR LR ASR LR ASR LR
b c

SH16 S28_2T S28 C28_2T C28 SH28_2T SH28 OV 28 S38_01B S38 C38_01A C38
ASR LR ASR LR ASR LR ASR SR LR ASR LR ASR
c d

9 10
11
SH66_01A SH66 S36_01B C36_01A C36_02 SH64_01A SH64_02 S36 C36 SH64 C17
LR ASR LR LR LR LR LR ASR ASR ASR GNR
d e
151/152
12 RWR EGRNR
C17_01A
VDU_FAIL LR
e

C17_01A LR LOGIC
NOTE: EXTRA LOCKING TO BE PROVED AS PER RAILWAYS RCC.

RDSO Report No. SS/155/2019 Page 51 of 174

Standardisation of typical circuits for EI-2019

6.3 Shunt Signal Route Initiation Logic (SH17_2TLR) –

The following are to be proved in SH17-2T LR logic:

1. Shunt signal Route initiation command given. Signal button (SH17GNR↑), route button (2TUNR ↑) and previous route is
released i.e. SH**ASR↑.
2. No emergency cancellation command is initiated.
3. UYR1 back contact is taken to drop the LR on passage of train.
4. All points in the route, OV and isolation are not locked condition (WLR ↑) or points are in the required position (internal
latch relay NWR/ RWR ↑). NWKR/ RWKR is not taken as it suffers the disadvantage that if any point in the route fails, the
route will not set.
5. Point normal control relay NCR1 is down where point is required in reverse and point reverse control relay RCR1 ↓ where
point is required in normal to achieve the locking of signals require same position of points.
6. Main /Calling ON signal, on the same post, route not initiated. (LR ↓ & ASR ↑).
7. Directly opposite movements are not initiated. Which require same point setting (LR ↓ & ASR ↑).
8. Other conflicting criss- cross movements are not initiated (LR ↓ & ASR ↑ may be conditional).
9. Main/Calling on signal route in rear not initiated (LR ↓ & ASR ↑).
10. Signal cancellation should be possible.
11. VDU_FAIL back contact to raise up the signal in case of VDU failure or Extreme Emergency Key is operated.

RDSO Report No. SS/155/2019 Page 52 of 174

Standardisation of typical circuits for EI-2019

6-3
1 2 3 4 5
SH17 2T SH17 S_C_SH17 S_C_SH17 SH17 101/102 101/102 103/104 103/104
GNR UNR ASR ESUYR EUUYR UYR1 WLR RCR1 WLR RCR1
a

101/102 103/104
SH17_01A NWR NWR
LR

6 7

17_01A 17_01B 17_02 17_03A 17_03B S17 C17_01A C17_02 C17_03A C17 S12_UP2 S16_04T
LR LR LR LR LR ASR LR LR LR ASR LR LR
a b
7

S16 C16_04T C16 SH16_04T SH16 S26_2T S26 C26_2T C26 SH26_2T SH26 OV 26 S24_2T
ASR LR ASR LR ASR LR ASR LR ASR LR ASR SR LR
b c

S24 C24_2T C24 OV 24 SH24_2T SH24 S28_2T S28 C28_2T C28 SH28_2T SH28 OV 28
ASR LR ASR SR LR ASR LR ASR LR ASR LR ASR SR
c d

109/110
NWR

8 9 10 11
S36_02 C36_02 S36 C36 C13_04T C13 SH17 SH17_2T
LR LR ASR ASR LR ASR GNR VDU_FAIL LR
d
151/152
RWR EGRNR

153/154
RWR

NOTE: EXTRA LOCKING TO BE PROVED AS PER RAILWAYS RCC.

SH17_02 LR LOGIC

RDSO Report No. SS/155/2019 Page 53 of 174

Standardisation of typical circuits for EI-2019

CHAPTER- 7
POINT CONTROL AND POINT OPERATION LOGIC

RDSO Report No. SS/155/2019 Page 54 of 174

Standardisation of typical circuits for EI-2019

7. POINT CONTROLS

Points shall be controlled automatically to the required position when either a route is called or manually by a command.

A) NORMAL POINT CONTROL

Point Control when free to move
Points shall be prevented from moving under the train. Points are controlled from one position to another position only when
they are free to move.
Under Normal working, a point is said to be free and can be controlled from one position to another only when all the
following conditions are satisfied –
i) The track circuits on which the point is located, is not occupied,
ii) No route is set & locked passing through the point.
iii) Crank handle key of the point is not inserted.

When condition (i) & (ii) above are not available and point is required to be controlled, then point can be controlled under
various feature of Emergency point control which are described below.

B) EMERGENCY POINT CONTROL

Point Control Track occupied

Track circuit is occupied - When the point track is occupied, there is a facility to control the point from one position to another
position under some surveillance. There are instructions specified in the signal engineering manual before using this feature.
In VDU, there is an emergency command for Emergency Point Operation. This is secured by the Emergency key. After
Emergency key is inserted, the point control command can be executed by SM, subject to fulfilment of conditions laid down
in SWR. Control of point using the emergency point operation is logged through a counter.

RDSO Report No. SS/155/2019 Page 55 of 174

Standardisation of typical circuits for EI-2019

Point is locked
Points is kept locked and not allowed to be moved when either –
i) Any signal route passing over the point is approach locked or any sub route over the point is set & locked (Route locking).
ii) Overlap in which points are lying is set & locked
Point locked in Route – When the point is locked either under a signal route, subroute, or overlap route, then point can be
controlled only be crank handle.

C) CRANK HANDLE KEY CONTROL

Control of the crank handle key is interlocked with the concerned signals. When the control of key is out, then concerned
signal cannot be taken off and point cannot be controlled automatically. However, point can still be controlled manually, till
such time crank handle key is not inserted in point machine.

RDSO Report No. SS/155/2019 Page 56 of 174

Standardisation of typical circuits for EI-2019

LOGIC RELATED TO POINTS

The various logic bits related with point control and their functions are described below:

7-1. POINT LOCKING RELAY (WLR) LOGIC

This bit when low locks the concerned points electrically inside interlocking.
In WLR Logic, the following conditions are to be required to pickup WLR (Making point free)

1. Normal position of WLR is ↑.

2. It should be proved that no route over point is set. This is achieved by proving concerned signals ASR/TLSR/TRSR Up.
3. No overlap towards the point is set. This is achieved by proving concerned OVSR Up
4. (a) Sometimes, a point may not be locked by any signal which are leading to parallel movements, but when this point is
set reverse both the movements may become conflicting to each other, e.g., a calling on signal does not lock the points
in overlap and the same point happens not to be in shunt signal movement. But when both the calling on and shunt
movements are initiated, this particular point may be required in locked condition to ensure isolation between the two
movements. In such cases, special locking is provided in WLR logic, wherein the TLSR/TRSR/ASR front contact of both
the movements will be proved in parallel. This enables dropping of WLR when both the movements are initiated, thus
ensuring isolation between both movements.
(b) In the above condition, the concerned contacts have to be by passed by front contacts of point NWR/RWR suitably to
avoid locking of the point for unconcerned movements.

RDSO Report No. SS/155/2019 Page 57 of 174

Standardisation of typical circuits for EI-2019

RDSO Report No. SS/155/2019 Page 58 of 174

Standardisation of typical circuits for EI-2019

7-2. AUTO NORMAL/REVERSE POINT CONDITION LATCH LOGIC (NCR/RCR)

The function of this relay is to initiate the condition for operation of point to concerned position automatically by route initiation, i.e.
when concerned LR pick up and hold it till LR is up. However, in order to ensure that point is operated only once, when LR pickup,
suitable conditions are built in and multiple bits are made as NCR1, NCR2, NCR3 etc.

In NCR/RCR Logic, the following are to be proved:

1. Normal position of NCR/RCR-1/2/3 is ↓.

2. Any one of the route/overlap LR picking up that requires the point to be set to Normal should energize NCR1 relay. This is
achieved by proving all route/overlap LRs front contacts, which require the point in Normal position, in parallel.
3. Any one of the route/overlap LR picking up that requires the point to be set to Reverse should energize RCR1 relay. This is
achieved by proving all route/overlap LRs front contacts, which require the point in Reverse position, in parallel.
4. Sometimes special throwing of the point may be required to ensure isolation between two parallel movements and in
neither of them the point position is proved. In such cases, the route locking (ASR/TLSR/TRSR Dn) of one movement and
initiation of other movement (LR pick up) proved in series will throw the points to the concerned position. (wherever
required)
5. Sometimes a point is locked in overlap, however, initiation of another route requires this point in isolation or for parallel
movement, which can be achieved by conditional throwing of point, thus WLR contact is not proved here. (where ever
swinging locking is provided)
6. The back contact of the NCR2 has to be proved in RCR2 logic and vice versa.
7. NCR1 will remain up till LR is set.
8. NCR2 will drop after triggering point initiation.
9. NCR3 will drop after point is operated and detection is received. This prevents reoperation of point, since LR remains up and
if point fails.
10. The logic for NCR/RCR-1/2/3 for the given yard is as follow:

RDSO Report No. SS/155/2019 Page 59 of 174

Standardisation of typical circuits for EI-2019

RDSO Report No. SS/155/2019 Page 60 of 174

Standardisation of typical circuits for EI-2019

7-3. POINT INITIATION LOGIC - NORMAL/REVERSE MANUAL POINT INITIATION LOGIC (Z1NWR/Z1RWR)
The function of this logic is to operate the points in manual operation mode and in automatic mode (using auto point condition latch
logic) in either direction. The manual point initiation logic covers normal operation mode as well as emergency operation mode i.e.
when point track is down.

In this logic following conditions are ensured:

1. Normal position of Z1NWR/Z1RWR is ↓.
2. Point is controlled under normal condition, then VDU will generate WNR and NWWNR/RWWNR bit UP.
3. Point is controlled under emergency condition, then VDU will generate WNR, EWNR and NWWNR/RWWNR bit UP.
4. When point is required to be controlled automatically, auto point condition latch logic (NCR/RCR) will trigger the point
initiation logic.
5. This triggers the actual point initiation (NWR/RWR) and drops itself as soon as the buttons are released.
6. This also triggers the Point operating window (WJR) to start and enable it to drop by disconnecting the supply, when buttons
are released.
7. The logic for Z1NWR/Z1RWR for the given yard is as follow:

RDSO Report No. SS/155/2019 Page 61 of 174

Standardisation of typical circuits for EI-2019

RDSO Report No. SS/155/2019 Page 62 of 174

Standardisation of typical circuits for EI-2019

7-4 NORMAL/REVERSE POINT INTERLOCKING LATCH LOGIC (NWR/RWR)

The function of this logic is to set the required condition of point as per interlocking. This logic is final logic which triggers the point
operation.

In this logic following conditions are ensured:

1. Normal position of NWR/RWR is ↑.
2. Point is controlled under normal condition (WNR↑ & N/RWWNR↑), Emergency condition (WNR↑, EWNR↑ & N/RWWNR↑) or
auto route condition (NCR2/RCR2)
3. Point is free to operate i.e. not locked in other route (WLR↑)
4. Point is not set is required position (NWKR/RWKR↓).
5. Crank handle key is in, when triggered for operation in auto route mode.
6. The back contact of the contrary bit RWR has to be proved in NWR logic and vice versa.
7. Once this bit is up, holds through its own contact and with NCR3/RCR3↑ (This breaks when point is set) or,
Z1RWR/Z1NWR↓ to drop NWR in next operation and WLR↓ to keep NWR↑ when point is locked.
8. When system is powered on, then all logic bits are in down condition and interlocking does not have any information of point
at last moment. Based on the point condition of site and position of interface latch relay, the interlocking takes the position of
point and retains it. This takes place during initial 120 second of EI Initialising (SYSINIT↑, and SYSON↓). Further this path is
not available during normal operation of EI (SYSON↑)
9. The logic for NWR/RWR for the given yard is as follow:

RDSO Report No. SS/155/2019 Page 63 of 174

Standardisation of typical circuits for EI-2019

RDSO Report No. SS/155/2019 Page 64 of 174

Standardisation of typical circuits for EI-2019

RDSO Report No. SS/155/2019 Page 65 of 174

Standardisation of typical circuits for EI-2019

7-5 MID STROKE REVERSAL PREVENTING RELAY (XR) LOGIC

The function of this logic is to prevent the starting of operation when the point is under operation or tried for other position during
mid stroke.
In this logic following conditions are ensured:
1. Normal position of XR is ↑.
2. When Point operating window is opened (WJR.J↑), XR drops and enable extension of supply externally for operation of
point.
3. It picks up again after complete normalisation of LR (i.e. NCR1↓+RCR1↓)
4. The logic for XR for the given yard is shown in 7-5.

7-6 POINT OPERATION WINDOW LOGIC (WJR/ WJR.J)

The logic enable opening of a fixed time window (say 10 to 12 sec) during which point must operate to either position. This logic
enables extension of power supply to point motor for a maximum limited time and prevents the motor from overloading when the
point is obstructed and not set to the concerned position. This is very vital logic, as it prevents physical operation even when point
operating condition might be available during boot up of EI from its last stage or during changeover of system. WJR once dropped
(compulsory drops after a fixed time of 10/12 sec) cannot be picked up again, till entire point operating procedure is resetted.

In this logic following conditions are ensured:

1. Normal position of WJR is ↓.
2. The point is free and in unlocked condition, i.e., WLR ↑
3. Point initiation logic is triggered i.e. Z1NWR/Z1RWR↑. Z1NWR/Z1RWR also enables dropping of WJR as NWR/RWR remain
↑, while Z1NWR/Z1RWR ↓, when buttons are released.
4. Interlocking point latch logic NWR/RWR ↑.
5. Point is not under operation and previous operation was complete i.e. XR ↑.
6. Combination of WJR and WJR.J gives requisite window opening time for point operation.
7. The logic for WJR, WJR.J, WJR1 for the given yard is shown in 7-5.

RDSO Report No. SS/155/2019 Page 66 of 174

Standardisation of typical circuits for EI-2019

RDSO Report No. SS/155/2019 Page 67 of 174

Standardisation of typical circuits for EI-2019

7-7 POINT SWITCHING LOGIC (NWCR/RWCR)

This logic is final output logic, which enable picking of external relays for operation of point. This logic shall get enabled when
interlocking desire that the point is operated. This logic remains enable till point is brought to desired position (NWKR/RWKR↑) or
time window is closed (WJR↓).

In this logic following conditions are ensured:

1. Point is required to be brought to desire position i.e. NWR/RWR ↑
2. Point position is not in desired position (NWKR & RWKR↓)
3. Point operating window is opened i.e. WJR/WJR.J↑
4. Point is not under operation in opposite direction , XR↓
5. Contrary relay is down NWCR↓ in RWCR and vice versa.
6. The logic for NWCR/RWCR for the given yard is shown in 7-7.

7-8 POINT DETECTION LOGIC (NWKR/RWKR)

This logic detects the position of point at site with reference to required point position as per requirement of interlocking. This relay
also gives steady and flashing indication to VDU operator.

In this logic following conditions are ensured:

1. When Point is correctly set at site – NDKR/RDKR ↑.
2. When NDKR↑ and interlocking relay NWR↑, then NWKR↑. This is also for reverse detection.
3. When NWKR↑ - it gives Normal steady indication.
4. When RWKR↑ - it gives Reverse steady indication.
5. When NWR↑ but NWKR↓ - it gives Normal Flashing indication.
6. When RWR↑ but RWKR↓ - it gives Reverse Flashing indication.
7. Contrary relay is down RWKR↓ & RWR↓ in NWKR↑ and vice versa.
8. The logic for NWKR/RWKR for the given yard is as shown in 7-8.

RDSO Report No. SS/155/2019 Page 68 of 174

Standardisation of typical circuits for EI-2019

RDSO Report No. SS/155/2019 Page 69 of 174

Standardisation of typical circuits for EI-2019

7-9 INTERFACE POINT OPERATION CIRCUITS (NWCZR/RWCZR/WCZR)

As discussed above, point switching logic (NWCR/RWCR) is final logic, which shall derive the point to the desired position. Thus
NWCR shall operate the point to Normal and RWCR shall operate the point to Reverse. Since point is very signalling function and
even a momentary output for few seconds may either unlock the point or operate it, thus it is decided that point operation in each
direction compulsorily be through two output relays. These two output bits must be derived from two different output cards of EI.
The third output bit of WJR.J is also derived.

The output relay of NWCR bit is defined as NWCZR, while that of RWCR is RWCZR and for WJR is WCZR. All these three Point
deriving relays i.e. NWCZR/RWCZR and WCZR are with Heavy duty contact for point operation (QBCA1).

The point is operated externally using these output relays along with latch relay deployed externally. Latch relay is proposed to
obtain double cutting in Point Detection Logics as well as to achieve the external cross protection feature. Also during EI powering
on, this latch relay determines the last operated position of point. If position of latch relay also corresponds with site position of
point, it provides EI the required point position as last operated.

In this circuit following sequence will work

a) Point operated to Normal – EI Output NWCR↑ - delivers output. This supply then extended to Reset (Delatch) the Reverse
latch with RWZR↑, Set the Normal latch NWZR ↑ with RWZR↓ and Pickup the NWCZR.
b) Point operated to Reverse – EI Output RWCR↑ - delivers output. This supply then extended to Reset (Delatch) the Normal
latch, Set the Reverse latch and Pickup the RWCZR.
c) WCZR pick up from EI output of WJR.J.
d) Thus EI output is first setting the latch and then only point driving relay picksup.
e) Back contacts of other contrary relays are proved.
f) As soon as the point detection is received, the supply to point motor is disconnected due to picking up of external point
detection relay i.e. NDKR/RDKR.
g) The circuit for NWKR/RWKR for the given yard is shown in 7-9.

RDSO Report No. SS/155/2019 Page 70 of 174

Standardisation of typical circuits for EI-2019

RDSO Report No. SS/155/2019 Page 71 of 174

Standardisation of typical circuits for EI-2019

7-10 EXTERNAL POINT DETECTION CIRCUITS (NDKR/RDKR)

This external relay pick up when point is correctly set in the desired position and its position corresponds with Latch relay position.
In this circuit following conditions are ensured:
i) Point is correctly set in desired direction. Detection supply comes from the point detection contacts.
ii) External latch relay position corresponds with the point setting conditions.
iii) Cross protection is provided by contrary latch relay.
iv) The circuit for NDKR/RDKR for the given yard is shown in 7-10.

RDSO Report No. SS/155/2019 Page 72 of 174

Standardisation of typical circuits for EI-2019

RDSO Report No. SS/155/2019 Page 73 of 174

Standardisation of typical circuits for EI-2019

CHAPTER- 8
Route Checking Logic (UCR)

RDSO Report No. SS/155/2019 Page 74 of 174

Standardisation of typical circuits for EI-2019

8. Route Checking Logic (UCR)

1. UCR is route checking bit and normal position of UCR is ↓.

2. 2nd stage interlocking is ensured in this logic circuit.
3. Each signal (Main, Calling on & Shunt) will have UCR for each route.
4. Route checking process takes place when route is successfully initiated.
5. All the points in route/ isolation/ OV (as the case may be) are controlled to the required position and detected.
6. Conflicting signals are not approach locked.
When all the above conditions are satisfied, the route will be checked and set.

8.1. Main Signal Route Checking Logic (S17 UCR)

The following is to be proved in main signal UCR logic-
1. The concerned points in the route/isolation/overlap are in the required position (NWKR/RWKR ↑).
2. Conflicting routes including overlap are not set (ASR ↑). (Though this is redundant, but as a second level vital locking,
it is recommended for retention. Moreover, LR↓ as soon as train enters the signal but route remain held since ASR↓
till complete arrival of train, hence recommended for retention of ASR.)
3. Concerned LR is ↑.
4. Conflicting locking common to all UCR is proved in main UCR.
5. Calling on UCR ↓ is proved in main UCR.
6. Conditional locking of points for isolation purpose if any.
7. All individual route UCRs are parallel to make main UCR.
8. UCR↓ as soon as its LR↓ (due to arrival of train or due to cancellation)

Note:-There are as many UCRs as many route of signal.

RDSO Report No. SS/155/2019 Page 75 of 174

Standardisation of typical circuits for EI-2019

8-1A

1 2 1 2 6 3
101/102 103/104 105/106 109/110 111/112 S28 C28 SH28 OV28 SH25 153/154 S38 C38 SH66 C36 SH64 S17_01A S17_01A
NWKR NWKR NWKR RWKR NWKR ASR ASR ASR SR ASR NWKR ASR ASR ASR ASR ASR LR UCR

151/152
RWKR

1 2 3
153/154 151/152 S36 C36 SH64 S17_01B S17_01B
1 RWKR NWKR ASR ASR ASR LR UCR
111/112 105/106
NWKR NWKR

1 2 1 2 6 3
101/102 103/104 107/108 109/110 S28 C28 SH28 OV28 SH25 153/154 S38 C38 SH66 C36 SH64 S17_01C S17_01C
NWKR RWKR NWKR NWKR ASR ASR ASR SR ASR NWKR ASR ASR ASR ASR ASR LR UCR

151/152
RWKR

1 2 3
153/154 151/152 S36 C36 SH64 S17_01D S17_01D
RWKR NWKR ASR ASR ASR LR UCR

1 2 1 2 3
101/102 103/104 105/106 109/110 S26 C26 SH26 OV26 151/152 153/154 SH27 S36 C36 SH64 S17_02 S17_02
NWKR NWKR NWKR NWKR ASR ASR ASR SR RWKR NWKR ASR ASR ASR ASR LR UCR

S17UCR LOGIC

RDSO Report No. SS/155/2019 Page 76 of 174

Standardisation of typical circuits for EI-2019

8-1B

1 2 6 3
1
101/102 103/104 105/106 109/110 S24 C24 SH24 OV24 151/152 C36 SH64 S17_03A S17_03A
NWKR NWKR RWKR NWKR ASR ASR ASR SR NWKR ASR ASR LR UCR

153/154
RWKR

1 2 3
151/152 153/154 SH29 S36 C36 SH64 S17_01D S17_01D
RWKR NWKR ASR ASR ASR ASR LR UCR

4 5 7
C17 SH17 S12 S16 C16 SH16 SH19 OV16 C17 S17_01A S17
ASR ASR ASR ASR ASR ASR ASR SR UCR UCR UCR

S17_01B
UCR

S17_01C
UCR

S17_01D
UCR

S17_02
UCR

S17_03A
UCR

S17_03B
UCR

S17UCR LOGIC

RDSO Report No. SS/155/2019 Page 77 of 174

Standardisation of typical circuits for EI-2019

8.2 Calling on UCR Logic–

The following are to be proved in Co-UCR logic:

The following is to be proved in Calling on UCR logic-

1. The concerned points in the route/isolation are in the required position (NWKR/RWKR ↑).
2. Conflicting routes are not set (ASR ↑).
3. Concerned LR is ↑.
4. Conflicting locking common to all UCR is proved in main UCR.
5. Main signal UCR ↓ is proved in Calling on UCR.
6. All individual route UCRs are parallel to make main UCR.

Note:-There are as many UCRs as many route of calling on signal.

8.3 Shunt UCR Logic–

The following is to be proved in shunt signal UCR logic-

1. The concerned points in the route/isolation are in the required position (NWKR/RWKR ↑).
2. Conflicting routes are not set (ASR ↑).
3. Concerned LR is ↑.
4. All individual route UCRs are parallel to make main UCR.

Note:-There are as many UCRs as many route of shunt signal.

RDSO Report No. SS/155/2019 Page 78 of 174

Standardisation of typical circuits for EI-2019
8-2

1 2 3
101/102 103/104 105/106 109/110 111/112 S28 C28 SH28 OV28 SH25 S38 C38 SH66 S36 C36 SH64 C17_01A C17_01A
NWKR NWKR NWKR RWKR NWKR ASR ASR ASR SR ASR ASR ASR ASR ASR ASR ASR LR UCR

151/152
RWKR

1 2 3
101/102 103/104 105/106 107/108 109/110 S28 C28 SH28 OV28 SH25 S38 C38 SH66 S36 C36 SH64 C17_01C C17_01C
NWKR RWKR NWKR NWKR NWKR ASR ASR ASR SR ASR ASR ASR ASR ASR ASR ASR LR UCR

151/152
RWKR

1 2
101/102 103/104 105/106 109/110 S26 C26 SH26 OV26 SH27 S36 C36 SH64 S29 C29 SH29 S25 C25 SH25
NWKR NWKR NWKR NWKR ASR ASR ASR SR ASR ASR ASR ASR ASR ASR ASR ASR ASR ASR
a
153/154
3 NWKR
C17_02 C17_02
LR UCR
a

1 2 2 3
101/102 103/104 105/106 109/110 S24 C24 SH24 OV24 S36 C36 SH64 C17_03A C17_03A
NWKR NWKR RWKR NWKR ASR ASR ASR SR ASR ASR ASR LR UCR

4 151/152 153/154
5 6
NWKR RWKR
SH17 S12 S16 C16 SH16 SH19 OV16 S17 C17_01A C17
ASR ASR ASR ASR ASR ASR SR UCR UCR UCR

C17_01C
UCR

C17_02
UCR

C17_03A
UCR

RDSO Report No. SS/155/2019 Page 79 of 174

C17UCR LOGIC
Standardisation of typical circuits for EI-2019

8-3

1 2 3
101/102 103/104 107/108 105/106 109/110 10 C11 C38 SH66 C36 SH64 SH17_SD1 SH17_SD1
NWKR RWKR RWKR NWKR NWKR ASR ASR ASR ASR ASR ASR LR UCR

151/152
RWKR

1 2
101/102 103/104 S24 C24 SH24 OV24 S26 C26 SH26 OV26 S28 C28 SH28 OV28
NWKR NWKR ASR ASR ASR SR ASR ASR ASR SR ASR ASR ASR SR
a

109/110
2 3 NWKR

S36 C36 C36 SH17_2T SH17_2T

ASR ASR ASR LR UCR
a

151/152
RWKR

153/154
RWKR

2 4
12 C13 S17 C17 S16 C16 SH16 SH17_SD1 SH17
ASR ASR ASR ASR ASR ASR ASR UCR UCR

S17_2T
UCR

SH17 UCR LOGIC

RDSO Report No. SS/155/2019 Page 80 of 174

Standardisation of typical circuits for EI-2019

CHAPTER-9
Approach Locking Logic (ASR)

RDSO Report No. SS/155/2019 Page 81 of 174

Standardisation of typical circuits for EI-2019

9 Approach Locking Logic (ASR)

Every signal (Main/C-On/SH) has ASR (Approach Lock Stick Relay). Its normal is up. It is used to set the route when down and
also for locking of conflicting routes.

9.1 S17 ASR LOGIC:-

The following are to be proved in ASR logic for Main Signal:

1. Signal has been put back to ON (All controlling relays and OFF-ECRs are down).
2. All back lock TPRs UP to prove that train has arrived completely and also to pick up ASR at the time of EI start up/reboot
after 120 sec.
3. All UYRs pick up to be proved in series for releasing the route on movement of the train. (UYR1_6 represents Series
contacts of UYR1, UYR2, UYR3, UYR4, UYR5, UYR6)
4. Emergency Route Release path. TSR front contact is proved that train has not passed the signal.
5. Approach track clear path.
6. EI start up/ reboot path.
7. Emergency sub-route cancellation path. EMKEY _INR back contact is proved to enable route release after emergency key
has been taken out by ASM.
8. Hold-up path.
9. ATR (Approach Track Relay) logic. All approach track circuits are to be proved clear.

RDSO Report No. SS/155/2019 Page 82 of 174

Standardisation of typical circuits for EI-2019

9-1
9
BXT C13T 13T 04T S17
TPR TPR TPR TPR ATR

1 2
S17_01A S17_01B S17_01C S17_01D S17_02 S17_03A S17_01B 1T 2T 3T 4T 8T 11T 12T 13T 14T
LR LR LR LR LR LR LR TPR TPR TPR TPR TPR TPR TPR TPR TPR
a
105/106 105/106 103/104 103/104 105/106
RWR NWR NWR NWR RWR

103/104 109/110
RWR NWR

b
1
S_C_SH17 S_C_SH17 S_C17 S17 S17 S17_01 S17_03 S17 S17 S17 S17 S17
TSR EUUYR UYR1_6 HR DR UHR UHR HECR DECR UECR UCR ASR
3
a

S_C_SH17 S_C_SH17 S_C_SH17

EUUYR JSLR JR
4

S17
ATR
5

SYSINIT
6

S_C_SH17 S_C_SH17
ESUYR JR EMKEY_INR
7
b

S17
ASR 8

S17 ASR LOGIC

RDSO Report No. SS/155/2019 Page 83 of 174

Standardisation of typical circuits for EI-2019

9.2 C17 ASR LOGIC:-

The following are to be proved in ASR logic of Calling on Signal:

1. Signal has been put back to ON (All controlling relays and OFF-ECRs are down).
2. All back lock TPRs UP to prove that train has arrived completely and also to pick up ASR at the time of EI start up/reboot
after 120 sec.
3. All UYRs pick up to be proved in series for releasing the route on movement of the train. (UYR1_6 represents Series
contacts of UYR1, UYR2, UYR3, UYR4, UYR5, UYR6)
4. UYRs pick up for releasing the route on movement of the train.
5. Emergency Route Release path. TSR is not taken so that calling on route can be released even when all the tracks are
failed since calling on may come on occupied line.
6. EI start up/ reboot path.
7. Emergency sub-route cancellation path. EMKEY _INR back contact is proved to enable route release after emergency key
has been taken out by ASM.
8. Hold-up path.

9.3 SH17 ASR LOGIC:-

The following are to be proved in ASR logic for Shunt Signal:

1. Signal has been put back to ON (All controlling relays and OFF-ECRs are down).
2. All back lock TPRs UP to prove that train has arrived completely and also to pick up ASR at the time of EI start up/reboot
after 120 sec.
3. All UYRs pick up to be proved in series for releasing the route on movement of the train. (UYR2_4 represents Series
contacts of UYR2, UYR3, UYR4)
4. UYRs pick up for releasing the route on movement of the train.
5. Time release 120 sec path in case of single track
6. Emergency Route Release path.
7. Approach track clear path.
8. EI start up/ reboot path.
9. Emergency sub-route cancellation path. EMKEY _INR back contact is proved to enable route release after emergency key
has been taken out by ASM.
10. Hold-up path

RDSO Report No. SS/155/2019 Page 84 of 174

Standardisation of typical circuits for EI-2019

9-2

1 2
C17_01A C17_01C C17_02 C17_03A 1T 2T 3T 4T 8T 11T 12T 13T 14T
LR LR LR LR TPR TPR TPR TPR TPR TPR TPR TPR TPR
a
105/106 105/106 103/104 103/104 105/106
RWR NWR NWR NWR RWR

103/104 109/110
RWR NWR

b
1
S_C_SH17 S_C_SH17 S_C17 C17 C17 C17 C17
TSR EUUYR UYR1_6 HR HECR UCR ASR
3
a

S_C_SH17 S_C_SH17 S_C_SH17

EUUYR JSLR JR
4

SYSINIT
5

S_C_SH17 S_C_SH17
ESUYR JR EMKEY_INR
6
b

C17
ASR 7

C17ASR LOGIC

RDSO Report No. SS/155/2019 Page 85 of 174

Standardisation of typical circuits for EI-2019

9-3

1 2 3 4 1
SH17_2T SH17_SD1 1T 2T 11T 12T 16T S_C_SH17 S_C_SH17 SH17 SH17 SH17 SH17 SH17 SH17
LR LR TPR TPR TPR TPR TPR TSR EUUYR UYR1 UYR.JR HR HECR UCR ASR

3
103/104 SH17
NWR UYR2_4

S_C_SH17 S_C_SH17 S_C_SH17

EUUYR JSLR JR 5

04T
TPR 6

SYSINIT
7

S_C_SH17 S_C_SH17
ESUYR JR EMKEY_INR
8

SH17
ASR
9

SH17ASR LOGIC

RDSO Report No. SS/155/2019 Page 86 of 174

Standardisation of typical circuits for EI-2019

9.4 OVSR (OVERLAP STICK RELAY) LOGIC:-

OVSR is provided to hold the route in overlap portion. Its normal position is up. It drops when ASR drops.

The following are to be proved in OVSR logic:

1. Concerned route LR / UCR are down. LR & UCR taken in parallel so that OVSR drops only when route is checked and set.
2. Time release path. Provided to release OVSR
a) When train is on berthing track and route in rear is released.
b) In case of emergency overlap cancellation.
3. Overlap release path in case signal route is cancelled and also in case of run-through train.
4. Overlap release path in case EI start-up/reboot. In this case overlap will be immediately released only when route is
released.
5. Hold-up path.
6. Timer Initiation path in case of train is standing on berthing track.
7. Timer Initiation path in case of emergency overlap cancellation is initiated.
8. OV25UYR hold up path.
9. Timer circuit for overlap release.
10. Overlap counter logic for emergency overlap release.

RDSO Report No. SS/155/2019 Page 87 of 174

Standardisation of typical circuits for EI-2019

9-4A
1
S17_01A S17_01B S17_01C S17_01D S15_01A S15_01B OV25 OV25 OV25
UCR UCR UCR UCR UCR UCR UYR JR SR
2

S17_01A S17_01B S17_01C S17_01D S15_01A S15_01B 01T 01AT S15 S17
LR LR LR LR LR LR TPR TPR ASR ASR
3

4 103/104 109/110
SYSINIT NWR NWR

105/106
RWR

OV25
SR 5

S17_01A S17_01B S17_01C S17_01D S15_01A S15_01B OV25 S15 S17 01T OV25
LR LR LR LR LR LR SR ASR ASR TPR UYR
6

103/104 109/110 01AT

NWR NWR TPR

105/106
RWR
01A
OYNR UNR
7
01B
UNR

01C
UNR

01D
UNR
OV25 OV25 SR LOGIC
UYR
8

RDSO Report No. SS/155/2019 Page 88 of 174

Standardisation of typical circuits for EI-2019

9-4B

OV25 OV25
UYR JSLR

9
OV25 OV25
JSLR JR

(120 SEC)

OV25 OV25 10
SR UYR OYNR OYNZ

OV26 OV26
SR UYR

OTHER
OV2s

OV25 SR LOGIC

RDSO Report No. SS/155/2019 Page 89 of 174

Standardisation of typical circuits for EI-2019

9.5 TRACK STICK RELAY (TSR) LOGIC

TSR is named after the signal and used to ensure one signal one train only. TSR drops as soon as train passes the signal
and pick up only when complete sequence is normalised i.e. all concerned LR↓ and all concerned ASR↑.
Generally each signal will have one TSR. Common TSR can be provided for many signals which are conflicting to each
other.

In TSR logic the following are proved-.

1. First controlling track of the signal is clear.(TPR up)
2. The concerned signal all route LR down and ASR up.
3. Hold-up path
4. TSR slow to release (STR), 500ms to eliminate signal failure due to track bobbing.

RDSO Report No. SS/155/2019 Page 90 of 174

Standardisation of typical circuits for EI-2019

9-5
1 2
1T S17 C17 SH17 S17_01A S17_01B S17_01C S17_01D S17_02 S17_03A S17_03B
TPR ASR ASR ASR LR LR LR LR LR LR LR
a

C17_01A C17_01C C17_02 C17_03A SH17_SD1 S17_2T S_C_SH17

LR LR LR LR LR LR TSR
a

3 500ms
STR
S_C_SH17 4
TSR

TSR LOGIC

RDSO Report No. SS/155/2019 Page 91 of 174

Standardisation of typical circuits for EI-2019

CHAPTER-10:
Route Release by Train (UYR) LOGIC

RDSO Report No. SS/155/2019 Page 92 of 174

Standardisation of typical circuits for EI-2019

10. Route release by Train (UYR) LOGIC:-

UYR Logic prepared to release the set route when train movement is completed. UYRs are picked up in sequential manner by
dropping of at least two track circuits and picking up the tracks in sequence.

10.1 Main Signal S17 UYR Logic

The following are to be proved in UYR logic:

1. Concerned route is set.

2. Sequential dropping & picking of track.
3. Hold-up path.
4. Next UYR will pick up after 1st UYR pick up and so on.
5. Point position of internal latch relay (NWR/RWR) is proved so that route can be released on passage of train even when
NWKR/RWKR is failed.

10.2 Shunt Signal SH17 UYR Logic

It proves that

1. Concerned route is set.

2. Sequential dropping & picking of track.
3. Hold-up path.
4. Next UYR will pick up after 1st UYR pick up and so on.
5. Point position of internal latch relay (NWR/RWR) is proved so that route can be released on passage of train even when
NWKR/RWKR is failed.
6. Time release logic 120sec. in case of single track in the route.

RDSO Report No. SS/155/2019 Page 93 of 174

Standardisation of typical circuits for EI-2019

10-1A
1 2 5
S17 1T 2T 3T 103/104 S_C17
ASR TPR TPR TPR NWR UYR1

C17 11T 103/104

ASR TPR RWR
3
S_C17
UYR1

4
S_C17 2T 3T 4T 105/106 103/104 S_C17
UYR1 TPR TPR TPR NWR NWR UYR2

8T 105/106
TPR RWR

11T 12T 103/104

TPR TPR RWR

S_C17
UYR2

S_C17 3T 4T 13T 109/110 103/104 S_C17

UYR2 TPR TPR TPR RWR NWR UYR3

109/110
NWR

8T 105/106
TPR RWR

11T 12T 13T 103/104

TPR TPR TPR RWR

S_C17
UYR3
S_C17 UYR LOGIC

RDSO Report No. SS/155/2019 Page 94 of 174

Standardisation of typical circuits for EI-2019

10-1B
S_C17 4T 02T/02AT 109/110 105/106 103/104 S_C17
UYR3 TPR TPR NWR NWR NWR UYR4

13T 14T 109/110

TPR TPR RWR

8T 03T/03AT 105/106
TPR TPR RWR

12T 13T 14T 103/104

TPR TPR TPR RWR

S_C17
UYR4

S_C17 13T 14T S_C17

UYR4 TPR TPR UYR5

103/104 105/106 109/110

NWR NWR NWR

105/106
RWR
S_C17
UYR5

S_C17 14T 01T/01AT S_C17

UYR5 TPR TPR UYR6

103/104 105/106 109/110

NWR NWR NWR

105/106
RWR
S_C17
UYR6

S_C17 UYR LOGIC

RDSO Report No. SS/155/2019 Page 95 of 174

Standardisation of typical circuits for EI-2019

10-2
1 2
SH17 1T 2T 11T SH17
ASR TPR TPR TPR UYR1

5
3 103/104
SH17 NWR
UYR1
4
SH17 2T 11T 12T 103/104 103/104 SH17
UYR1 TPR TPR TPR RWR RWR UYR2

SH17
UYR2

SH17 11T 12T 16T 107/108 SH17

UYR2 TPR TPR TPR RWR UYR3

SH17
UYR3

SH17 12T 16T 107/108 SH17

UYR3 TPR TPR RWR UYR4

SH17
UYR4

SH17 1T 103/104 SH17

UYR1 TPR NWR 6 UYR.JSLR

SH17 SH17
UYR.JSLR UYR.JR

(120 SEC)
SH17 UYR LOGIC

RDSO Report No. SS/155/2019 Page 96 of 174

Standardisation of typical circuits for EI-2019

CHAPTER-11:
Route Release by cancellation

RDSO Report No. SS/155/2019 Page 97 of 174

Standardisation of typical circuits for EI-2019

11-1 EMERGENCY ROUTE RELEASE LOGIC (EUUYR):-

Emergency Route release is provided to release the route of a given signal when train has not passed the signal.
The following are to be proved in S_C_SH17 EUUYR logic:

1. The signal has been put back to ON. Signal controlling relays HR down and route initiation relay LR are down.
2. Back lock TPRs are UP
3. Train has not passed the signal (TSR up) except Calling ON route release.
4. Emergency route release command is initiated for calling on C17 ensuring that shunt route is not set.
5. Emergency Route release command is initiated for main signal S17 ensuring that shunt route is not set.
6. Emergency route release command is initiated for shunt signal SH17 ensuring that Main and Calling on route is not set.
7. Emergency sub route cancellation is not initiated.
8. SYSON↑
9. Timer logic starts for 120 second delay.

11-2 EMERGENCY SUB-ROUTE CANCELLATION LOGIC (ESUYR):-

Emergency Sub-Route cancellation is provided to release the route of a given signal when route release by EUUYN is not possible
for any reason.
The following are to be proved in S_C_SH17 ESUYR logic:

1. The signal has been put back to ON. Signal controlling relays HR down and route initiation relay LR are down.
2. Emergency route release command is initiated for calling on C17 ensuring that shunt route is not set.
3. Emergency Route release command is initiated for main signal S17 ensuring that shunt route is not set.
4. Emergency route release command is initiated for shunt signal SH17 ensuring that Main and Calling on route is not set.
5. Emergency route release cancellation is not initiated.
6. SYSON ↑
7. Timer logic starts for 120 second delay.

RDSO Report No. SS/155/2019 Page 98 of 174

Standardisation of typical circuits for EI-2019 11-1
1
S17 C17 SH17 S17_01A S17_01B S17_01C S17_01D S17_02 S17_03A S17_01B C17_01A C17_01C C17_02
HR HR HR LR LR LR LR LR LR LR LR LR LR
a
1 2
C17_03A C17_SD1 C17_2T 1T SH17 2T 103/104 3T 8T 105/106
LR LR LR TPR ASR TPR NWR TPR TPR RWR
a b
4T 105/106 109/110
TPR NWR NWR

109/110 13T 14T

RWR TPR TPR
103/104 11T 12T
RWR TPR TPR

SH17 103/104 2T 11T 12T 16T

ASR RWR TPR TPR TPR TPR

103/104
NWR

4 7 8
C17 SH17 C17 S_C_SH17
ASR ASR GNR EUUYNR ESUYR SYSON
EUUYR
b
S_C_SH17
EUUYR
3
S_C_SH17 S17 SH17 S17 5
TSR ASR ASR GNR EUUYNR

S_C_SH17
EUUYR

SH17 S17 C17 SH17 6

ASR ASR ASR GNR EUUYNR

S_C_SH17
EUUYR

S_C_SH17 EUUYR LOGIC

RDSO Report No. SS/155/2019 Page 99 of 174

Standardisation of typical circuits for EI-2019

11-2
1
S17 SH17 C17 S17_01A S17_01B S17_01C S17_01D S17_02 S17_03A S17_01B C17_01A C17_01C C17_02
HR HR HR LR LR LR LR LR LR LR LR LR LR
a

1
C17_03A C17_SD1 C17_2T SH17 C17 C17 2 5 6 S_C_SH17
LR LR LR ASR ASR GNR EUUYNR EUUYR SYSON
ESUYR
a
S_C_SH17
EUUYR

S17 S17 3
ASR GNR EUUYNR

S_C_SH17
EUUYR

7 SH17 S17 C17 S17 4

S_C_SH17 S_C_SH17 ASR ASR ASR GNR EUUYNR
EUUYR JSLR
S_C_SH17
S_C_SH17 EUUYR
ESUYR

7
S_C_SH17 S_C_SH17
JSLR JR

(120 SEC)

S_C_SH17 ESUYR LOGIC

RDSO Report No. SS/155/2019 Page 100 of 174

Standardisation of typical circuits for EI-2019

11-3 EUUYZ/ ESUYZ COUNTER LOGIC:-

Cancellation Counter Logic is provided to register the emergency operation of Route release by concerned cancellation operation

In Counter logic, following is to be proved.

1. When cancellation process starts EUUYR/ESUYR pick up.

2. As soon as the concerned JSLR pickup, counter gets increment.
3. This ensures counter increment at the start of cancellation.
4. In case of normal cancellation (EUUYR), no time delay in case Approach locking is provided.
5. In case of Emergency Cancellation (ESUYR), Timer delay of 120 sec is essential.

RDSO Report No. SS/155/2019 Page 101 of 174

Standardisation of typical circuits for EI-2019

11-3
1
S_C_SH17 S_C_SH17
EUUYR JSLR EUUYZ

S_C_SH16 S_C_SH16
EUUYR JSLR

LIKE WISE
OTHER SIGNAL

1
S_C_SH17 S_C_SH17
ESUYR JSLR ESUYZ

S_C_SH16 S_C_SH16
ESUYR JSLR

LIKE WISE
OTHER SIGNAL

EUUYN & ESUYN

COUNTER LOGIC

RDSO Report No. SS/155/2019 Page 102 of 174

Standardisation of typical circuits for EI-2019

CHAPTER- 12
SIGNAL CLEARANCE LOGIC (HR)

RDSO Report No. SS/155/2019 Page 103 of 174

Standardisation of typical circuits for EI-2019

12- SIGNAL CLEARANCE LOGIC (HR)

Signal clearance takes place when the corresponding route is initiated (LR↑ / OVLR↑), route is set (UCR↑), and locked
(ASR↓ and WLR↓).

MAIN SIGNAL CLEARANCE

Main Signals are cleared to ‘OFF’ Aspect after successful route setting and approach locking. There are several conditions
for mains signal clearance depending upon the type of main signal. (viz. Home, Starter etc.)

12-1 Home Signal Control- MAIN LINE YELLOW ASPECT without Route Indicator (HR↑)

1. Route cancellation is not initiated, i.e. (EUUYR/ESUYR/JSLR↓). The back contact of the concerned ‘OVJSLR↓’ is also
must be proved.
2. It should be proved that the sequential proving Relays (UYRs↓) are dropped after the previous train movement.
3. Route is initiated i.e. LR ↑
4. Concerned points in the route, overlap and isolation are correctly set, locked and detected – concerned NWKR/RWKR↑
and concerned WLR↓ to be proved.
5. It should be proved that concerned crank handle(s) is/are locked in the EKT meant for it – CHNPR↑ front contact.
6. Route is checked i.e. UCR ↑
7. All Track Circuits in the route & overlap (including Fouling Tracks, if any), berthing tracks are clear i.e. concerned TPRs↑
8. One signal one train feature by proving i.e. Track Stick Relay is energized TSR↑
9. It should be proved that the – (i) Route is locked i.e. ASR↓ back contact is proved. (ii) Overlap is locked- OVSR↓ back
contact is proved.
10. Next Stop Signal is not blanked i.e. ECPR↑
11. All diversion relays are de-energized i.e. UHRs↓ and All diversion route lamp checking relay is de-energized i.e. UECRs↓
12. Level Crossing gate closed, locked & detected i.e. LX-NPR↑
13. Conflicting Signals of same post are not cleared i.e. SH HR/CO HR↓

RDSO Report No. SS/155/2019 Page 104 of 174

Standardisation of typical circuits for EI-2019

RDSO Report No. SS/155/2019 Page 105 of 174

Standardisation of typical circuits for EI-2019

12-2 Home signal Control- Loop Line YELLOW aspect with Route Indicator (UHR)
.

Route indicators are provide on Home Signal in general to inform the driver if the route is set for a moment in the diverted
point position. This will allow the driver of the train to control the speed applicable to pass on the points.. A route indicator is
controlled to OFF aspect when the corresponding signal control conditions (HR.INT ↑) are satisfied.

1. Route cancellation is not initiated, i.e. (EUUYR/ESUYR/JSLR↓). The back contact of the concerned ‘OVJSLR↓’ is also
must be proved.
2. It should be proved that the sequential proving Relays (UYRs↓) are dropped after the previous train movement.
3. Route is initiated i.e. LR ↑
4. Concerned points in the route, overlap and isolation are correctly set, locked and detected – concerned NWKR/RWKR↑
and concerned WLR↓ to be proved.
5. It should be proved that concerned crank handle(s) is/are locked in the EKT meant for it – CHNPR↑ front contact.
6. Route is checked i.e. UCR ↑
7. All Track Circuits in the route & Overlap (including Fouling Tracks, if any), berthing tracks are clear i.e. concerned
TPRs↑
8. One signal one train feature by proving i.e. Track Stick Relay is energized TSR↑
9. It should be proved that the –
(i) Route is locked i.e. ASR↓ back contact is proved.
(ii) Overlap is locked- OVSR↓ back contact is proved.
10. Next Stop Signal is not blanked i.e. ECPR↑
11. In case of more than one diversion, it is proved that Non-required diversion control relay is de-energized. i.e. other
UHRs↓
12. Level Crossing gate closed, locked & detected i.e. LX-NPR↑
13. Conflicting Signals of same post are not cleared i.e. SH HR/CO HR↓

RDSO Report No. SS/155/2019 Page 106 of 174

Standardisation of typical circuits for EI-2019

RDSO Report No. SS/155/2019 Page 107 of 174

Standardisation of typical circuits for EI-2019

.
12-3 Home Signal Control- MAIN line green aspect (17 DR↑)

Home Signal is controlled to OFF aspect to Green, if the following conditions are satisfied:-

1) Yellow Aspect control relay is energized i.e. 17 HR↑

2) All diversion relays are de-energized i.e. 17 UHRs↓
3) All diversion route lamp checking relay is de-energized i.e. 17 UECRs↓
4) Ahead Signal Green Aspect control relay is energized i.e. 27 DR↑
5) Ahead Signal Green Lamp checking relay is energized i.e. 27 DECR↑
6) Route Initiation Relay for main line i.e. 17-02A LR↑
7) All facing points are proved normal (in case of home signal only).

RDSO Report No. SS/155/2019 Page 108 of 174

Standardisation of typical circuits for EI-2019

RDSO Report No. SS/155/2019 Page 109 of 174

Standardisation of typical circuits for EI-2019

12-4 Calling on Signal Control

Calling On signal is controlled to OFF (YELLOW) aspect if the following conditions are satisfied:-

1. Route cancellation is not initiated, i.e. (EUUYR/ESUYR/JSLR↓).

2. Control and clearing the calling on signal is logged through a counter.(See on 12-11)

3. Route is initiated i.e. LR ↑

4. All points in the route and isolation are correctly set, locked and detected i.e. concerned NWKR/RWKR↑ and concerned
WLR↓ to be proved.

5. It should be proved that concerned crank handle(s) is/are locked in the EKT meant for it – CHNPR↑ front contact.

6. Route is checked i.e. UCR ↑

7. Approach Track is occupied i.e. CO-TPR↓ for calling on signal below Home signal or berthing TPR ↓ for below starter signal
respectively.

8. (a) Necessary time delay of 60 Secs has been completed (JSLR↑,JR↑) in HR1 and the same has been de-energized in HR.

(b) In case Calling On has been provided below the starter signal, no time delay is required.

9. Route is locked i.e. ASR↓ back contact is proved.

10. Level Crossing gate closed, locked & detected i.e. LX-NPR↑

11. Conflicting Signals of same post are not cleared i.e. SH HR/Main HR↓

RDSO Report No. SS/155/2019 Page 110 of 174

Standardisation of typical circuits for EI-2019

RDSO Report No. SS/155/2019 Page 111 of 174

Standardisation of typical circuits for EI-2019

12-5 Starter Signal Control

Starter signal is controlled to OFF aspect if the following conditions are satisfied:-

1. Route cancellation is not initiated, i.e. (EUUYR/ESUYR/JSLR↓).

2. It should be proved that the sequential proving Relays (UYRs↓) are dropped after the previous train movement.

3. Route is initiated i.e. LR ↑

4. All points in the route and isolation are correctly set, locked and detected i.e. concerned NWKR/RWKR↑ and concerned
WLR↓ to be proved.

5. It should be proved that concerned crank handle(s) is/are locked in the EKT meant for it – CHNPR↑ front contact.

6. Route is checked i.e. UCR ↑

7. All Track Circuits in the route including Fouling Tracks, if any (except berthing track circuit) are clear i.e. concerned
TPRs↑

8. One signal one train feature by proving i.e. Track Stick Relay is energized TSR↑

9. Route is locked i.e. ASR↓ back contact is proved.

10. Level Crossing gate closed, locked & detected i.e. LX-NPR↑

11. Conflicting Signals of same post are not cleared i.e. CO HR/Main HR↓

12. HR of Starters signals will be slow to release 3 to 5 second for only train movement to prevent raising of signal in face of
loco pilot while shunting. It is achieved through 1st controlling track TP1R and their TSR. (See 12-12)

RDSO Report No. SS/155/2019 Page 112 of 174

Standardisation of typical circuits for EI-2019

RDSO Report No. SS/155/2019 Page 113 of 174

Standardisation of typical circuits for EI-2019

12-6 Shunt Signal Control

Shunt signal is controlled to OFF aspect if the following conditions are satisfied:-

1. Route cancellation is not initiated, i.e. (EUUYR/ESUYR/JSLR↓).

2. It should be proved that the sequential proving Relays (UYRs↓) are dropped after the previous train movement.

3. Route is initiated i.e. LR ↑

4. All points in the route and isolation are correctly set, locked and detected i.e. concerned NWKR/RWKR↑ and concerned
WLR↓ to be proved.

5. It should be proved that concerned crank handle(s) is/are locked in the EKT meant for it – CHNPR↑ front contact.

6. Route is checked i.e. UCR ↑

7. All Track Circuits in the route (including Fouling Tracks, if any), except berthing track circuit are clear i.e. concerned
TPRs↑

8. One signal one train feature by proving i.e. Track Stick Relay is energized TSR↑

9. Route is locked i.e. ASR↓ back contact is proved.

10. Level Crossing gate closed, locked & detected i.e. LX-NPR↑

11. Conflicting Signals of same post are not cleared i.e. CO HR/Main HR↓

12. HR of Shunt signals below starter is acting slow to release for 3 to 5 second for train movement only to prevent raising of
signal on the front of loco pilot. It is achieved through 1st controlling track TP1R and their TSR. (see 12-12)

RDSO Report No. SS/155/2019 Page 114 of 174

Standardisation of typical circuits for EI-2019

RDSO Report No. SS/155/2019 Page 115 of 174

Standardisation of typical circuits for EI-2019

12-7 LAMP CHECKING RELAY (MAIN ECR)

i. ECR has been provided in NX110 in the Signal lighting circuit in Relay Room itself.
ii. ECR pickup means Signal is lit at site i.e. conformity of Signal lighting in association with picking of the relevant controlling
relay.
iii. Universal ECRs are used.
iv. In case of Non picking of relevant ECR, the aspect will be downgraded to lower aspect and respective Signal aspect indication
will exhibit flashing, whereas displayed aspect will have steady indication.
v. Separate fuse of 0.63 amp. will be used for each aspect.

RDSO Report No. SS/155/2019 Page 116 of 174

Standardisation of typical circuits for EI-2019

RDSO Report No. SS/155/2019 Page 117 of 174

Standardisation of typical circuits for EI-2019

12-8 LAMP CHECKING RELAY (SHUNT & CALLING ON ECR)

i. ECR has been provided in NX110 in the Signal lighting circuit in Relay Room itself.
ii. ECR pickup means Signal is lit at site i.e. conformity of Signal lighting in association with picking of the relevant controlling
relay.
iii. In case of Independent Shunt Signal, a common GECR↑ means that Pilot Lamp along with ‘OFF’ or ‘ON’ is litting at site.
iv. When controlling Relay (SH-HR↑) along with its repeater i.e. SH HPR↑ will confirm that Independent Shunt Signal is in
‘OFF” mode.
v. When controlling Relay (SH-HR↓) along with its repeater i.e. SH HPR↓ will confirm that Independent Shunt Signal is in
‘ON” mode.

RDSO Report No. SS/155/2019 Page 118 of 174

Standardisation of typical circuits for EI-2019

RDSO Report No. SS/155/2019 Page 119 of 174

Standardisation of typical circuits for EI-2019

12-9 ROUTE LAMP CHECKING RELAY (UECR)

i. UECR has been provided in NX110 in the Route Indicator of Signal Lighting Circuit in Relay Room itself.
ii. UECR pickup means minimum 3 Lamp of Route Indicator is lit at site i.e. conformity of Route Indicator Signal lighting in
association with picking of the relevant controlling relay (UECR).

RDSO Report No. SS/155/2019 Page 120 of 174

Standardisation of typical circuits for EI-2019

RDSO Report No. SS/155/2019 Page 121 of 174

Standardisation of typical circuits for EI-2019

12-10 TIMER INITIATION RELAY (CALLING ON LOWERING)

1. In Signalling Circuit, time delay circuits are incorporated through JSLR↑ & JR↑ for Releasing/Cancellation of route,
lowering of Calling on Signal, Opening of L-xing Gates etc.
2. For lowering of Calling on Signal, UCR↑ and Calling on berthing TPR↓ is proved.

12-11 Calling on Signal Release Counter -

To facilitate lowering of Calling on Signal for any movement, a required command is given, which is duly registered in a
counter called Calling on Signal release Counter called COZ.

The same is achieved through following:-

i. Calling on releasing 60 Second timer has been elapsed JSLR↓ & JR↓.
ii. Calling on Signal control Relay COHR ↑.
iii. After this action, the Counter will be registered to next higher number.

RDSO Report No. SS/155/2019 Page 122 of 174

Standardisation of typical circuits for EI-2019

RDSO Report No. SS/155/2019 Page 123 of 174

Standardisation of typical circuits for EI-2019

RDSO Report No. SS/155/2019 Page 124 of 174

Standardisation of typical circuits for EI-2019

12-12 Slow to Release feature for Starter & its dependent shunt Controlling Relay-

Time Delay for making starter & its dependent shunt Controlling Relay slow to drop for 3 to 5 Sec time is achieved
through its controlling track circuit i.e. 1st TPR for a train movement.

1) 7 TP1R is slow to release for S-25 & Sh.25.

2) 7 TP1R, picks up through its 1st 7TPR, with Time count is not in progress & TSR is drop↓.
3) Slow to Release feature (3 to 5 sec) in the Starter and below their Shunt Controlling Relay.
4) The contact of TP1R is only used in concern TSR and HR circuits.
5) 7TP1R makes (S-25, Sh 25) HR slow to release 3 to 5 Sec for Train movement only.

RDSO Report No. SS/155/2019 Page 125 of 174

Standardisation of typical circuits for EI-2019

RDSO Report No. SS/155/2019 Page 126 of 174

Standardisation of typical circuits for EI-2019

CHAPTER- 13 :

CRANK HANDLE KEY CONTROL

AND
EMERGENCY KEY EXTRACTION

RDSO Report No. SS/155/2019 Page 127 of 174

Standardisation of typical circuits for EI-2019

13 CRANK HANDLE CONTROL LOGIC:

Crank Handle (CH) is provided to enable operation of the point in Normal or Reverse, manually. The crank handle operation can be
used for testing and during several types of failures like electrical failure of point, route/sub-route fail or during any other failure in
EI.
The interlocking of CH is by means of interlocking of CH key. The CH is not interlocked but kept under custody of SM under
physical lock and key.
The CH in IRS type point can be inserted only when its flap is opened with a CH key. As soon as the CH key is inserted and turned
to open the flap, CH contact is broken inside Point machine, which breaks the point operation circuit and point motor cannot be
operated. The second CH contact can be used in detection circuit of point for high speed direction for the machine.
CH key can be extracted under following conditions
a) Normal CH key extraction
Buttons are pressed by SM for extraction of CH key of a particular point under Normal conditions i.e. point is not locked in
route/ subroute.
b) Emergency CH Key extraction
When route/subroute is held and point is required to be operated
c) Extreme Emergency CH key extraction - When EI/VDU PC/ VDU fails
CH key can also be extracted when
1. EI fails – Under this conditions all signals assumes ON aspect and through external circuits, crank handle key of all
points are free to be extracted after a time delay of 120 secs.
2. VDU PC fails/ Communication between EI & VDU PC fails – Under this condition, EI detects the failure of communication
between EI and VDU and VDU_Fail bit in EI logic pickup. This will drop all LR and restores all signals to ON. Crank
handle key of all points are free to be extracted after a time delay of 120 secs.
3. Operating display unit fails – Under this condition, Display may be blank. Display may also go blank in above mentioned
two failure condition of failure of EI or operating PC. The SM shall then operate Extreme Emergency Control (EEC) key
along with pressing of a self restoring button. This will put all signals to ON and crank handle key of all points are free to
be extracted after a time delay of 120 secs

The circuit for Crank Handle control logic for the given yard is as follow:

RDSO Report No. SS/155/2019 Page 128 of 174

Standardisation of typical circuits for EI-2019

13-1 NORMAL CH KEY EXTRACTION CONTROL (CH01YR)

In this circuit following conditions are ensured:
1) SM key is in
2) Point is free, WLR↑
3) Concerned CH button (NR) and GSBN Button (CH Transmit) pressed
4) All other Emergency Crank handle release are not under progress i.e. CH1EYR↓ and ECHRBPR↑
5) CH01YR↑ and sticks
6) The Crank handle control can be taken back by pressing of concern CH button and GRN (CH receive) button, but effective
only when CH key is in. i.e. CH01KLNR↑.
7) The circuit for CH01YR for normal extraction for the given yard is as follow:

13-2 EMERGENCY CH KEY EXTRACTION CONTROL (CH01EYR)

In this circuit following conditions are ensured:
1) SM key is in
2) All concerned LR↓ by proving NCR1↓ & RCR1↓. This also ensures that all concerned signals are at ON.
3) Point is locked in Route/ subroute WLR↓
4) CH Key extraction is not in process CH01YR↓ and to ensure one CH release per emergency operation.
5) Concerned CH button(NR) and GBN Button (CH Transmit) pressed
6) Extreme Emergency Crank handle release external relays are down i.e. ECHRBPR↑
7) CH1EYR pickup and sticks (Required for 120 secs as timer is in progress and CH1YR not picked up)
8) CH01JPR↑ and after 120 second CH01JPR.J↑
9) CH1YR then pickup with CH1EYR↑ + CH1JPR.J↑ and then stick through its own contact & WLR↓ with button not press
contact
10) The circuit for CH01YR for Emergency extraction for the given yard is given in sheet 13-2.

RDSO Report No. SS/155/2019 Page 129 of 174

Standardisation of typical circuits for EI-2019

RDSO Report No. SS/155/2019 Page 130 of 174

Standardisation of typical circuits for EI-2019

13-3 CH KEY EXTRACTION EXTERNAL CIRCUIT (KLR/KLNR)

In this circuit crank handle key is extracted physically. This circuit can be built either in Relay room with CH Box in SM room, or in
Location box in case of remote control. Crank handle can be extracted when:
1) Crank Handle slot is received i.e. CH01ZYR ↑ - under Normal as well emergency key extraction from EI.
2) Extreme emergency crank handle release circuit is activated i.e. ECH_CZR↑.
3) The CH key in is detected by KLNR↑.

13-4 EXTREME EMERGENCY CH KEY EXTRACTION (EECH)

This extraction is required when either EI or VDU PC or VDU fails. In this circuit following conditions are ensured:

A) VDU PC Fails
In this circuit following conditions are ensured:
1) Since EI is working, a bit in logic VDU_Fail↑, proving EI1_PC1_COM↓, EI1_PC2_COM↓, EI2_PC1_COM↓, EI2_PC2_COM↓
in series.
2) Picking up of VDU_Fail is slow to pickup (10 second), thus momentary break may not cause all signal to go to danger
immediately.
3) VDU-Fail↑ will drop all LR, thus all signals goes to danger.
4) Further it will follow (C)(1) below.

B) EI fails
In this circuit following conditions are ensured:
1) Since EI is fail, thus all Output signal control relay HZR/DZR/SHHZR/COHZR in drop condition,
2) Further it will follow (C)(1) below.

RDSO Report No. SS/155/2019 Page 131 of 174

Standardisation of typical circuits for EI-2019

C) VDU Display Fails

In this circuit following conditions are ensured:
1) SM presses EECH key along with EECH self restoring button.
2) This will pick up ECH_PZR↑ and sticks till key is in.
3) ECH_PZR↑ will pickup ECH_PR↑ in EI, which in turn will pickup VDU_FAIL (Refer-A above)
4) ECH_PZR↑ will result in ECH_GZR ↑ provided all signal control relay HZR/DZR/SHHZR/COHZR in drop condition
5) ECH_GZR↑ will trigger 120 second time delay and pick up ECH_CZR, which release CH Key of all Crank Handles.
6) Picking up of ECH_CZR is recorded externally in a physical counter.
7) Whenever SM normalises EEC key, all these relays drops and EI can be normalised.

13-5 CH KEY INDICATION LOGIC

The indications on VDU shall be based on following logic
CONDITION INDICATIONS ON VDU
WHEN CH KEY IS IN YELLOW STEADY

CH01ZPR↑ = YELLOW STEADY

CH RELEASE COMMAND IS GIVEN BUT KEY IS NOT EXTRACTED OR CH KEY RED FLASHING
IS INSERTED BACK FOR RETURN BUT KEY RETURN COMMAND NOT
EXECUTED

CH01YR↑ + KLNR↑ = RED FLASHING

CH RELEASE COMMAND IS GIVEN AND KEY IS EXTRACTED RED STEADY

CH01YR↑ + KLNR↓ = RED STEADY

WHEN EMERGENCY KEY RELEASE COMMAND IS GIVEN BUT WAITING FOR YELLOW FLASHING
TIMER TO OVER

CH01EYR↑ + CH01YR↓ = YELLOW FLASHING

RDSO Report No. SS/155/2019 Page 132 of 174

Standardisation of typical circuits for EI-2019

RDSO Report No. SS/155/2019 Page 133 of 174

Standardisation of typical circuits for EI-2019

RDSO Report No. SS/155/2019 Page 134 of 174

Standardisation of typical circuits for EI-2019

RDSO Report No. SS/155/2019 Page 135 of 174

Standardisation of typical circuits for EI-2019

CHAPTER-14
Level Crossing Gate Control

RDSO Report No. SS/155/2019 Page 136 of 174

Standardisation of typical circuits for EI-2019

14-1 Level Crossing Gate Control

For clearance of any signal, the en-routed level crossing gate, if any, shall be closed, locked against the road traffic and
detection of the same shall be proved in the respective HR/UHR circuit of main signal, shunt signal, calling-on signal, as the
case may be :

1) LC Gate is not locked in any concern Signals route and overlap. It is achieved by picking LX-1XLR↑ which means LC
Gate is free for opening.
2) Gate can be opened after release of the route. Gate can also be opened immediately after picking of the concerned
UYR, when the train has passed the Gate.
3) Indication- RED STEADY: when gate is open, WHITE STEADY: when the gate is closed and locked, WHITE
FLASHING: when the gate is closed but slot is not taken back by the ASM.
4) Level Crossing Button with slot release buttons are pressed by ASM i.e. GSBNR↑ & LX-1NR↑ for energisation of
LX1YR↑ for opening of LC Gate.
5) After getting the slot for closing of Gate (XCKPR↑), NPR picks up when the slot is received by ASM by pressing group
button (GSBRNR↑) and the concerned LC button (LX1NR↑).
6) LX-1YR↑ repeater Relay pick up in L-xing Gumty i.e. LX1YPR↑.

RDSO Report No. SS/155/2019 Page 137 of 174

Standardisation of typical circuits for EI-2019

RDSO Report No. SS/155/2019 Page 138 of 174

Standardisation of typical circuits for EI-2019

14-2 In continuation of previous LC Gate Sheet –

1) Indication for opening L-xing slot appear as LX1YKE in Gumty through LX1YPR↑ and flashing indication also appear on
panel, till the time XCKPR ↑.
2) XCKPR↑ means L-xing is closed and locked and it is being proved in the Relay Room, which is repeater of XCKR (L-xing
closed and locked).
3) Now, Gate is opened by the Gateman by seeing Gate opening indication LXYKE.
4) Gate opened & Road Traffic passed and afterwards Gateman closes the Gate, XCKR↑ in the Gumty and XCKPR↑ in the
Relay Room as repeater of XCKR.
5) As soon as XCKPR↑ pick up in the Relay Room, flashing indication again appears on Panel.
6) On appearing flashing indication, Station Master locks the slot by pressing LX1-NR and GSBRN. Now, Gate is closed
and electrically locked, now a steady white slot lock indication appears on Panel i.e. LX1NPR↑.

RDSO Report No. SS/155/2019 Page 139 of 174

Standardisation of typical circuits for EI-2019

RDSO Report No. SS/155/2019 Page 140 of 174

Standardisation of typical circuits for EI-2019

CHAPTER-15 :Block Logic

RDSO Report No. SS/155/2019 Page 141 of 174

Standardisation of typical circuits for EI-2019

Sheet No. 15-1(1/4), 15-1(2/4), 15-1(3/4)

15-1-A DOUBLE LINE SGE BLOCK CIRCUIT

The circuit followed is not based on the typical SIP given in this report. In order to simplify the circuit, home signal has been
taken as S1 and Advance starter as S2 and arrangement of signal has been indicated on the top of sheet 15-1(1/4).

1) Block checking relay (BCR). When block handle at station BBB is moved to LC position, the LCR relay picks up at station
AAA through BCR relay. Line Clear status is taken through LCR BIT, which is taken into the EI.
2) Block checking relay (BCR). When block handle at station BBB is moved to TOL position, the TOLCR(D) relay picks up at
station AAA through BCR relay Train On Line status is taken through TOLCR(D) BIT which is taken into the EI.
3) Block Handle commutator TOL contact status of station AAA is also taken in to the EI as TOLCR(R) BIT. This will be used
during normalizing the block.
4) Train Arrival Relay i.e. TAR1↓ and TAR2↓ is taken out from the EI as a TARB output relay for granting fresh line clear to
ensure that TAR1↓ & TAR2↓ after normalization of block.
5) Door coil release relay (DCR) picks up in the EI and its interface relay picks up for releasing the door coil. The DCR picks up
ensuring all concerned reception signals has been brought to normal and train arrives sequentially.
6) Last Vehicle checking Relay (LVR) picks up after complete arrival of train and its relevant BIT i.e. VPR (R) ↑ is taken into the
EI through Axle counter.
7) First Vehicle checking Relay (FVR) i.e. VPR (D) ↑ goes into the EI.
8) Block release:
a) TAR1 ↑ whenever ASM moves handle towards TOL. The TAR1 picks up in two ways.
i) Through track 1T ↓ and 1AT↑.
ii) by TOLR↑ as in b) below whenever ASM turns handle to TOL after arrival of train.
b) Otherwise, there is a facility when ASM fails to move handle to TOL after train entering in block section. The TOLR relay
picks up through track 1T ↓ and 1AT↑. (to prevent block failure due to late TOL by ASM)
c) TAR2 ↑ when train moves sequentially i.e. 1T↑ and 1AT↓ and either TAR1↑ or TOLR↑. TAR2 then sticks.
9) The typical arrangement of wiring inside the block instrument is indicated.
10) BR circuit-to trigger the block release circuit during reception of train.

RDSO Report No. SS/155/2019 Page 142 of 174

Standardisation of typical circuits for EI-2019

11) Advance starter circuit:

a) Advance Starter control relay (ASCR) picks up with Line Clear (LCR↑) and SR↑. To prevent raising of advance starter
due to premature TOL, a bypass path to LCR is also provided.
b) To ensure one signal one train feature, SR has been picked up and sticks.
c) Advance Starter signal (DR) picks up with ASCR↑ and other related conditions from EI.
d) The departure buzzer and its indication on VDU with Acknowledgement feature has been provided.

RDSO Report No. SS/155/2019 Page 143 of 174

Standardisation of typical circuits for EI-2019

RDSO Report No. SS/155/2019 Page 144 of 174

Standardisation of typical circuits for EI-2019

RDSO Report No. SS/155/2019 Page 145 of 174

Standardisation of typical circuits for EI-2019

RDSO Report No. SS/155/2019 Page 146 of 174

Standardisation of typical circuits for EI-2019

Sheet No. 15-1(1/4), 15-1(2/4) , 15-1(3/4), 15-1(4/4)

15-1-B DOUBLE LINE MODIFIED SGE BLOCK(PTJ MAKE) CIRCUIT

In Double Line modified SGE Block Instrument of Podanaur make, all the features of conventional SGE double line Block
Instrument are to be adopted. Additionally one extra input bit (LCD-TOLCR : Line closed to TOL contact proving relay) to EI is
required.

RDSO Report No. SS/155/2019 Page 147 of 174

Standardisation of typical circuits for EI-2019

RDSO Report No. SS/155/2019 Page 148 of 174

Standardisation of typical circuits for EI-2019

Sheet No. 15-2(1/3), 15-2(2/3) & 15-2(3/3)

15-2 DOUBLE LINE BLOCK PROVING BY AXLE COUNTER THROUGH UFSBI ALONG WITH BLOCK PANEL

1) Advanced starter route initiation relay LR is taken out from EI for UFSBI.
2) Advanced starter controlling relay (ASCR) is taken from UFSBI into the EI for proving in the LSS control circuit.
3) BR Relay BIT comes out from the EI, proving that Home or Calling on Signal Route have been taken by proving all LR of
Home and Calling on Signal.
4) Last Vehicle checking Relay (LVR) picks up after complete arrival of train and its relevant BIT i.e. VPR (R) ↑ is taken into the
EI through Axle counter.
5) First Vehicle checking Relay (FVR) i.e. VPR (D) ↑ goes into the EI.
6) Distant/Home/Calling-on Signal Normal i.e. ON status 1GNCR BIT is taken out from the EI.
7) Advanced Starter Signal Normal i.e. ON status 2GNCR BIT is also taken out from the EI.
8) Advance Starter signal (DR) picks up with ASCR↑ and other related conditions from EI.

RDSO Report No. SS/155/2019 Page 149 of 174

Standardisation of typical circuits for EI-2019

RDSO Report No. SS/155/2019 Page 150 of 174

Standardisation of typical circuits for EI-2019

RDSO Report No. SS/155/2019 Page 151 of 174

Standardisation of typical circuits for EI-2019

RDSO Report No. SS/155/2019 Page 152 of 174

Standardisation of typical circuits for EI-2019

Sheet No. 15-3(1/3), 15-3(2/3) & 15-3(3/3)

15-3 SINGLE LINE BLOCK PROVING BY AXLE COUNTER THROUGH UFSBI ALONG WITH BLOCK PANEL

1) Advanced starter route initiation relay LR is taken out from EI for UFSBI.
2) Advanced starter controlling relay (ASCR) is taken from UFSBI into the EI for proving in the LSS control circuit.
3) BR Relay BIT comes out from the EI, proving that Home or Calling on Signal Route have been taken by proving all LR of
Home and Calling on Signal.
4) Block section clear proving Relay picks up when the block section is clear and its relevant BIT i.e. UP/DN VPR (R)↑ is taken
into the EI through Axle counter.
5) Distant/Home/Calling-on Signal Normal i.e. ON status 1GNCR BIT is taken out from the EI.
6) Advanced Starter Signal Normal i.e. ON status 2GNCR BIT is also taken out from the EI.
7) Advance Starter signal (DR) picks up with ASCR↑ and other related conditions from EI.

RDSO Report No. SS/155/2019 Page 153 of 174

Standardisation of typical circuits for EI-2019

RDSO Report No. SS/155/2019 Page 154 of 174

Standardisation of typical circuits for EI-2019

RDSO Report No. SS/155/2019 Page 155 of 174

Standardisation of typical circuits for EI-2019

RDSO Report No. SS/155/2019 Page 156 of 174

Standardisation of typical circuits for EI-2019

CHAPTER- 16 : INDICATIONS

RDSO Report No. SS/155/2019 Page 157 of 174

Standardisation of typical circuits for EI-2019

(Sheet No. 16-1)

16 INDICATIONS

Indications of various Signalling functions are being provided over the Panel/VDU or through a separate means to facilitate the
operator or maintainer to know the Status/Position of that very function. In fact, it is the true replica of the Signalling Gazette Status.
All type of actions/command and its derivatives/output is exhibited in different colours and in different forms (Steady/flashing or any
other desired feature).

1) RED LAMP INDICATION (RGKE)

(i) The concern stop signal is at ON i.e. concerned RECR↑, which gives steady Red Indication i.e. RGKE.

(ii) In case of RECR↓, along with signal control relay HR↓, it gives Red flashing indication.

2) YELLOW LAMP INDICATION (HGKE)

(i) The concern stop Signal is at ‘OFF’ with caution aspect i.e. concerned HECR↑, which gives steady Yellow Indication i.e. HGKE.

(ii) In case of HECR↓, along with signal control relay HR↑, it gives Yellow flashing indication.

3) GREEN LAMP INDICATIO (DGKE)

(i) The concern stop Signal is at ‘OFF’ with Green aspect i.e. concerned DECR↑, which gives steady Green Indication i.e. DGKE.

(ii) In case of DECR↓, along with signal control relay DR↑, it gives Green flashing indication.

4) CALLING ON LAMP INDICATION (CO-HGKE)

(i) The concerned Calling on Signal is at ‘OFF’ i.e. concerned CO-HECR↑, which gives steady Yellow Indication i.e. CO-HGKE.

(ii) In case of CO-HECR↓, along with signal control relay CO-HR↑, it gives Yellow flashing indication.

RDSO Report No. SS/155/2019 Page 158 of 174

Standardisation of typical circuits for EI-2019

RDSO Report No. SS/155/2019 Page 159 of 174

Standardisation of typical circuits for EI-2019

(Sheet No. 16-2)

5) ROUTE INITIATION CHECKING INDICATION (LRKE)

(i) Once any Route is initiated i.e. concerned LR is picked up LR↑, a steady ROUTE INITIATION CHECKING INDICATION (LRKE)
appears on the Panel/VDU.
(ii) If, LR does not pick up, it will not exhibit any indication.

6) SHUNT ‘OFF’ LAMP INDICATION (SH ‘OFF’ GKE)

(i) The concerned Shunt Signal is at ‘OFF’ i.e. concerned SH- GECR↑, along with Signal Control Relay SH-HR↑, which gives
steady Yellow Indication i.e. SH ’OFF’ GKE.
(ii) In case of SH - GECR↓, along with signal control relay SH ‘OFF’ HR↑, it gives Yellow flashing indication in ‘OFF’ position.

7) SHUNT ‘ON’ LAMP INDICATION (SH ‘ON’ GKE)

(i) The concerned Shunt Signal is at ‘ON’ i.e. concerned SH- GECR↑, along with Signal Control Relay SH-HR↓, which gives steady
Yellow Indication i.e. SH ’ON’ GKE.
(ii) In case of SH -GECR↓, along with signal control relay SH ‘ON’ HR↓, it gives Yellow flashing indication in ‘ON’ position.

8) ROUTE LAMP CHECKING INDICATION (UGKE)

(i) The concerned stop Signal diversion route indication control relay is picked up i.e. UHR↑ and minimum 3 lamps, out of 5 lamps
are in lit state i.e. UECR↑ gives steady Route lamp Checking Indication i.e. UGKE.
(ii) The concerned stop Signal diversion route indication control relay is picked up i.e. UHR↑ and minimum 3 lamps, out of 5 lamps
are not in lit state i.e. UECR↓ gives flashing Route lamp Checking Indication i.e. UGKE.

9) ROUTE CANCELLATION (NJKE)

When Cancellation (EUUYR ↑or ESUYR↑) is initiated, a flashing indication appears and after wards after completion of necessary
timing, concerned ASR↑ and route as well as NJKE indication disappears on Panel/VDU.

RDSO Report No. SS/155/2019 Page 160 of 174

Standardisation of typical circuits for EI-2019

RDSO Report No. SS/155/2019 Page 161 of 174

Standardisation of typical circuits for EI-2019

(Sheet No. 16-3)

10 ) OVERLAP INDICATION (OVKE)

(i) When overlap is set and locked, a steady indication OVKE appears with dropping of OVSR↓.
(ii) This gives flashing indication as and when overlap cancellation timer is in progress (JSLR↑) under OVSR↓.

11)POINT NORMAL INDICATION (NWKE/NWKRE)

(i) It confirms the normal status of point, which is set and locked either in route or without route.
(ii) The concerned TPR↑.
(iii) NWR↑ and NWKR↑ showing that point is set and locked in normal and latch relay is also Conforming its normal state.
(iv) It is also proved that reverse indication not available i.e. RWKR↓.
(v) It gives normal steady indication.
(vi) In case of TPR↓ with other condition as above, it will exhibit Red steady in normal position.
(vii) In case both indication relay are in dropped condition i.e. NWKR↓ and RWKR↓ with NWR↑, a flashing indication will appear in
normal position.

12)POINT REVERSE INDICATION (RWKE/RWKRE)

(i) It confirms the reverse status of point, which is set and locked either in route or without route.
(ii) The concerned TPR↑.
(iii) RWR↑ and RWKR↑ showing that point is set and locked in reverse and latch relay is also Conforming its reverse state.
(iv) it is also proved that reverse indication not available i.e. NWKR↓.
(v) It gives reverse steady indication.
(vi) In case of TPR↓ with other condition as above, it will exhibit Red steady in reverse position.
(vii) In case both indication relay are in dropped condition i.e. NWKR↓ and RWKR↓ with RWR↑, a flashing indication will appear in
reverse position.

RDSO Report No. SS/155/2019 Page 162 of 174

Standardisation of typical circuits for EI-2019

RDSO Report No. SS/155/2019 Page 163 of 174

Standardisation of typical circuits for EI-2019

(Sheet No. 16-4)

13) POINT LOCK INDICATION (WLKE)

Point locking condition is indicated with the concerned WLR↓ and it will give a steady point lock indication.

14)ROUTE WHITE /RED TRACK INDICATION (TKE/TKRE)

Route lock indication is indicated with White Colour. It proves the following :-

(i) Concerned ASR↓/LR↑.

(ii) Concerned TPR↑ will give steady White indication.
(iii) When only concerned TPR↓, it will give Red steady indication.

RDSO Report No. SS/155/2019 Page 164 of 174

Standardisation of typical circuits for EI-2019

RDSO Report No. SS/155/2019 Page 165 of 174

Standardisation of typical circuits for EI-2019

Annexure
S.No. Para of MoM dated 30.10.2018 vide Railway Board’s letter Para wise Committee’s decision over MoM.
No. 2018/Sig/36-SD/1, dtd 14.11.2018 for which action was
required to be taken by the committee.
1 1. These circuits should normally be applicable to Electronic Noted and covered in the report.
Interlocking upto 100 routes.
2 2 .Only self-restoring type push buttons to be used for CCIP. The standardisation has been recommended considering dual VDU
And for VDU, dropdown menu should be preferably used. operation only. All operation through VDU is proposed through drop
& down menu only.
3. All future EI interlocking works upto 100 routes shall be
done with dual VDU as far as possible.
Discussion on Route Initiation (LR) Circuit
3 4. As many route buttons shall be provided as the numbers of Noted and covered in the report. For VDU, the dropdown Menu is
overlaps are available. convenient which do not have restriction on number of route options as
the option for routes at particular signal appears only after clicking over
it. More detailed description can be easily provided on VDU. This shall
also avoid confusion that may occur due to multiple route buttons. An
example of such is as below:

4 5. In case of alternate paths in “route” i.e. where there is a Route button for every path should be provided including alternate
possibility of two or more combination of points setting paths. The default setting will not be provided as it will make the circuit
leading to same destination, one default route setting will be complex. In VDU operation there is provision of drop down menu where
defined. The other routes will be set as per position set by no. of routes (Path) can be considered in dropdown list.
individual setting of the alternate points.

RDSO Report No. SS/155/2019 Page 166 of 174

Standardisation of typical circuits for EI-2019

Annexure
5 6. In proposed route initiation (LR) circuit of RDSO report Noted. UYR has been preferred over TSR front contact.
(SS/137/2013), the drop contact of UYR1 may be preferred
over TSR front contact as it will facilitate setting of route if
first track circuit is failed.
6 7. Two Opposite starters or Starter at one end and Shunt No Action required for typical circuits.
Signal on other end (moving away from each other) shall be
permitted to be taken OFF simultaneously. It shall not lock
each other. This is as per Directive Principles (Para 7.8 of
release 1.0)
7 8. Shunt Signal will lock Main Signal ahead. If the situation No Action required for typical circuits.
demands to dispatch a train from siding, Starter Signal should
be provided at the siding.
8 9. Detail discussions were done for requirement to prove all Conflicting LR requiring different point setting will not come in LR
conflicting routes in LR circuit. In proposed circuit, only circuit. To overcome the possibility of conflicting LR picking up
conflicting routes which require same setting of point are simultaneously, the LR circuit is now modified. The point relays have
considered. However, if conflicting routes (requiring different been taken out of stick path and NWKR (or RWKR) has been replaced by
setting of points) are initiated almost simultaneously before NWR (or RWR) to avoid dropping of LR due break in detection
dropping of WLR, then there is possibility that conflicting (NWKR/RWKR). (Please refer Chapter 6)
routes LR can be picked up. The solution for avoiding such
situation needs to be catered by either taking all conflicting
routes or doing changes in existing proposed LR circuit.
9 10. Separate OVLR relay shall be used to simplify the circuits. It is observed that in EI there is no major restriction on the number of
logic bits, thus it is advisable to use one LR for a signal completely
covering overlap, rather than having one LR for signal and many OVLR
for overlaps. Thus the use of separate OVLR is not proposed. This also
simplifies the interlocking/initiation logic. Accordingly, separate OVLR is
not considered.

Discussion on Route Checking (UCR) Circuit

10 11. Some Railways recommended that duplicity in UCR circuit As a second level check, locking in UCR required. There is no much
like conflicting route checking which is already covered in effect in EI for keeping contacts in UCR again. (Please refer 8.1)
LR circuit may be removed in EI. This need to be studied.

RDSO Report No. SS/155/2019 Page 167 of 174

Standardisation of typical circuits for EI-2019

Annexure
Discussion on TSR circuit
11 12. Slow to release feature of 500msec for TSR is agreed. Noted.
Implementation of Railway Board’s policy on delayed Delayed replacement of starter has been taken care and is placed in
replacement of starter signal also need to be taken into concerned HR circuit. (Please refer section 12-12)
account in the standard circuits.
12 13. Minimum Track Circuit length is defined at 65 mtrs. for Does not pertain to this committee.
straight portion in Directive principles (para 3.6). Some
Railways pointed out that minimum two rail length track
circuit is also permitted as per SEM para 17.2.this needs to be
studied.
Discussion on Route locking (ASR) circuit
13 14. LC Gate - As per SEM provisions, LC Gate control should Noted. The circuits have been accordingly prepared. The LC gate proving
be last gear to be locked and first gear to be released to is done in HR logic.
cause minimum disruption to the road users. This may be
done by proving of LC gate in HR control circuit instead of
ASR Control Circuit.
14 15. In the proposed circuit, proving of readback contact of HR Noted. Reading back of all output relays for FCOR is not proposed.
in addition to internal HR is not required in ASR circuit.
Discussion on Emergency route release
15 16. Emergency route release facility (EUUYN) for situation Noted.
when train has not passed the signal as per SEM para 21.5.6
may be retained as per proposed circuit.
16 17. It was suggested that BPAC may be taken as approach Noted. BPAC has been taken in ATR of Home signal. However,
locking track circuit for Home Signal where specific approach bypassing of BPAC may affect the working of approach locking of
lock track is not provided for emergency route release circuit. Home signal, thus individual Railway has to take a decision on this
issue, as bypassing of BPAC is not covered in any standard directives.

RDSO Report No. SS/155/2019 Page 168 of 174

Standardisation of typical circuits for EI-2019

Annexure
17 18. In case of requirement to release the route when any/all Noted. This feature is part of VDU software and can be developed
backlock tracks are occupied, the provision for ASM emergency based on practice of local railway.
route release (ESUYN) may be provided with time delay of
minimum 120 seconds with physical verification of the line by
traffic representative as per SEM para 7.114, ACS 16. The
requirement of physical verification should be positively
proved. After detailed deliberation, it was decided that on VDU
screen a pop-up menu shall appear such as, “have you
physically verified the line?” Once answered ‘Yes’, system
should allow Station Master for emergency cancellation of
route. For Panel separate Key and a button shall be provided
which shall require breaking of seal.
18 19. The provision in proposed circuits for “SI emergency route Noted. The logic has been modified now.
release” without time delay should not be considered as no
such provision is given in SEM. The route release feature with
time delay is already catered for ASM.

Discussion on Sub-route release circuit

19 20. Sectional Route Release shall generally not be provided in Agreed. The logic has been designed accordingly.
yards upto 100 routes.

Discussion on Overlap locking stick relay (OVSR) circuit

20 21. There was difference in opinion in drawing the inference Noted. The concept is incorporated in typical circuit.
for SEM para 21.5.8. It was clarified that the overlap release
timer shall only initiate after both the conditions are met i.e.
berthing track is occupied and last point zone track is cleared.

21 22. Facility for emergency overlap release shall be provided. Noted. Logic has been designed with 120 sec, same can be modified to
However, the overlap shall not be released immediately as 60 Second with approval of PCSTE, as per requirement, as stipulated in
proposed in circuit. It should be released only after 120 sec SEM.
(or 60 sec with approval of PCSTE) in line with provision of
SEM para 21.5.8 ACS-7 for normal overlap release.

RDSO Report No. SS/155/2019 Page 169 of 174

Standardisation of typical circuits for EI-2019

Annexure
Discussion on Signal Control relay (HR) circuit
22 23. Cascading arrangement for Signal Aspect control Circuit Noted. This has been incorporated in circuits.
shall be provided outside EI as done conventionally. Providing
cascading inside EI may cause signal to be blank for longer
time during switching to restrictive aspect during lamp
failure.

23 24. 4 second delay in HR circuit was proposed by some of the Delay in HR Circuit is not recommended on safety consideration.
Railways to arrest Signal fly back to danger cases due to
bobbing of track. This feature is implemented in WR recently.
It should be studied in detail before taking a final decision.

24 25. Crank handle should be proved in HR circuit not in LR Noted and circuits have been modified. Similarly HR Drop has been
(Route Initiation Circuit) as done in proposed circuits. proved in CH release circuit.

25 26. Provision shall be made to enable withdrawal of crank Implemented.

handle in case both VDUs are ‘OFF’.

Discussion on Calling On Signal circuit

26 27. Directive principles para 7.16: Red lamp protection is not Not in scope of this committee.
required for subsidiary signals. This needs to be discussed in
SSC.

27 28. All isolation points in the route of calling-on-signal on Noted. The points to be taken in interlocking of calling –on signal shall
need to be taken as per para 7.11 of Directive principles. be decided by Zonal Railways and shall be reflected in selection
table/Route control Chart. The proposed logic covers all the points in
the ST/RCC.

28 29. For cancellation of calling on time delay of 120 sec to be Noted. 120 sec time delay shall be used.
provided. Few Railways informed that calling on
cancellation time is 240 seconds. It should be checked.

RDSO Report No. SS/155/2019 Page 170 of 174

Standardisation of typical circuits for EI-2019

Annexure
Discussion on Point Control and detection circuits
29 30. In the discussions of Point Control Circuit, emphasis has Noted
been made to provide a uniform circuit for use over IR.

a. The use of external Latch Relay should be studied before a. External latch relay is proposed
finalization. Provision of Stick Relay within EI may also be
studied.

b. Point Operation should generally be centralized. It should b. Point operating relays shall be placed at either centralised place or at
be inside goomti in case of distributed EI Keeping WCR distributed location.
Relay at site near point should be avoided.

c. Circuit should be designed to enable parallel operation of c. Noted and implemented

both ends of Point simultaneously.

d. Common detection of point has already been decided in d. Noted and implemented
previous SSC. It should not be changed.

30 31. Point Operation with Track Circuit failed condition in the Noted.
sub section route is allowed as per SEM Para 21.8.2. SR, SCR
and SW Railway are not using this feature. It should be
provided.

31 32. In the point feed circuit, only heavy duty contact should Operation of point by single relay and by two relays is explained in
be used with minimum 2 relays. This need to be chapter-7.
incorporated in the standard circuits.

32 33. CR raised an issue regarding provision of Crank handle in Noted and explained in chapter-13.
point detection circuit. It was clarified that Crank handle
contact shall not be provided in point detection circuit. This
will facilitate setting the route from Panel once point is set
by CH operation at site. Signal will take off only after CH is
restored and locked.

RDSO Report No. SS/155/2019 Page 171 of 174

Standardisation of typical circuits for EI-2019

Annexure
General discussion
33 34. Presently FCOR Relay has been designed in EI to reset the FCOR logic is not recommended by the committee.
EI in case of any mismatch between field and internal EI
data. Resetting of EI leads to heavy repercussions in train FCOR logic may be provided to guard against inadvertent operation of
operations. It is therefore, recommended that the provision the field gears. However, in case of Metal to Carbon interface relays,
should be made in such a way that FCOR Relay energisation reading back each output relay additionally for the purpose of FCOR
shall lead to putting back of all signals of that direction to unnecessary increases the number of additional inputs. These additional
Danger aspect sensing any mismatch between field and EI inputs are as high as the number of total vital outputs of EI which makes
control and shall not reset EI. This must give an alarm to the EI installation bigger requiring more space in relay room, more
ASM. relays, wiring and cost.
One of the EI OEM suggested that additional readback of output relays
may not be required for FCOR because EI is already getting status of
field gears through input relays like ECRs. Accordingly, the FCOR logic
can be built by the existing interface relays without requiring additional
readback of output relays. This will serve the purpose of guarding
against inadvertent operation of the field gears and at the same time
will reduce the extra EI hardware, installation size, wiring, etc.

However, readback of output relays may be provided based on the

individual OEM’s requirement to ensure SIL-4 system. Hence this
committee has not covered FCOR in its recommendation. However,In
case FCOR logic is provided, the FCOR Relay energisation shall lead to
putting back of all the signals to Danger aspect sensing any mismatch
between field and EI control and shall not reset EI. This must give an
alarm to ASM.

As the requirement of readback is stipulated in Specification for EI,

RDSO need to examine the issue detail and review instructions.

RDSO Report No. SS/155/2019 Page 172 of 174

Standardisation of typical circuits for EI-2019

Annexure
34 35. Use of non-resettable counters need to be standardized Some of the EI models used on Indian Railways do not have the fool-
for EI. proof provision for non-resettable counters in VDU. Under certain
situation, the counter in two VDUs can differ and can also be
manipulated on VDU. Hence, we may keep compact size counter box
having Electromechanical counters like an example below.

RDSO Report No. SS/155/2019 Page 173 of 174

Standardisation of typical circuits for EI-2019

RDSO Report No. SS/155/2019 Page 174 of 174