Guru Nanak Institutions Technical Campus (Autonomous)

School of Engineering & Technology

Date: 07/07/2020
Question Bank with Blooms Taxonomy Level (BTL)
Academic Year : 2020-21
Subject Name with code : Computer Organization & Architecture (18PC0CS01)
Class : II CSE 4 & 5
Name of the Faculty Member : Dr.E.Madhusudhana Reddy
Blooms Taxonomy Levels (BTL)
1. Remembering
2. Understanding
3. Applying
4. Analyzing
5. Evaluating
6. Creating
S.No Questions BTL level Course
(Select Questions from University question Bank and mention year in bracket or you (Please Outcome
may give own standard question with (new) in bracket) mention (Please
L1 or L2 mention
or etc...) CO1 or
CO2
etc…)
UNIT-I

PART –A(2 Marks)

1 Define Computer Organization & draw the block diagram of a Digital L1 CO1
Computer?(New)
2 Explain RTL .(April 2018 R16)JNTUH L1 CO1

Explain about Logical and Bit Manipulation Instructions. (May 2017) L1 CO1
3
JNTUH
4 Differentiate Jump and Loop Instructions. ( April 2018 R16)JNTUH L2 CO1

5 What is Instruction Cycle?(From Text book) L1 CO1

6 Describe BUN instruction.(Oct/Nov2016)JNTUH L1 CO1

PART-B(5 Marks)

1 Explain about the functions of CPU. May 2017 L1 CO1

2 Explain Instruction Cycle with a neat sketch? (New) L2 CO1

3 Explain the Arithmetic circuit with a neat diagram and derive the Operations? L2 CO1

4 Describe Memory Reference Instruction Oct/Nov2016 L1 CO1

5 Define interrupt and classify the interrupts? (New) L1 CO1

6 Derive the flowchart for Interrupt Cycle and explain it. (New) L2 CO1

7 Draw and explain the Design of Control Unit? (New) L2 CO1

UNIT-II

PART-A(2 Marks)

1 Describe the Effective Address. May 2017 L1 CO2

2 X=(A+B)*(C+D) ,write the Zero address instruction . Oct/Nov2016 L2 CO2

3 Describe I/O command. Oct/Nov2016 L1 CO2

4 What are the different Status bit Conditions. April 2018 R15 L1 CO2

5 Explain the format of Microinstruction? April 2018 R15 L2 CO2

6 Define different types of Interrupts. . April 2018 R15 L1 CO2

PART-B(5 Marks)

1 Evaluate X= (A+B)*(C+D) using 3 address,2 address,1 address and 0 L2 CO2

address instruction formats.
2 Explain the following Addressing Modes with suitable example each? L2 CO2
a)Direct b) Immediate c)Indexed –Addressing Modes April
2018 R13
3 Explain register Organization? April 2018 R16 L1 CO2

4 What are the different types of CPU organizations? Explain each organization L2 CO2
with an example in detail. April 2018 R13
5 Draw the circuit for program Control status bit conditions. Oct/Nov2016 L2

6 Illustrate the functioning of a Micro program Sequencer April 2018 R16 L1 CO2

7 Explain different Conditional branch Instructions with tested condition and L2 CO4
mnemonics. April 2018 R13
UNIT-III

PART-A(2 Marks)

1 Explain r’s complement with an example? (New) L2 CO3

2 Explain the IEEE Representation of Floating point numbers? (New) L1 CO3

3 Calculate 10’ complement of (2356)10? (New) L2 CO3

4 Find the binary and Octal value for (2653)10? (New) L1 CO3

5 Describe(r-1)’s complement? (New) L1 CO3

6 Calculate 2’s complement of (101011)2

PART-B(5 Marks)
Determine the 9’complement and 10’s complement for the following. L2 CO4
1 a.8567
b.1234(New)
2 Explain Addition and Subtraction Algorithm with a flowchart? (New) L1 CO4

3 Describe and explain the flowchart for Multiplication Algorithm? (New) L2 CO4

4 Explain the Division Algorithm with an example? (New) L2 CO4

Evaluate the following L2 CO4

 6-9
5
 12+8
 5-(-3) by using binary. (New)
6 Solve 04*02 with the help of Multiplication Algorithm? (New) L2 CO4

7 Explain the flowchart for BOOTH’s Algorithm? (New) L2 CO4

UNIT-IV
PART-A(2 Marks)
Define Mapping and what the different types of Mapping Techniques are. L1 CO4
1
April 2018 R15
2 Define Hit & Miss ratio? April 2018 R13 L1 CO4

3 Define Locality of Reference. April 2018 April 2018 R16 L1 CO4

4 Draw the block and Timing diagram of Handshaking. April 2018 R13,R15 L2 CO4

5 Differentiate Isolated and Memory Mapped I/O. April 2018 R16,R13,R15 L2 CO4

6 Differentiate write Through and write back. Oct/Nov2016 L1 CO4

PART-B(5 Marks)
Explain modes of data transfer with a neat diagram? April 2018 R13, L2 CO4
1
Oct/Nov2016
2 Differentiate Static and Dynamic RAM chips. April 2018 R13 L2 CO4

3 Differentiate isolated and Memory Mapped I/O. Oct/Nov2016 L2 CO4

4 Explain in detail about associative mapping technique? (New) L1 CO4

Describe IOP-CPU-IOP Communication with a neat diagram? A April 2018 L1 CO4

5
R13
What is DMA? Explain the block diagram of DMA controller? April 2018 L1 CO4
6
13, Oct/Nov2016
Differentiate Programmed I/O and Interrupt Initiated I/O modes of Data L2 CO4
7
Transfer. April 2018 R13
UNIT-V

PART-A(2 Marks)
1 Describe Pipelining? (New) L1 CO5

2 Discuss Instruction Pipelining? (New) L1 CO5

3 Compare the Characteristics of RISC & CISC? (New) L2 CO5

4 Explain Cache Coherence? April 2018 April 2018 R16 L1 CO5

5 Define Inter Process Communication? (New) L1 CO5

6 Write Vector instruction format?

PART-B(5Marks)

1 Differentiate RISC and CISC characteristics? L1 CO5

2 Explain Concept of pipelining in detail? Oct/Nov2016 L1 CO5

3 Discuss the different conflicts of Instruction pipelining and explain them? L2 CO5

4 Discuss Inter process arbitration? (New) L1 CO5

5 Write about Four-Segment Instruction pipeline? (New) L1 CO5

Explain the Multiport memory and crossbar switch interconnection structures L2 CO5
6
with a neat diagram? (New)
7 Explain about Instruction pipelining with an example. L2 CO5