0% found this document useful (0 votes)
23 views

Microprocess - New (Chapter I) 1

The document discusses the evolution and generations of microprocessors. It provides details about the Intel 8085 microprocessor including its features, functional blocks like the ALU, registers, and programming. Questions and their answers related to microprocessor fundamentals are also included.

Uploaded by

ganeshj4002g
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as PDF, TXT or read online on Scribd
0% found this document useful (0 votes)
23 views

Microprocess - New (Chapter I) 1

The document discusses the evolution and generations of microprocessors. It provides details about the Intel 8085 microprocessor including its features, functional blocks like the ALU, registers, and programming. Questions and their answers related to microprocessor fundamentals are also included.

Uploaded by

ganeshj4002g
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as PDF, TXT or read online on Scribd
You are on page 1/ 52

Chapter -I

Introduction To Microprocessor and


Organization of 8085
Mark : 17/18

Prof. Pallavi Chinnawar M.Sc. B.Ed.

1
Evolution of Microprocessor:

•Last 50 years, semiconductors technology have undergone changes.

•After invention of transistors, IC appeared at the end of 1950’s.

•IC consist of several transistors, diodes, resistance on a single chip.

•After that in 1960’s small scale integration (SSI) evolved.

•In this circuit logic gates was integrated on single chip.

•More than 100 gates was fabricated on 1 single chip this was called
medium scale integration (MSI).
For Eg. MSI is IC 7490

•After few years more than 1000 gates were fabricated on single chip
this was called large scale integration (LSI).

•Also VLSI and SLSI technologies were developer i.e. very large scale
integration and super large scale integration which use many competing 2
function.
•The intel invented 4-bit programmable device used as calculators, that
is known as 4-bit µp.

•It was quickly replaced by 8-bit µp i.e. intel 8008.

•In 1970, 8080 came which is used in control application called as micro
computer. After a few years of improvement in intel 8080, intel 8085 was
introduced.

•In intel 8085, it has instruction set & architecture more functions. CPU
programmable logic device etc.

•Now, most micro computer are built with 32-bit or 64-bit µp.

Definition of microprocessor:

A microprocessor is a multipurpose, programmable logic device


that reads binary instructions from a storage device called
memory.
Accepts binary data as input and process data according to 3
instruction, provide result as output.
Generation of Microprocessor:
Q. Give evolution of microprocessor (3marks)

1. I Generation:

• Intel 4004 was the first microprocessor available in market. It was 4


bit microprocessor introduced in 1971 used as calculators.

• In 1972, Intel introduce the 8008, the first 8-bit µp with the
development of LSI technology with 45 instruction.
• Eg. Intel 4004 (4-bit), Intel 8008 (8-bit), Motorola’s 6800 (8-bit)

2. II Generation:

• In 1976, Intel 8085 microprocessor was introduced. It is 8-bit µp


development of microprocessor has been in the direction towards
complete microcomputer system with CPU, RAM, clock, I/O all in
single package.
• Eg : Intel 8080, Intel 8085 , Motorola M6800 ,Ziglog’s Z-80 (all are
4
introduced in 1974) , .
3. III Generation :

•In 1978, INTEL introduced 16 bit µp the 8086 .


•In third generation ,memory space was 64 KB .
•The other features were full arithmetic execution and efficient higher level
language addressing .
Eg: Intel 8086 ( 16-bit) , Zilog’s Z-8000 (16-bit) , M6800 etc.

4. IV Generation:

•In 1981, Intel has introduced first 32-bit µp 80386


•It can address a physical memory of 4 GB.
•Eg: Intel 80386 (32-bit), Intel 80486 (32-bit), M68020, HP-32,

5. V Generation:

•Greatest speed µp it runs at any OS platform like Unix, Linux etc.


•The processor in this generation is called Pentium .It is 64 bit up.
•Eg: Pentium , Intel 80586 .

5
Q. What is microprocessor? Explain its function.

•Microprocessor can be broadly divided into 3 parts:


1.Arithmetic and Logical Unit (ALU)
2.Register
3. Control Unit
The microprocessor base system is as follows:

•ALU is arithmetic & logic unit where arithmetic and logical operation
are carried out.
6
•Register are primarily used to store data temporally during
execution of programs.
•Control unit provides control and timing signals to whole system.
It also control flow of data between up and memory and peripherals

System Bus:

•These are communication path between µp to peripherals, memory.


•They are group of wires which carry bits theses are several buses in system.

Memory:

•It stores binary information and data that provides to microprocessor


whenever necessary.
•When execution of program is carried out, µp reads data memory and
performs operation in all, result will transfer to output section.

7
Function of Microprocessor:

•To fetch, decode and execute instruction.

•To transfer data from one block to another block or I/O lines.

•To provide control and timing signal to whole unit according to


instructions.

•It gives proper response to different interrupt according to priority.

I/O Peripherals:

•I/O devices is called peripherals.

•Input devices are analog to digital converter, transfer data from


outside to microprocessor.

•Output devices are digital to analog converter transfer data from


microprocessor to outside.
8
Block Diagram of ALU:

Q. Explain the function of ALU with simple block diagram. OR


Q. Draw a neat labeled diagram of generic ALU and explain
function.

•ALU is a 8-bit unit.

•It performed arithmetic and logical, rotate operation.

•It consist of binary adder to perform addition and subtraction by using 2’s
complement method. 9

•The result is stored in accumulator.


•Accumulator, temporary register, flag register are closely associated with
ALU.
•The temporary register is used to hold data during arithmetic or
logical operation.
•The flag are set or reset according to the result of status register.

ALU contain
1. Shifter: It perform rotate logical operation.
2. Adder: Binary addition, subtraction by using 2’s complement
3. Status Register: It contain flip-flop that can be set or reset on condition
created by ALU operation.

•Q. Explain organization of ALU with the help of simple block


diagram.

10
Q.Give feature of 8085 microprocessor.

•The microprocessor require +5 V single power supply and can operate


with 3 MHz single phase clock .

•Intel 8085 is an 8 bit microprocessor 8 bit data width indicates that 1


Byte of data can be passed on this bus.

•It 8085 chip is available in 40 pin plastic ceramic DIP package.

•It has 16 bit address bus that means it can address a physical
memory of 64 KB .

•Address bus can be divided into two group . Low order 8 bit of bus(i.e.
A0 to A7 ) are multiplexed with Data bus ( D0 to D7 ) .These Address
bus are transferred address on same line.

•To select external memory or I/O devices , microprocessor 8085 used


I/O mapped I/O system .

•To communicate with external device , microprocessor 8085 used 11


interrupt method
Q. Draw a neat and labeled block diagram of generic
microprocessor and explain its functional unit

The block diagram of generic µp :

The block diagram of generic µp consist of following block:

1.Arithmetic logic unit (ALU)


2. Several registers:
Instruction register, status register, accumulator,
temporary register, stack pointer, general purpose register, data
address register

3. Program counter
4. Instructor Decoder
5.Timing and control unit
6. Bus buffer and latches
7. Internal buses and control line
8. Several control unit and output
9. Internal control 12
13
1. Address Bus:

• It is a group of 16 lines identified by A0 to A15.


• It is unidirectional i.e. bits flow in one direction from microprocessor
unit to peripherals devices.
• The MPU uses these buses to identify peripherals or memory location.
• The address bus is used to carry 16-bit address.

2. Data Bus:

• It is a group of 8-lines used for data flow in µp .


• These lines are bidirectional i.e. data flow in both direction between
MPU and memory and peripherals devices.
• MPU uses data bus to transfer data.

14
3. Data address register:

•It is two 8-bit register that can be used as separate or as combined


pair.
•They are labeled by H and L pair.
•Data is stored in these register; when used in pairs 16-bit address can be
stored.

4. Instruction Register:
•This is 8-bit register.
•The first byte of an instruction is stored in this register (opcode of
instruction)

5. Status register:
•It is called as flag which consist of flip flop that are set or reset
according to data in accumulator.
•The generic MPU has 2 flags: carry and zero flag.
• Sum of accumulator is larger than 8-bit, then carry flag is one or
set.
•When result is zero in accumulator, then zero flag is set or one .
15
•The 8085 has five flags :Sign flag ,Zero flag, Auxillary carray flag, Parity
flag and Carray flag .
6. Accumulator:
•It can be used as both primary source and destination register.
•The final result of operation also stored in accumlator .
•It is an 8-bit main register in 8085 to store 8-bit data .
•The result of ALU is stored in accumulator all data transfer
between CPU and I/O device are performed through accumulator.

7. Program counter:
•It is 16-bit register contain the address of next executable
instruction ( i.e. PC act as a pointer to next executable instruction)
•It can be incremented or reset by control section.
•When reset is activated all internal operation. are suspended and
program counter is cleared. (i.e. it hold 0000 H address).

8. Stack pointer:
•It is 16-bit register contain address of memory location called
stack.(i.e. address of stack top / the memory address of last byte
entered in stack )
•With help of incrementer /decrementer , the stack pointer is
decremented each time data is pushed onto stack and incremented each
16
time data is popped off the stack .
•Stack is read/ write memory used for the temporary storage.
9. Temporary register:

•It is used internally.


•It consist data during program execution temporary.

10. Instruction Decoder:

•This interprets the content of instruction register and determine exact


steps to be followed in executing the entire instruction.
•It directs the control section accordingly.

11. Timing and control section:

•This section receives signals from instruction decoder, to determine the


nature of instruction to be executed.
•Timing and control signals are sent to all parts of µp.

12. Control input and output:

•Reset and interrupt request (INTR) are control inputs.


•When reset is activated all internals operations are suspended and 17
programs counter is cleared.
•Now, the program execution can again begin at zero memory
address (0000 H )

•When interrupts is activated the µp can be interrupted from the


normal execution instruction and asked to execute some other
instructions.
[ The µp resumes its operation after completion of other instruction, called
services routine.]

•The control outputs are write , read, clock lines.

•An external crystal are connected between x1 and x2 so clock


circuit generate clock signal for internal use.

13. Bus buffer and latches:


•A latch is a flip-flop.

•It is used to store one bit information.


18
•It remembers last state or it was told to another.
Q.Explain following term .
i) T-State ii) Machine Cycle iii) Instruction Cycle iv) Fetch Cycle

i) T-State : The subdivision of an operation which perform in one


clock period is called as T-State .
ii) Machine Cycle : It is defined as the time requried to complete
any operation of accessing either memory or I/O which is subpart
of an instruction .
In 8085, the machine cycle consist of 3 to 6 T-states.
iii) Instruction Cycle : It is defined as time requried to complete the
execution of an instriction .
The 8085 instruction cycle consist of 1 to 5 Machine cycle.

T1 state T2-state T3 state T4 state

Machine cycle 1 Machine cycle 2 19

Instruction cycle
•Fig. shows Machine cycle ,Instruction cycle ,T-state required for
an execution of an instruction .
•From it is clear that an instruction cycle consist of number of
machine cycle and a machine cycle consist of number of T-state .

iv) Fetch cycle :

• To load an instruction or pice of data from memory into CPU


register.

• All instruction must be fetched before they can be executed .

• The it takes to fetch an item is know as Fetch time or Fetch cycle


and is measured in clock ticks .

20
•Pin diagram of 8085

21
OR

22
1. Address Bus:

• 8085 µp has 16 address lines i.e. A0 –A15 but the most significant bit
(high order address bus) A8 to A15 are separate which are
unidirectional.
• These low order address bus multiplex with data bus.

2.Multiplex address/ data bus:

• These signal lines are bidirectional i.e. AD0 to AD7 they are used
for dual purpose
• The low order address bus (A0 to A7 ) and data bus (D0 to D7 )
are time multiplexe that means 8-bit of address bus are passed on
same 8 lines as that of data bus. This is known as multiplexed
address/data bus.
• In executing an instruction during earlier part of cycle, these
lines are used (A0 to A7 ) and later part of cycle (D0 to D7 )
lines are used.
• However the low order address bus can be separated from these
lines by using Address latch Enable(ALE) signal. 23
• If signal of pin ALE is high (i.e. 1),then bits on AD0 to AD7 on
address bit else they are data bits.
Q. Explain multiple address/data bus in 8085 µp:

•In executing an instruction, 8085 has a special signal called ALE


(Address latch enable) for informing the peripheral when address data
bus is sending addresses and when it is function as data bus.
•If signal of pin ALE is high (i.e. 1), then the bits on (AD7 to AD0 )
are address bit else they are data bit.

Q. Explain address and data bus structure of 8085 also explain


how address and data bus are demultiplex

•In 8085 these 40 pin didn’t have enough pins for input and output.
•For that reason, manufacture used 12 to 19 pins as dual purpose
address or data bus lines (AD0 to AD7) this unit is set to 8-bit
multiplex address or data bus.
•To multiplex, means to first select one and another.
•Therefore, sending of address next to send or receive data via
same bus. The 8085 has special signal i.e. ALE to inform sending
24
addresses.
•During first cycle the addresses are sent out the lower 8-bit are
latched into the peripheral by ALE signal.
•During the rest of machine cycle the data bus is used for memory or I/O
data

25
3. Control and status signal:

These group of signal include 2 control signal and ,3 status signal


IO| , S1 and S0 and one special signal ALE.

i. ALE signal:

• This is Address Latch Enable signal one special output signal


generated by microprocessor to indicate beginning of operation.
• This is +ve going pulse generated by first clock cycle of machine state
this indicates that the bits on (AD7 to AD0 ) are address bits.
• This signal is used to separate address bits.
• ALE is never tistated.

ii. :

• This is read control signal.


• This is active low signal
• This indicates that selected I/O or memory device is to be read.
• They are available on data bus.
• It is tristated during HOLD and HLAT . 26
iii :

•This write control signal.


•This is active low signal.
•This signal indicates that data on data bus is to be written into
selected I/O or memory location.
•It is tristated during HOLD and HLAT .

iv. IO| :

•This is status signal used to differentiate between input/ output


and memory operation.
•When it is IO| =1, it indicates I/O operation.
•When it is low ( IO| =0), it indicates memory operation.
•It is tristated during HOLD and HLAT .

27
v. S1 & S0 :
These are status signals.
They can identify various operations.
They machine cycle types along with status signal are listed
below:

a) S1 =0, S0 =1, IO| = 0


It indicates write on memory.

b) S1 =1, S0 =0, IO| =0


It indicates read from memory

c) S1 =0, S0 =1, IO| = 1


It indicates I/O write operation.

d) S1 =1, S0 =0, IO| =1


It indicates I/O read operation.

[ remember : when IO| = 0 then operation on memory and it is


1 then operation on IO . 28
When ) S1 =0 then write operation done and it is 1 then read
operation done . ]
4. Externally initiated signal:

8085 has 5 interrupt signal: INTR, RST 7.5, RST 6.5, RST 5.5 and
TRAP. These are 5 Hardware interrupt .
This signal can be used to interrupt a program execution.
i) INTR:
• This is interrupt request signal. It is non vector interrupt because it is
onlu request taken by other device and does not transfer control to any
memory location .
• This is general purpose interrupt.
• It has lowest priority.
• When interrupt signal is given on this line µp executes acknowledged
cycle.
ii) RST 7.5, RST 6.5, RST 5.5 :
• This is restart interrupt used to interrupt the microprocessor.
• It is maskable interrupt. Which can be disable .
• These are vector interrupt and transfer program control to memory
location.
• When an interrupt is recognized, the next instruction is executed
from fixed location in memory ie. 7.5*8 = 003C H.
• They causes internal restart to be automatically inserted. 29
• They have higher priority than INTR.
iii) TRAP:

• This is non-maskable interrupt . Which can not be disable .


• It has the highest priority among all interrupts.
• This is vector interrupt . i.e. when an interrupts is recognized, it
directed or transfer the control to specific memory location
4.5 *8=0024 H .

• The hardware interrupts in descending order of priority are


listed below :
i) TRAP – highest priority , ii) RST 7.5
iii) RST 6.5 iv) RST 5.5 v) INTR - lowest priority .

5. Power supply and clock frequency:

• Vcc: It will supply +5V power.


• Vss: It is ground reference.
• X1 & X2 : A crystal having frequency 6MHz which is internally
provided by 2 pins so the system operates at 3 MHz.

6. Clock: 30

• This is clock output signal.


• This signal can be used as system clock for other devices.
7. READY:
•It is input signal used by microprocessor to sense wheather pheripheral is
ready to transfer data or not .
•If READY is high ,the pheripheral is ready. If it is low the microprocessor is
wait for an integral number of clock cycle until it goes high .
•It is low pin , microprocessor enters into a wait state.(i.e. up wait for an
integral no. of clock cycles until it goes high .)

8. HOLD:

•When HOLD pin is activated by an external signal, the microprocessor


release the use of buses as soon as the current machine cycle is
completed. Internal processing may continue.
•It indicates that peripherals such as DMA controller is requesting
the use of addresses and data buses.

9. HLDA:

•This is HOLD Acknowledge signal.


•HLAD output indicates to a peripheral that a HOLD request has
been received and that the microprocessor will release control of
31
buses in the next clock cycle.
•After the removal of HOLD request HLDA goes low.
10. :

• When the signal on this pin goes low, the program count is set to
zero i.e. 0000.
• The buses tristate and µp unit is reset.

11 RESET OUT:

• This signal indicates that µp is being reset.


• The signal can be used to reset other devices.

12.Serial I/O port (SOD):

8085 has 2 pins to implement serial transmission, SID (serial input data)
and SOD (serial output data )

32
i. SOD :

• It is data line for serial output .


• The output pin SOD is set or reset as per SIM instruction.
OR
• The 7 th bit of accumulator is outputed on SOD lines when
SIM instruction is executed.
• The SOD line eliminates the need for an output code in the
software controlled serial I/O.

ii. SID :

•It is data line for serial input .


•The 7 th bit of accumlator is inputed on SID line when RIM
instruction is executed.
•The SID line eliminates the need for an input port in the software
controlled serial I/O .

33
Question:

1. Explain the function of following pin of 8085


i) RESET OUT ii) INTA

2. Explain: i. ) IO / ii) TRAP

3.Explain: i) S0 , S1 ii) HLDA

4.Expalin the pin: i) RST 7.5 ii) Ready

5. Explain the functions: i) INTR ii) HOLD

6. i) ALE ii) iii)

7. Explain AD0 to AD7 and X1 X2

8. Explain SOD and SID

9. State the condition of IO / , S0 , S1 signal of 8085 up for the following


operation .i)Memory Read ii)I/O Write iii)I/O Read 34
Q. What is I/O mapped I/O and memory mapped I/O.
OR Q. Write note on addressing I/O devices.
Microprocessor is connected to various such as memory and I/O there two
scale by which these devices can be addressed.
1. Memory mapped I/O:
• In this scheme whenever an address appearing on address bus is for an
I/O device then there is nothing information on corresponding memory
location.
• Separate control signal is not requried .
• It requried 16 bit address bus .

2. I/O map I/O:

• Microprocessor 8085 uses I/O map I/O scheme to address I/O devices.
• Using status signal, differentiation between I/O operation and memory
operation is done.
• It requried IO/ .
• When IO / = 1 the address on address bus is for I/O device and when,
IO/ =0, address on address bus is for memory location.
• It used 8 bit data buses only .
35
The instruction IN and OUT are used to address I/O device.
The various operation to be carried out are identified by status signal, S0
and S1 as follows:

IO/ S1 S0 operation
0 1 Memory
0 1 0 Memory read
1 1 I/O
1 1 0 I/O read
0 1 1 opcode fetch
1 1 1 Interrupt
acknowledge
unused 0 0 Halt state
unused unused unused Hold state

36
Q. What is interrupt? Explain in details.

•An interrupt is a subroutine called initiated by external device through


hardware or microprocessor itself .

•An interrupt can also be viewed as signal, which suspends the normal
sequence of microprocessor and then microprocessor gives services to that
devices which has given the signal.

•After completing the service,microprocessor again returns to main program.

• An interrupt is an input signal which transfer control to specific


routine known as Interrupt Service Routine (ISR)
•After executing ISR, control is again transfer to main program.
•Microprocessor has 2 types of interrupts:
1) Software interrupts 2) Hardware interrupts.

•Software interrupts has more priority than hardware interrupt

37
Q. What are software interrupts?

•The normal operation of microprocessor can be interpreted by


special instruction such interrupts are called software interrupts.

•8085 provides 8 users defined software interrupts RST 0 to RST 7.

•These interrupts are vector interrupts.

•When these interrupts are called the control is transferred to


memory location as shown below:
Interrupts Mnemonic Call location (H)
RST 0 0000
RST 1 0008
RST 2 0010
RST 3 0018
RST 4 0020
RST 5 0028
38
RST 6 0030
RST 7 0038
•These interrupts are requested by executing interrupts instruction due
to arithmetic error.

•Software interrupt have more priority than any hardware interrupts.

Note:
Q. Give the all hardware interrupt provided by 8085. List them
according to there priority

39
Q. Differentiate between hardware and software interrupts

Hardware interrupts:

•Hardware interrupts are used to handle asynchronous events.

•These interrupts are requested by external device.

•After execution of these interrupts, program counter is not


incremented.

•These may be non maskable (TRAP) or maskable (RST 7.5, 6.5, 5.5).

•They have lower priority than any software interrupts.

•These interrupts affect on interrupts control logic .

•It improves throughput of the system.

•The µp executes either interrupts acknowledge cycle or ideal 40


machine cycle to acknowledge this interrupts.
Software interrupts:

•Software interrupts are not used to handle asynchronous events.

•Not requested by external device but by microprocessor itself.

•Program counter is incremented.

•They cant be masked or ignored.

•They have more priority.

•Don’t affect on interrupts control logic.

•They don’t improve throughput.

41
Q. Distinguish between maskable and non-maskable interrupts:

Non-maskable interrupts:

•These interrupt can not be masked and can not made pending.

•Non-maskable interrupts disable all maskable interrupts

•It is used for emergency purpose like power failure, smoke


detector, parity check error etc.

•It has highest priority than maskable interrupt .

•It is always a vector interrupts [TRAP]

•Response time for non-maskable interrupt is low.

42
Maskable interrupts:

•Thes e interrupt can be masked or made pending.

• Maskable interrupt can not disable any non-maskable interrupts.

•It is used to interface with peripherals device.

•It has lower priority than non-maskable.

•It may vector[ RST 7.5,RST 6.5, RST5.5] or


non vector interrupts[INTR].

•Response time is high.

43
Q. What is Vector Interrupt and Non Vector Interrupt ?
State all Hardware Interrupt with their vector address, Write their
priorities of Hardware Interrupt .

Ans : Vector Interrupt : It means when these interrupt is given it is


directed to transfer control to specific memory location .

Non-Vector Interrupt : It means interrupt which does not transfer


control to specific memory location.

Hardware Interrupt : These are 5 interrupt are as below :


TRAP Vector interrupt, Non-maskable ,can not be disable

RST7.5 Vector interrupt ,Maskable interrupt, can be


RST6.5 disable
RST5.5

INTR Non –Vector interrupt.

TRAP is highest priority ,


44
INTR is lowest priority ,
RST 7.5, RST6.5 ,RST5.5 are highest priority than INTR .
•Functional block diagram of 8085 microprocessor

45
Q. Write short note on flag register of 8085 µp
OR
Q. What are flags? Enlist the different flags provided by µp.
Explain when they are set or reset
OR
Q. Define bit pattern of flag register and explain the
significance of each flag bit.

•A flag is also called status register.It consist flip flop. flags are either
set or reset by ALU according to the result by ALU.

•Flags are important because they are conditions for conditional


branching instruction.

•8085 has five flags: Sign flag, Zero flag, Auxillary Carry, Carry flag,
Parity flag.

•A 8-bit register is used to represent 5 flags as shown in following fig:

B7 B6 B5 B4 B3 B2 B1 B0 Bit no.

S Z - AC - P - CY status 46
flag
Sign Zero Auxill - Parity - Carry
ary
i) Sign flag(S):

•After the execution of arithmetic and logic operation if the most


significant bit(MSB) of result is 1, then sign flag is set to 1 otherwise 0.

•This flag is used with sign number.

•If B7 is 1, then S = 1 ; the no. will be viewed as negative(–ve) number.

•If B7 is 0, then S = 0 ; the no. will be viewed as positive (+ve) number .

ii) Zero flag (Z):

• After performing ALU operation if result is zero, the zero flag is


set to 1(i.e. Z = 1)

•And zero flag is reset if the result is non-zero.(i.e. Z = 0)

•This flag is modified by the result in accumulator as well as other


registers. 47
iii) Auxiliary carry flag(AC):

•In arithmetic operation when carry is generated by B3 bit and passed


to B4 bit, the auxiliary carry is set to 1.

•This flag is used only internally for BCD operation and is not
available for programmer to change the sequence of program with
chunk instruction.

iv) Parity flag (P):


This flag is set to 1, if result stored in accumulator contain even no.
of 1.
If result contain odd no. of 1, parity flag is set to zero.

v) Carry flag (Cy):

•This flag is set to 1 if carry produced by most significant bit


during execution of arithmetic operation.

•In subtraction, carry flag serves as borrow flag.


48
Q. Flag register of 8085 µp contain 3AH. Interrupt its meaning.

Given flag register of 8085 µp contains data 3AH as below,

S Z AC P C
0 0 1 1 1 0 1 0

•Here sign flag is reset, it means the result is unsigned or +ve.

•Zero flag is reset, it means the result is nonzero after the


execution of arithmetic or logical operation.

•Auxiliary carry flag is set, that means there is auxiliary carry


generated or carry form D3 to D4 during arithmetic operation.

•Parity flag is reset, that means result stored in accumulator


contain odd no of 1.
49
•Carry flag is reset that means there is no carry or borrow from
most significant bit (B7) during execution of arithmetic operation.
Q. Give all hardware interrupt i/p priority and their address
branched when interrupt occur.

•The highest priority interrupt is TRAP.


• When prog. execution control to transfer memory location 0000H.
•It is can not be disable so it is called non-maskable interrupt.
•The next 3 interrupt are restart.
•They enable or disable by software. Hence they are maskable their
priority and address branch is shown below;

Name Priority Address branch to


when interrupt
occur or vector
address
TRAP 1 24 H
RST 7.5 2 3C H
RST 6.5 3 34 H
RST 5.5 4 2C H
50
INTR 5 Depend on
instruction
Hexadecimal no. Binary no.
0 0000
1 0001
2 0010
3 0011
4 0100
5 0101
6 0110
7 0111
8 1000
9 1001
A 1010
B 1011
C 1100
D 1101
E 1110
F 1111
Q.Flag register of 8085 up contain D9 H .Interpret its meaning.
(D9 H = 1101 1001)
ANS:
Here CY=1 set i.e. carry is genrated in MSB,
AC =1 set in result cy is generated in D3 bit and pass to D4 bit, 51

Z=1 set result is zero,


S =1 set no is –ve .
Any Question ?

Thank u

52

You might also like