03.50.

2022

VISVESVARAYA TECHNOLOGICAL UNIVERSITY, BELAGAVI

B.E. in Electronics and Communication Engineering (ECE)
Scheme of Teaching and Examinations 2021
Outcome Based Education (OBE) and Choice Based Credit System (CBCS)
(Effective from the academic year 2021 - 22)
V SEMESTER
Teaching Hours /Week Examination

Department (TD)

Board (PSB)
and Question
Paper Setting

Self -Study
Practical/
Teaching

Drawing
Tutorial

Total Marks
Lecture

Duration in
Theory

CIE Marks

SEE Marks

Credits
Sl. Course and

hours
Course Title
No Course Code

L T P S
BSC TD: ECE
1 Digital Communication 3 0 0 1 03 50 50 100 3
21EC51 PSB: ECE
IPCC Computer
Object Organization
Oriented Programming& TD: ECE, CSE
2 3 0 2 03 50 50 100 4
21EC52 ARMJava
with Microcontroller
& Data Structures PSB: ECE
PCC Computer Communication TD: ECE
3 3 0 0 1 03 50 50 100 3
21EC53 Networks PSB: ECE
PCC TD: ECE
4 Electromagnetics
Microwave Waves
Theory & Antennas 3 0 0 03 50 50 100 3
21EC54 PSB: ECE
PCC
5 Communication Lab II 0 0 2 03 50 50 100 1
21ECL55
TD: Any
Department
AEC Research Methodology &
6 PSB: As 2 0 0 02 50 50 100 2
21EC56 Intellectual Property Rights
identified by
University
TD: Civil/
HSMC Environmental
7 21CIV57 Environmental Studies /Chemistry/ 1 0 0 1 50 50 100 1
Biotech.
PSB: Civil Engg
If offered as Theory courses
01
AEC Concerned 1 0 0
8 Ability Enhancement Course-V 50 50 100 1
21EC58X Board If offered as lab. courses
02
0 0 2
Total 400 400 800 18
Ability Enhancement Course - V
21EC581 IoT (Internet of Things) Lab 21EC583 Java Programming
Antenna Design & Testing
21EC582 Communication Simulink Toolbox 21EC584 Data Structures
Microwaves Using C++
toolbox

Note: BSC: Basic Science Course, PCC: Professional Core Course, IPCC: Integrated Professional Core Course, AEC –Ability Enhancement Course INT –
Internship, HSMC: Humanity and Social Science & Management Courses.
L –Lecture, T – Tutorial, P- Practical/ Drawing, S – Self Study Component, CIE: Continuous Internal Evaluation, SEE: Semester End Examination.
Integrated Professional Core Course (IPCC): refers to Professional Theory Core Course Integrated with Practical of the same course. Credit for IPCC
can be 04 and its Teaching – Learning hours (L : T : P) can be considered as (3 : 0 : 2) or (2 : 2 : 2). Theory part of the IPCC shall be evaluated both by
CIE and SEE. The practical part shall be evaluated by CIE only and there shall be no SEE. For more details the regulation governing the Degree of
Bachelor of Engineering /Technology (BE/B.Tech.) 2021-22 may be referred.

JBOS28022022/EC09032022/KM
19.09.2023
03.60.2022

VISVESVARAYA TECHNOLOGICAL UNIVERSITY, BELAGAVI

B.E. in Electronics and Communication Engineering (ECE)
Scheme of Teaching and Examinations 2021
Outcome-Based Education(OBE) and Choice Based Credit System (CBCS)
(Effective from the academic year 2021 - 22)
VI SEMESTER
Teaching Hours /Week Examination

Department (TD)

Board (PSB)
and Question
Paper Setting

Self -Study
Practical/
Teaching

Drawing
Tutorial

Total Marks
Lecture

Duration in
Theory

CIE Marks

SEE Marks

Credits
Sl. Course and

hours
Course Title
No Course Code

L T P S
HSMC Technological Innovation Any
1 3 0 0 0 03 50 50 100 3
21EC61 Management and Entrepreneurship Department
IPCC Computer
MicrowaveOrganization
Theory && ARM TD: ECE 4
2 3 0 2 03 50 50 100
21EC62 Antennas
Microcontrollers PSB: ECE
PCC VLSI Design & Testing TD: ECE 3
3 3 0 0 03 50 50 100
21EC63 PSB: ECE
PEC Professional Elective Course-I TD: ECE 3
4 03 50 50 100
21EC64x PSB: ECE
OEC Open Elective Course-I Concerned 3
5 03 50 50 100
21EC65x Department
PCC VLSI Laboratory 1
6 0 0 2 03 50 50 100
21ECL66
Mini Project Two contact hours /week for
MP
7 interaction between the -- 100 -- 100 2
21ECMP67
faculty and students.
INT Innovation/Entrepreneurship Completed during the intervening period of IV
8 -- 100 -- 100 3
21INT68 /Societal Internship and V semesters.
Total 500 300 800 22

Professional Elective – I
21EC641 Artificial Neural Networks (L:T:P :: 2:2:0) 21EC643 Python Programming (L:T:P :: 2:0:2)
21EC642 Cryptography (L:T:P :: 2:2:0) 21EC644 Micro Electro Mechanical Systems (L:T:P :: 3:0:0)

Open Electives – I offered by the Department to other Department students

21EC651 Communication Engineering (L:T:P :: 3:0:0) 21EC653 Basic VLSI Design (L:T:P :: 3:0:0)
21EC652 Microcontrollers (L:T:P :: 3:0:0) 21EC654 Electronic Circuits with Verilog (L:T:P :: 2:0:2)
21EC655 Sensors & Actuators (L:T:P :: 3:0:0)

Note: HSMC: Humanity and Social Science & Management Courses, IPCC: Integrated Professional Core Course, PCC: Professional Core Course, PEC:
Professional Elective Courses, OEC–Open Elective Course, MP –Mini Project, INT –Internship.
L –Lecture, T – Tutorial, P - Practical / Drawing, S – Self Study Component, CIE: Continuous Internal Evaluation, SEE: Semester End Examination.

Integrated Professional Core Course (IPCC): Refers to Professional Theory Core Course Integrated with Practical of the same course. Credit for IPCC
can be 04 and its Teaching – Learning hours (L : T : P) can be considered as (3 : 0 : 2) or (2 : 2 : 2). The theory part of the IPCC shall be evaluated both
by CIE and SEE. The practical part shall be evaluated by CIE only and there shall be no SEE. For more details, the regulation governing the Degree of
Bachelor of Engineering /Technology (BE/B.Tech) 2021-22 may be referred.

Professional Elective Courses(PEC):

A professional elective (PEC) course is intended to enhance the depth and breadth of educational experience in the Engineering and Technology
curriculum. Multidisciplinary courses that are added supplement the latest trend and advanced technology in the selected stream of engineering.
Each group will provide an option to select one course out of five courses. The minimum students’ strength for offering professional electives is 10.
However, this conditional shall not be applicable to cases where the admission to the programme is less than 10.
Open Elective Courses:
Students belonging to a particular stream of Engineering and Technology are not entitled for the open electives offered by their parent Department.
However, they can opt an elective offered by other Departments, provided they satisfy the prerequisite condition if any. Registration to open
electives shall be documented under the guidance of the Program Coordinator/ Advisor/Mentor.
Selection of an open elective shall not be allowed if,
(i) The candidate has studied the same course during the previous semesters of the program.
(ii) The syllabus content of open electives is similar to that of the Departmental core courses or professional electives.
(iii) A similar course, under any category, is prescribed in the higher semesters of the program.
In case, any college is desirous of offering a course (not included in the Open Elective List of the University) from streams such as Law, Business

JBOS28022022/EC09032022/KM
19.09.2023
03.70.2022

(MBA), Medicine, Arts, Commerce, etc., can seek permission, at least one month before the commencement of the semester, from the University by
submitting a copy of the syllabus along with the details of expertise available to teach the same in the college.
The minimum students’ strength for offering open electives is 10. However, this conditional shall not be applicable to cases where the admission to
the programme is less than 10.
Mini-project work: Mini Project is a laboratory-oriented course which will provide a platform to students to enhance their practical knowledge and
skills by the development of small systems/applications.
Based on the ability/abilities of the student/s and recommendations of the mentor, a single discipline or a multidisciplinary Mini- project can be
assigned to an individual student or to a group having not more than 4 students.
CIE procedure for Mini-project:
(i) Single discipline: The CIE marks shall be awarded by a committee consisting of the Head of the concerned Department and two faculty members
of the Department, one of them being the Guide. The CIE marks awarded for the Mini-project work shall be based on the evaluation of project report,
project presentation skill, and question and answer session in the ratio of 50:25:25. The marks awarded for the project report shall be the same for all
the batch mates.
(ii) Interdisciplinary: Continuous Internal Evaluation shall be group-wise at the college level with the participation of all the guides of the project.
The CIE marks awarded for the Mini-project, shall be based on the evaluation of project report, project presentation skill, and question and answer
session in the ratio 50:25:25. The marks awarded for the project report shall be the same for all the batch mates.
No SEE component for Mini-Project.

VII semester Class work and Research Internship /Industry Internship (21INT82)
Swapping Facility
Institutions can swap VII and VIII Semester Scheme of Teaching and Examinations to accommodate research internship/ industry internship after the
VI semester.
(2) Credits earned for the courses of VII and VIII Semester Scheme of Teaching and Examinations shall be counted against the corresponding
semesters whether VII or VIII semester is completed during the beginning of IV year or later part of IV year of the program.
Elucidation:
At the beginning of IV year of the programme i.e., after VI semester, VII semester classwork and VIII semester Research Internship /Industrial
Internship shall be permitted to be operated simultaneously by the University so that students have ample opportunity for internship. In other words,
a good percentage of the class shall attend VII semester classwork and similar percentage of others shall attend to Research Internship or Industrial
Internship.
Research/Industrial Internship shall be carried out at an Industry, NGO, MSME, Innovation centre, Incubation centre, Start-up, Centers of Excellence
(CoE), Study Centre established in the parent institute and /or at reputed research organizations / institutes. The intership can also be rural
internship.
The mandatory Research internship /Industry internship is for 24 weeks. The internship shall be considered as a head of passing and shall be
considered for the award of degree. Those, who do not take up/complete the internship shall be declared fail and shall have to complete during the
subsequent University examination after satisfying the internship requirements.
INT21INT82Research Internship/ Industry Internship/Rural Internship
Research internship: A research internship is intended to offer the flavour of current research going on in the research field. It helps students get
familiarized with the field and imparts the skill required for carrying out research.
Industry internship: Is an extended period of work experience undertaken by students to supplement their degree for professional
development. It also helps them learn to overcome unexpected obstacles and successfully navigate organizations, perspectives, and cultures. Dealing
with contingencies helps students recognize, appreciate, and adapt to organizational realities by tempering their knowledge with practical
constraints.
Rural internship: A long-term goal, as proposed under the AICTE rural internship programme, shall be counted as rural internship activity.
The student can take up Interdisciplinary Research Internship or Industry Internship.
The faculty coordinator or mentor has to monitor the students’ internship progress and interact with them to guide for the successful completion of
the internship.
The students are permitted to carry out the internship anywhere in India or abroad. University shall not bear any expenses incurred in respect of
internship.

JBOS28022022/EC09032022/KM
19.09.2023
03.80.2022

VISVESVARAYA TECHNOLOGICAL UNIVERSITY, BELAGAVI

B.E. in Electronics and Communication Engineering (ECE)
Scheme of Teaching and Examinations 2021
Outcome Based Education(OBE) and Choice Based Credit System (CBCS)
(Effective from the academic year 2021 - 22)
Swappable VII and VIII SEMESTER
VII SEMESTER
Teaching Hours /Week Examination

Department (TD)
and Question
Paper Setting
Board (PSB)

Self -Study
Practical/
Drawing
Tutorial
Teaching

Total Marks
Lecture

Duration in
Theory

CIE Marks

SEE Marks

Credits
Sl. Course and

hours
Course Title
No Course Code

L T P S

PCC TD: ECE

1 Advanced VLSI 3 0 0 3 50 50 100 3
21EC71 PSB: ECE
PCC Optical & Wireless TD: ECE
2 2 0 0 3 50 50 100 2
21EC72 Communication PSB: ECE
PEC TD: ECE
3 Professional elective Course-II PSB: ECE 3 50 50 100 3
21EC72X
PEC TD: ECE
4 Professional elective Course-III PSB: ECE 3 50 50 100 3
21EC73X
OEC Concerned
5 Open elective Course-II 3 50 50 100 3
21EC74X Department
Project Two contact hours /week for
6 21ECP75 Project work interaction between the 3 100 100 200 10
faculty and students.
Total 350 350 700 24

VIII SEMESTER
Teaching Hours /Week Examination
Department

Self -Study
Practical/
Drawing
Tutorial
Teaching

Total Marks
Lecture

Duration in
Theory

CIE Marks

SEE Marks

Credits
Sl. Course and hours
Course Title
No Course Code

L T P S
One contact hour /week for
Seminar
1 Technical Seminar interaction between the -- 100 -- 100 01
21EC81
faculty and students.
INT Research Internship/ Industry Two contact hours /week for 03
2 21INT82 Internship interaction between the (Batch 100 100 200 15
faculty and students. wise )
3 21NS83 National Service Scheme (NSS) NSS
Completed during the
NCMC

21PE83 Physical Education (PE) (Sports

PE intervening period of III -- 50 50 100 0
and Athletics)
semester to VIII semester.
21YO83 Yoga Yoga
Total 250 150 400 16

Professional Elective - II
21EC721 Advanced Design Tools for VLSI (L:T:P :: 2:0:2) 21EC724 Biomedical Signal Processing (L:T:P :: 3:0:0)
21EC722 Digital Image Processing (L:T:P :: 2:0:2) 21EC725 Speech Signal Processing (L:T:P :: 3:0:0)
21EC723 DSP Algorithms & Architecture (L:T:P :: 3:0:0)

Professional Elective - III

21EC731 IoT & Wireless Sensor Networks (L:T:P :: 3:0:0) 21EC734 Machine Learning with Python (L:T:P :: 2:0:2)
21EC732 Network Security (L:T:P :: 3:0:0) 21EC735 Multimedia Communication (L:T:P :: 2:0:2)
21EC733 Fabrication technology (L:T:P :: 3:0:0)

JBOS28022022/EC09032022/KM
19.09.2023
03.90.2022

Open Electives - II offered by the Department to other Department students

21EC741 Optical & Satellite Communication (L:T:P :: 3:0:0) 21EC744 Basic Digital Signal Processing (L:T:P :: 2:0:2)
21EC742 ARM Embedded Systems (L:T:P :: 3:0:0) 21EC745 E-waste Management (L:T:P :: 3:0:0)
21EC743 Basic Digital Image Processing (L:T:P :: 2:0:2)
Note: PCC: Professional Core Course, PEC: Professional Elective Courses, OEC–Open Elective Course, AEC –Ability Enhancement Courses.
L –Lecture, T – Tutorial, P- Practical / Drawing, S – Self Study Component, CIE: Continuous Internal Evaluation, SEE: Semester End Examination.
Note: VII and VIII semesters of IV year of the programme
(1) Institutions can swap VII and VIII Semester Scheme of Teaching and Examinations to accommodate research internship/ industry internship after
the VI semester.
(2) Credits earned for the courses of VII and VIII Semester Scheme of Teaching and Examinations shall be counted against the corresponding
semesters whether VII or VIII semester is completed during the beginning of IV year or later part of IV year of the programme.
PROJECT WORK (21XXP75): The objective of the Project work is
(i) To encourage independent learning and the innovative attitude of the students.
(ii) To develop interactive attitude, communication skills, organization, time management, and presentation skills.
(iii) To impart flexibility and adaptability.
(iv) To inspire team working.
(v) To expand intellectual capacity, credibility, judgment and intuition.
(vi) To adhere to punctuality, setting and meeting deadlines.
(vii) To install responsibilities to oneself and others.
(viii)To train students to present the topic of project work in a seminar without any fear, face the audience confidently, enhance communication
skills, involve in group discussion to present and exchange ideas.
CIE procedure for Project Work:
(1) Single discipline: The CIE marks shall be awarded by a committee consisting of the Head of the concerned Department and two senior faculty
members of the Department, one of whom shall be the Guide.
The CIE marks awarded for the project work, shall be based on the evaluation of project work Report, project presentation skill, and question and
answer session in the ratio 50:25:25. The marks awarded for the project report shall be the same for all the batch mates.
(2) Interdisciplinary: Continuous Internal Evaluation shall be group-wise at the college level with the participation of all guides of the college.
Participation of external guide/s, if any, is desirable. The CIE marks awarded for the project work, shall be based on the evaluation of project work
Report, project presentation skill, and question and answer session in the ratio 50:25:25. The marks awarded for the project report shall be the same
for all the batch mates.
SEE procedure for Project Work: SEE for project work will be conducted by the two examiners appointed by the University. The SEE marks awarded
for the project work shall be based on the evaluation of project work Report, project presentation skill, and question and answer session in the ratio
50:25:25.
TECHNICAL SEMINAR (21XXS81): The objective of the seminar is to inculcate self-learning, present the seminar topic confidently, enhance
communication skill, involve in group discussion for exchange of ideas. Each student, under the guidance of a Faculty, shall choose, preferably, a
recent topic of his/her interest relevant to the programme of Specialization.
(i) Carry out literature survey, systematically organize the content.
(ii) Prepare the report with own sentences, avoiding a cut and paste act.
(iii)Type the matter to acquaint with the use of Micro-soft equation and drawing tools or any such facilities.
(iv) Present the seminar topic orally and/or through PowerPoint slides.
(v) Answer the queries and involve in debate/discussion.
(vi) Submit a typed report with a list of references.
The participants shall take part in the discussion to foster a friendly and stimulating environment in which the students are motivated to reach high
standards and become self-confident.
Evaluation Procedure:
The CIE marks for the seminar shall be awarded (based on the relevance of the topic, presentation skill, participation in the question and answer
session, and quality of report) by the committee constituted for the purpose by the Head of the Department. The committee shall consist of three
teachers from the department with the senior-most acting as the Chairman.
Marks distribution for CIE of the course:
Seminar Report:50 marks
Presentation skill:25 marks
Question and Answer: 25 marks. ∎No SEE component for Technical Seminar
Non – credit mandatory courses (NCMC):
National Service Scheme/Physical Education (Sport and Athletics)/ Yoga:
(1) Securing 40 % or more in CIE,35 % or more marks in SEE and 40 % or more in the sum total of CIE + SEE leads to successful completion of the
registered course.
(2) In case, students fail to secure 35 % marks in SEE, they has to appear for SEE during the subsequent examinations conducted by the University.
(3)In case, any student fails to register for NSS, PE or Yoga/fails to secure the minimum 40 % of the prescribed CIE marks, he/she shall be deemed to
have not completed the requirements of the course. In such a case, the student has to fulfill the course requirements during subsequently to earn the
qualifying CIE marks subject to the maximum programme period.
(4) Successful completion of the course shall be indicated as satisfactory in the grade card. Non-completion of the course shall be indicated as
Unsatisfactory.
(5) These course shall not be considered for vertical progression as well as for the calculation of SGPA and CGPA, but completion of the courses shall
be mandatory for the award of degree.

JBOS28022022/EC09032022/KM
19.09.2023
03.10.2022

VISVESVARAYA TECHNOLOGICAL UNIVERSITY, BELAGAVI

B.E: Electronics & Communication Engineering / B.E: Electronics & Telecommunication Engineering
NEP, Outcome Based Education (OBE) and Choice Based Credit System (CBCS)
(Effective from the academic year 2021 – 22)
V Semester

Digital Communication
Course Code 21EC51 CIE Marks 50
Teaching Hours/Week (L:T:P:S) 3:0:0:1 SEE Marks 50
Total Hours of Pedagogy 40 Total Marks 100
Credits 3 Exam Hours 3
Course objectives:
 Understand the concept of signal processing of digital data and signal conversion to symbols at the
transmitter and receiver.
 Compute performance metrics and parameters for symbol processing and recovery in ideal and
corrupted channel conditions.
 Understand the principles of spread spectrum communications.
 Understand the basic principles of information theory and various source coding techniques.
 Build a comprehensive knowledge about various Source and Channel Coding techniques.
 Discuss the different types of errors and error detection and controlling codes used in the
communication channel.
 Understand the concepts of convolution codes and analyze the code words using time domain and
transform domain approach.
Teaching-Learning Process (General Instructions)
The sample strategies, which the teacher can use to accelerate the attainment of the various course
outcomes are listed in the following:
1. Lecture method (L) does not mean only the traditional lecture method, but a different type of
teaching method may be adopted to develop the outcomes.
2. Arrange visits to nearby PSUs such as BHEL, BEL, ISRO, etc., and small-scale communication
industries.
3. Show Video/animation films to explain the functioning of various modulation techniques, Channel,
and source coding.
4. Encourage collaborative (Group) Learning in the class
5. Ask at least three HOTS (Higher-order Thinking) questions in the class, which promotes critical
thinking
6. Adopt Problem Based Learning (PBL), which fosters students’ Analytical skills, develop thinking
skills such as the ability to evaluate, generalize & analyze information rather than simply recall it.
7. Topics will be introduced in multiple representations.
8. Show the different ways to solve the same problem and encourage the students to come up with
their own creative ways to solve them.
9. Discuss how every concept can be applied to the real world - and when that's possible, it helps
improve the students' understanding.
Module-1
Digital Modulation Techniques: Phase shift Keying techniques using coherent detection: generation,
detection and error probabilities of BPSK and QPSK, M–ary PSK, M–ary QAM. Frequency shift keying
techniques using Coherent detection: BFSK generation, detection and error probability. Non coherent
orthogonal modulation techniques: BFSK, DPSK Symbol representation, Block diagrams treatment of
Transmitter and Receiver, Probability of error (without derivation of probability of error equation).

Teaching- Chalk and talk method, Simulation of modulation techniques, Power Point Presentation,
Learning YouTube videos Animation of BPSK, QPSK, BFSK and DPSK.
Process Problems on Generation and detection of DPSK, QPSK.
Self-study topic: Minimum shift keying and Non-coherent BFSK
RBT Level: L1, L2, L3

19.09.2023
03.10.2022

Module-2
Signalling Communication through Band Limited AWGN Channels:
Signalling over AWGN Channels- Introduction, Geometric representation of signals, Gram- Schmidt
Orthogonalization procedure, Conversion of the continuous AWGN channel into a vector channel
(without statistical characterization), Optimum receivers using coherent detection: ML Decoding,
Correlation receiver, matched filter receiver.
Signal design for Band limited Channels: Design of band limited signals for zero lSI-The Nyquist
Criterion (statement only), Design of band limited signals with controlled lSI-Partial Response signals,
Probability of error for detection of Digital PAM: Symbol-by-Symbol detection of data with controlled lSI.
Teaching- Chalk & talk method, PowerPoint Presentation, YouTube videos
Learning Self-study topics: Maximum Likelihood detection, Channel equalization
Process RBT Level: L1, L2, L3

Module-3
Principles of Spread Spectrum: Spread Spectrum Communication Systems: Model of a Spread Spectrum
Digital Communication System, Direct Sequence Spread Spectrum Systems, Effect of De-spreading on a
narrowband Interference, Probability of error (statement only), Some applications of DS Spread
Spectrum Signals, Generation of PN Sequences, Frequency Hopped Spread Spectrum, CDMA based on IS-
95.
Teaching- Chalk & talk method, Seminar about security issues in communication systems
Learning RBT Level: L1, L2, L3
Process
Module-4
Introduction to Information Theory: Measure of information, Average information content of symbols
in long independent sequences.
Source Coding: Encoding of the Source Output, Shannon’s Encoding Algorithm, Shannon-Fano Encoding
Algorithm, Huffman coding.
Error Control Coding: Introduction, Examples of Error control coding, methods of Controlling Errors,
Types of Errors, types of Codes.
Teaching- Chalk and talk method, Problems on source coding, error control codes
Learning RBT Level: L1, L2, L3
Process
Module-5
Linear Block Codes: Matrix description of Linear Block Codes, Error Detection & Correction capabilities
of Linear Block Codes, Single error correction Hamming code, Table lookup Decoding using Standard
Array.
Convolution codes: Convolution Encoder, Time domain approach, Transform domain approach, Code
Tree, Trellis and State Diagram.
Teaching- Chalk and talk method, Animation of convolution encoders
Learning RBT Level: L1, L2, L3
Process
Course outcomes (Course Skill Set)
At the end of the course the student will be able to:
1. Analyze different digital modulation techniques and choose the appropriate modulation technique
for the given specifications.
2. Test and validate symbol processing and performance parameters at the receiver under ideal and
corrupted bandlimited channels.
3. Differentiate various spread spectrum schemes and compute the performance parameters of
communication system.
4. Apply the fundamentals of information theory and perform source coding for given message
5. Apply different encoding and decoding techniques with error Detection and Correction.
Assessment Details (both CIE and SEE)

19.09.2023
03.10.2022

The weightage of Continuous Internal Evaluation (CIE) is 50% and for Semester End Exam (SEE) is 50%.
The minimum passing mark for the CIE is 40% of the maximum marks (20 marks out of 50). A student
shall be deemed to have satisfied the academic requirements and earned the credits allotted to each
subject/ course if the student secures not less than 35% (18 Marks out of 50) in the semester-end
examination (SEE), and a minimum of 40% (40 marks out of 100) in the sum total of the CIE (Continuous
Internal Evaluation) and SEE (Semester End Examination) taken together.
Continuous Internal Evaluation:
Three Unit Tests each of 20 Marks (duration 01 hour)
1. First test at the end of 5th week of the semester
2. Second test at the end of the 10th week of the semester
3. Third test at the end of the 15th week of the semester
Two assignments each of 10 Marks
4. First assignment at the end of 4th week of the semester
5. Second assignment at the end of 9th week of the semester
Group discussion/Seminar/quiz any one of three suitably planned to attain the COs and POs for 20
Marks (duration 01 hours)
6. At the end of the 13th week of the semester
The sum of three tests, two assignments, and quiz/seminar/group discussion will be out of 100 marks
and will be scaled down to 50 marks
(to have less stressed CIE, the portion of the syllabus should not be common /repeated for any of the
methods of the CIE. Each method of CIE should have a different syllabus portion of the course).
CIE methods /question paper is designed to attain the different levels of Bloom’s taxonomy as per
the outcome defined for the course.
Semester End Examination:
Theory SEE will be conducted by University as per the scheduled timetable, with common question
papers for the subject (duration 03 hours)
1. The question paper will have ten questions. Each question is set for 20 marks.
2. There will be 2 questions from each module. Each of the two questions under a module (with a
maximum of 3 sub-questions), should have a mix of topics under that module.
The students have to answer 5 full questions, selecting one full question from each module..Marks scored
out of 100 shall be proportionally reduced to 50 marks
Suggested Learning Resources:
Text Books:
1. Simon Haykin, “Digital Communication Systems”, John Wiley & sons, First Edition, 2014, ISBN 978-0-
471-64735-5.
2. John G Proakis and Masoud Salehi, “Fundamentals of Communication Systems”, 2014 Edition,
Pearson Education, ISBN 978-8-131-70573-5.
3. K Sam Shanmugam, “Digital and analog communication systems”, John Wiley India Pvt. Ltd, 1996.
4. Hari Bhat, Ganesh Rao, “Information Theory and Coding”, Cengage, 2017.
5. Todd K Moon, “Error Correction Coding”, Wiley Std. Edition, 2006.

Reference Books:
1. Bernard Sklar, “Digital Communications – Fundamentals and Applications”, Second Edition, Pearson
Education, 2016, ISBN: 9780134724058.
2. K Sam Shanmugam, “Digital and analog communication systems”, John Wiley India Pvt. Ltd, 1996.
Web links and Video Lectures (e-Resources)
 https://nptel.ac.in/courses/108102096

19.09.2023
03.10.2022

VISVESVARAYA TECHNOLOGICAL UNIVERSITY, BELAGAVI

B.E: Electronics & Communication Engineering / B.E: Electronics & Telecommunication Engineering
NEP, Outcome Based Education (OBE) and Choice Based Credit System (CBCS)
(Effective from the academic year 2021 – 22)

V Semester

Computer Communication Networks

Course Code 21EC53 CIE Marks 50
Teaching Hours/Week (L:T:P:S) 3:0:0:1 SEE Marks 50
Total Hours of Pedagogy 40 Total Marks 100
Credits 3 Exam Hours 3
Course objectives: This course will enable students to:
1. Understand the layering architecture of OSI reference model and TCP/IP protocol suite.
2. Understand the protocols associated with each layer.
3. Learn the different networking architectures and their representations.
4. Learn the functions and services associated with each layer.
Teaching-Learning Process (General Instructions)
These are sample Strategies, which teacher can use to accelerate the attainment of the various course
outcomes.
1. Lecture method (L): the traditional lecture method, or a different type of teaching method may be
adopted to develop the outcomes.
2. Show Video/animation films to explain the functioning of various concepts in networking.
3. Encourage collaborative (Group) Learning in the class.
4. Ask at least three HOTS (Higher-order Thinking) questions in the class, which promotes critical
thinking .
5. Adopt Problem Based Learning (PBL), which fosters students’ Analytical skills, develop thinking skills
such as the ability to evaluate, generalize, and analyse information rather than simply recall it.
6. Demonstrate implementation of various protocols to help better understand the functioning of various
concepts in networking.
7. Show the different ways to solve the same problem and encourage the students to come up with their
own creative ways to solve them.
8. Discuss how every concept can be applied to the real world - and when that's possible, it helps improve
the students' understanding.
Module-1
Introduction: Data communication: Components, Data representation, Data flow, Networks: Network
criteria, Physical Structures, Network types: LAN, WAN, Switching, The Internet. (1.1,1.2, 1.3 (1.3.1to
1.3.4 of Text).
Network Models: TCP/IP Protocol Suite: Layered Architecture, Layers in TCP/IP suite, Description of
layers, Encapsulation and Decapsulation, Addressing, Multiplexing and Demultiplexing, The OSI Model:
OSI Versus TCP/IP. (2.2, 2.3 of Text)
Data-Link Layer: Introduction: Nodes and Links, Services, Two Categories’ of link, Sublayers, Link
Layer addressing: Types of addresses, ARP (9.1, 9.2 (9.2.1, 9.2.2))
Teaching- Chalk and talk method, PowerPoint Presentation, YouTube videos, Animation of OSI and
Learning TCP-IP protocol suites, Example of ARP and RARP.
Process Self-Study: Internet standards and administration,
RBT Level: L1, L2, L3
Module-2
Data Link Control (DLC) services: Framing, Flow and Error Control. (11.1 of Text)
Media Access Control: Random Access: ALOHA, CSMA, CSMA/CD, CSMA/CA. (12.1 of Text).
Connecting Devices: Hubs, Switches, Virtual LANs: Membership, Configuration, Communication
between Switches, Advantages. (17.1,17.2 of text)
Wired and Wireless LANs: Ethernet Protocol, Standard Ethernet. (13.1, 13.2 (13.2.1 to 13.2.5 of Text)

19.09.2023
03.10.2022

Introduction to wireless LAN: Architectural Comparison, Characteristics, Access Control. (15.1 of Text)
Teaching- Chalk and talk method, PowerPoint Presentation, YouTube videos, Animations showing
Learning Framing, CSMA, Connecting devices, Problems on ALOHA, CSMA, Framing and Standard
Process ethernet.
Self-Study: Fast Ethernet, Gigabit ethernet & IEEE802.11 wireless LANs
RBT Level: L1, L2, L3
Module-3
Network Layer: Introduction, Network Layer services: Packetizing, Routing and Forwarding, Other
services, Packet Switching: Datagram Approach, Virtual Circuit Approach, IPV4 Addresses: Address
Space, Classful Addressing, Classless Addressing, DHCP, Network Address Resolution (18.1(excluding
18.1.3), 18.2, 18.4 of Text)
Network Layer Protocols: Internet Protocol (IP): Datagram Format, Fragmentation, Options, Security
of IPv4 Datagrams. (19.1of Text), IPv6 addressing and Protocol (22.1 and 22.2).
Unicast Routing: Introduction, Routing Algorithms: Distance Vector Routing, Link State Routing, Path
vector routing. (20.1, 20.2 of Text)
Teaching- Chalk and talk method, PowerPoint Presentation, YouTube videos, Animation of DHCP,
Learning routing protocols, Numericals on Addressing,
Process Self-Study: Network Layer performance, RIP, OSPF
RBT Level: L1, L2, L3
Module-4
Transport Layer: Introduction: Transport Layer Services, Connectionless and Connection oriented
Protocols, Transport Layer Protocols: Simple protocol, Stop and wait protocol, Go-BackN Protocol,
Selective repeat protocol, Piggybacking (23.1, 23.2.1, 23.2.2, 23.2.3, 23.2.4, 23.2.5 of Text)
Transport-Layer Protocols in the Internet: User Datagram Protocol: User Datagram, UDP Services,
UDP Applications, Transmission Control L1, L2, L3 Protocol: TCP Services, TCP Features, Segment,
Connection, State Transition diagram, Windows in TCP, Error control, TCP congestion control. (24.2,
24.3.1, 24.3.2, 24.3.3, 24.3.4, 24.3.6, 24.3.8, 24.3.9 of Text)
*Note: Exclude FSMs for CIE and SEE
Teaching- Chalk and talk method, PowerPoint Presentation, YouTube videos,
Learning Animation/Implementation of Flow control protocols and TCP using simulators,
Process Self-Study: Flow Control in TCP
RBT Level: L1, L2, L3
Module-5
Application Layer: Introduction: providing services, Application- layer paradigms, Standard Client –
Server Protocols: Hyper Text Transfer Protocol, FTP: Two connections, Control Connection, Data
Connection, Electronic Mail: Architecture, Domain Name system: Name space, DNS in internet,
Resolution, DNS Messages, Registrars, DDNS, security of DNS. (25.1, 26.1.2, 26.2, 26.3, 26.6 of Text)
Quality of Service (30.1, 30.2.) Network Security (31.1)
Teaching- Chalk and talk method, PowerPoint Presentation, YouTube videos,
Learning Animation/Implementation of HTTP, FTP, DNS using network simulators,
Process Self Study: WWW , TELNET
RBT Level: L1, L2, L3
Course outcomes (Course Skill Set)
At the end of the course the student will be able to:
1. Understand the concepts of networking thoroughly.
2. Identify the protocols and services of different layers.
3. Distinguish the basic network configurations and standards associated with each network.
4. Discuss and analyse the various applications that can be implemented on networks.
Assessment Details (both CIE and SEE)
The weightage of Continuous Internal Evaluation (CIE) is 50% and for Semester End Exam (SEE) is 50%.
The minimum passing mark for the CIE is 40% of the maximum marks (20 marks out of 50). A student
shall be deemed to have satisfied the academic requirements and earned the credits allotted to each
subject/ course if the student secures not less than 35% (18 Marks out of 50) in the semester-end

19.09.2023
03.10.2022

examination (SEE), and a minimum of 40% (40 marks out of 100) in the sum total of the CIE (Continuous
Internal Evaluation) and SEE (Semester End Examination) taken together.
Continuous Internal Evaluation:
Three Unit Tests each of 20 Marks (duration 01 hour)
1. First test at the end of 5th week of the semester
2. Second test at the end of the 10th week of the semester
3. Third test at the end of the 15th week of the semester
Two assignments each of 10 Marks
4. First assignment at the end of 4th week of the semester
5. Second assignment at the end of 9th week of the semester
Group discussion/Seminar/quiz any one of three suitably planned to attain the COs and POs for 20
Marks (duration 01 hours)
6. At the end of the 13th week of the semester
The sum of three tests, two assignments, and quiz/seminar/group discussion will be out of 100 marks
and will be scaled down to 50 marks
(to have less stressed CIE, the portion of the syllabus should not be common /repeated for any of the
methods of the CIE. Each method of CIE should have a different syllabus portion of the course).
CIE methods /question paper is designed to attain the different levels of Bloom’s taxonomy as per
the outcome defined for the course.
Semester End Examination:
Theory SEE will be conducted by University as per the scheduled timetable, with common question
papers for the subject (duration 03 hours)
1. The question paper will have ten questions. Each question is set for 20 marks.
2. There will be 2 questions from each module. Each of the two questions under a module (with a
maximum of 3 sub-questions), should have a mix of topics under that module.
The students have to answer 5 full questions, selecting one full question from each module.. Marks scored
out of 100 shall be proportionally reduced to 50 marks
Suggested Learning Resources:
Text Books:
Forouzan, “Data Communications and Networking”, 5th Edition, McGraw Hill, 2013, ISBN: 1-25-
906475-3.
Reference Books:
1. James J Kurose, Keith W Ross, “Computer Networks”, Pearson Education.
2. Wayne Tomasi, “Introduction to Data Communication and Networking”, Pearson India, 1st edition.
3. Andrew Tannenbaum, “Computer Networks”, Prentice Hall.
4. William Stallings, “Data and Computer Communications”, Prentice Hall.
Web links and Video Lectures (e-Resources)
 https://nptel.ac.in/courses/106105183.
 TCP/IP Tutorial and Technical Overview, (IBM Redbook) - Download From
http://www.redbooks.ibm.com/abstracts/gg243376.html
 TCP/IP Guide, Charles M Kozierok, Available Online - http://www.tcpipguide.com/
 Request for Comments (RFC) - IETF - http://www.ietf.org/rfc.html
 https://cosmolearning.org/courses/computer-networks-524/video-lectures/
 https://www.eecis.udel.edu/~bohacek/videoLectures/ComputerNetworking/ComputerNetworkin
g_v2.html
Activity Based Learning (Suggested Activities in Class)/ Practical Based learning
 Implementation of simple networks and various networking protocols and algorithms using
simulators like NCTUns / CISCO packet tracer and measurement of various parameters using
WireShark
 Implementation of simple networks and various networking protocols and algorithms in
C/C++/Python

19.09.2023
03.10.2022

VISVESVARAYA TECHNOLOGICAL UNIVERSITY, BELAGAVI

B.E: Electronics & Communication Engineering / B.E: Electronics & Telecommunication Engineering
NEP, Outcome Based Education (OBE) and Choice Based Credit System (CBCS)
(Effective from the academic year 2021 – 22)
V Semester

Communication Lab II
Course Code 21ECL55 CIE Marks 50
Teaching Hours/Week (L: T: P: S) 0:0:2:0 SEE Marks 50
Credits 1 Exam Hours 3
Course objectives:
This laboratory course enables students to
 Design and demonstrate communication circuits for different digital modulation techniques.
 To simulate Source coding Algorithms using C/C++/ MATLAB code.
 To simulate Error correcting and detecting codes using C/C++/ MATLAB code.
 Simulate the networking concepts and protocols using C/C++/ Network simulation tool.
 Understand entropies and mutual information of different communication channels.
Sl.No. Experiments
Implement the following using discrete components
1 FSK generation and detection

2 PSK generation and detection

3 DPSK Transmitter and receiver

4 QPSK Transmitter and Receiver

Implement the following in C/C++/MATLAB/Scilab/Python or any other Suitable software

5 Write a program to encode binary data using Huffman code and decode it.
6 Write a program to encode binary data using a (7,4) Hamming code and decode it.
7 Write a program to encode binary data using a ((3,1,2)/suitably designed) Convolution code and
decode it.
8 For a given data, use CRC-CCITT polynomial to obtain the CRC code. Verify the program for the
cases a) Without error b) With error
Implement the following algorithms in C/C++/MATLAB/Network simulator
9 Write a program for congestion control using leaky bucket algorithm.
10 Write a program for distance vector algorithm to find suitable path for transmission.

11 Write a program for flow control using sliding window protocols.

12 Configure a simple network (Bus/star) topology using simulation software OR
Configure a simple network (Ring/Mesh) topology using simulation software.
Demonstration Experiments (For CIE)
13 Configure and simulate simple Wireless Local Area network.
14 Simulate the BER performance of (2, 1, 3) binary convolutional code with generator sequences
g(1) =(1 0 1 1) and g(2) =(1 1 1 1) on AWGN channel. Use QPSK modulation scheme. Channel
decoding is to be performed through Viterbi decoding. Plot the bit error rate versus SNR (dB), i.e.
Pe,b versus Eb/N0. Consider binary input vector of size 3 lakh bits. Also find the coding gain.
15 Simulate the BER performance of (7, 4) Hamming code on AWGN channel. Use QPSK modulation

19.09.2023
03.10.2022

scheme. Channel decoding is to be performed through maximum-likelihood decoding. Plot the bit
error rate versus SNR (dB), i.e. Pe,b versus Eb/N0. Consider binary input vector of size 5 lakh bits.
Use the following parity check matrix for the (7, 4) Hamming code. Also find the coding gain.
1 0 0 1 1 1 0
H = [0 1 0 0 1 1 1]
0 0 1 1 1 0 1
16 Simulate the BER performance of rate 1/3 Turbo code. Turbo encoder uses two recursive
1+𝐷4
systematic encoders with 𝐺(𝐷) = [1, ] and pseudo-random interleaver. Use QPSK
1+𝐷+𝐷2 +𝐷3 +𝐷4
modulation scheme. Channel decoding is to be performed through maximum a-posteriori (MAP)
decoding algorithm. Plot the bit error rate versus SNR (dB), i.e. Pe,b versus Eb/N0. Consider binary
input vector of size of around 3 lakh bits and the block length as 10384 bits. Also find the coding
gain.
Course outcomes (Course Skill Set):
On the completion of this laboratory course, the students will be able to:
1. Design and test the digital modulation circuits and display the waveforms.
2. To Implement the source coding algorithm using C/C++/ MATLAB code.
3. To Implement the Error Control coding algorithms using C/C++/ MATLAB code.
4. Illustrate the operations of networking concepts and protocols using C programming and network
simulators.
Assessment Details (both CIE and SEE)

The weightage of Continuous Internal Evaluation (CIE) is 50% and for Semester End Exam (SEE) is
50%. The minimum passing mark for the CIE is 40% of the maximum marks (20 marks). A student shall
be deemed to have satisfied the academic requirements and earned the credits allotted to each course.
The student has to secure not less than 35% (18 Marks out of 50) in the semester-end examination
(SEE).
Continuous Internal Evaluation (CIE):
CIE marks for the practical course is 50 Marks.
The split-up of CIE marks for record/ journal and test are in the ratio 60:40.
 Each experiment to be evaluated for conduction with observation sheet and record write-up. Rubrics
for the evaluation of the journal/write-up for hardware/software experiments designed by the
faculty who is handling the laboratory session and is made known to students at the beginning of the
practical session.
 Record should contain all the specified experiments in the syllabus and each experiment write-up will
be evaluated for 10 marks.
 Total marks scored by the students are scaled downed to 30 marks (60% of maximum marks).
 Weightage to be given for neatness and submission of record/write-up on time.
 Department shall conduct 02 tests for 100 marks, the first test shall be conducted after the 8th week
of the semester and the second test shall be conducted after the 14 th week of the semester.
 In each test, test write-up, conduction of experiment, acceptable result, and procedural knowledge
will carry a weightage of 60% and the rest 40% for viva-voce.
 The suitable rubrics can be designed to evaluate each student’s performance and learning ability.
Rubrics suggested in Annexure-II of Regulation book
 The average of 02 tests is scaled down to 20 marks (40% of the maximum marks).
The Sum of scaled-down marks scored in the report write-up/journal and average marks of two tests is
the total CIE marks scored by the student.
Semester End Evaluation (SEE):
SEE marks for the practical course is 50 Marks.
SEE shall be conducted jointly by the two examiners of the same institute, examiners are appointed by

19.09.2023
03.10.2022

the University
All laboratory experiments are to be included for practical examination.
(Rubrics) Breakup of marks and the instructions printed on the cover page of the answer script to be
strictly adhered to by the examiners. OR based on the course requirement evaluation rubrics shall be
decided jointly by examiners.
Students can pick one question (experiment) from the questions lot prepared by the internal /external
examiners jointly.
Evaluation of test write-up/ conduction procedure and result/viva will be conducted jointly by
examiners.
General rubrics suggested for SEE are mentioned here, writeup-20%, Conduction procedure and result
in -60%, Viva-voce 20% of maximum marks. SEE for practical shall be evaluated for 100 marks and
scored marks shall be scaled down to 50 marks (however, based on course type, rubrics shall be
decided by the examiners).
Change of experiment is allowed only once and 15% Marks allotted to the procedure part to be made
zero.
The duration of SEE is 03 hours.
Rubrics suggested in Annexure-II of Regulation book

Suggested Learning Resources:

1. Simon Haykin, “Digital Communication Systems”, John Wiley & sons, First Edition, 2014, ISBN 978-0-
471-64735-5.
2. K Sam Shanmugam, “Digital and analog communication systems”, John Wiley India Pvt. Ltd, 1996.
3. Forouzan, “Data Communications and Networking”, 5th Edition, McGraw Hill, 2013, ISBN: 1-25-
906475-3.

19.09.2023
03.10.2022

VISVESVARAYA TECHNOLOGICAL UNIVERSITY, BELAGAVI

B.E: Electronics & Communication Engineering / B.E: Electronics & Telecommunication Engineering
NEP, Outcome Based Education (OBE) and Choice Based Credit System (CBCS)
(Effective from the academic year 2021 – 22)
V Semester
IoT (Internet of Things) Lab
Course Code 21EC581 CIE Marks 50
Teaching Hours/Week (L: T:P: S) 0:0:2:0 SEE Marks 50
Credits 1 Exam Hours 03
Course objectives:
 To impart necessary and practical knowledge of components of Internet of Things
 To develop skills required to build real-life IoT based projects.
Sl.No Experiments
1 i) To interface LED/Buzzer with Arduino/Raspberry Pi and write a program to ‘turn ON’ LED for
1 sec after every 2 seconds.
ii) To interface Push button/Digital sensor (IR/LDR) with Arduino/Raspberry Pi and write a
program to ‘turn ON’ LED when push button is pressed or at sensor detection.
2 i) To interface DHT11 sensor with Arduino/Raspberry Pi and write a program to print
temperature and humidity readings.
ii) To interface OLED with Arduino/Raspberry Pi and write a program to print temperature and
humidity readings on it.
3 To interface motor using relay with Arduino/Raspberry Pi and write a program to ‘turn ON’
motor when push button is pressed.
4 To interface Bluetooth with Arduino/Raspberry Pi and write a program to send sensor data to
smartphone using Bluetooth.
5 To interface Bluetooth with Arduino/Raspberry Pi and write a program to turn LED ON/OFF
when '1'/'0' is received from smartphone using Bluetooth.
6 Write a program on Arduino/Raspberry Pi to upload temperature and humidity data to
thingspeak cloud.
7 Write a program on Arduino/Raspberry Pi to retrieve temperature and humidity data from
thingspeak cloud.
8 To install MySQL database on Raspberry Pi and perform basic SQL queries.
9 Write a program on Arduino/Raspberry Pi to publish temperature data to MQTT broker.
10 Write a program to create UDP server on Arduino/Raspberry Pi and respond with humidity data
to UDP client when requested.
11 Write a program to create TCP server on Arduino/Raspberry Pi and respond with humidity data
to TCP client when requested.
12 Write a program on Arduino/Raspberry Pi to subscribe to MQTT broker for temperature data
and print it.
Course outcomes (Course Skill Set):
At the end of the course the student will be able to:
1. Understand internet of Things and its hardware and software components
2. Interface I/O devices, sensors & communication modules
3. Remotely monitor data and control devices
4. Develop real life IoT based projects
Assessment Details (both CIE and SEE)
The weightage of Continuous Internal Evaluation (CIE) is 50% and for Semester End Exam (SEE) is
50%. The minimum passing mark for the CIE is 40% of the maximum marks (20 marks). A student shall
be deemed to have satisfied the academic requirements and earned the credits allotted to each course.
The student has to secure not less than 35% (18 Marks out of 50) in the semester-end examination
(SEE).

19.09.2023
03.10.2022

Continuous Internal Evaluation (CIE):

CIE marks for the practical course is 50 Marks.
The split-up of CIE marks for record/ journal and test are in the ratio 60:40.
 Each experiment to be evaluated for conduction with observation sheet and record write-up.
Rubrics for the evaluation of the journal/write-up for hardware/software experiments designed by
the faculty who is handling the laboratory session and is made known to students at the beginning
of the practical session.
 Record should contain all the specified experiments in the syllabus and each experiment write-up
will be evaluated for 10 marks.
 Total marks scored by the students are scaled downed to 30 marks (60% of maximum marks).
 Weightage to be given for neatness and submission of record/write-up on time.
 Department shall conduct 02 tests for 100 marks, the first test shall be conducted after the 8 th week
of the semester and the second test shall be conducted after the 14th week of the semester.
 In each test, test write-up, conduction of experiment, acceptable result, and procedural knowledge
will carry a weightage of 60% and the rest 40% for viva-voce.
 The suitable rubrics can be designed to evaluate each student’s performance and learning ability.
Rubrics suggested in Annexure-II of Regulation book
 The average of 02 tests is scaled down to 20 marks (40% of the maximum marks).
The Sum of scaled-down marks scored in the report write-up/journal and average marks of two tests is
the total CIE marks scored by the student.
Semester End Evaluation (SEE):
SEE marks for the practical course is 50 Marks.
SEE shall be conducted jointly by the two examiners of the same institute, examiners are appointed by
the University
 All laboratory experiments are to be included for practical examination.
 (Rubrics) Breakup of marks and the instructions printed on the cover page of the answer script to be
strictly adhered to by the examiners. OR based on the course requirement evaluation rubrics shall be
decided jointly by examiners.
 Students can pick one question (experiment) from the questions lot prepared by the internal
/external examiners jointly.
 Evaluation of test write-up/ conduction procedure and result/viva will be conducted jointly by
examiners.
 General rubrics suggested for SEE are mentioned here, writeup-20%, Conduction procedure and
result in -60%, Viva-voce 20% of maximum marks. SEE for practical shall be evaluated for 100 marks
and scored marks shall be scaled down to 50 marks (however, based on course type, rubrics shall be
decided by the examiners)
Change of experiment is allowed only once and 15% Marks allotted to the procedure part to be made
zero.
The duration of SEE is 03 hours

Rubrics suggested in Annexure-II of Regulation book

Suggested Learning Resources:

1. Vijay Madisetti, Arshdeep Bahga, Internet of Things. "A Hands on Approach", University Press
2. Dr. SRN Reddy, Rachit Thukral and Manasi Mishra, "Introduction to Internet of Things: A practical
Approach", ETI Labs
3. Pethuru Raj and Anupama C Raman, "The Internet of Things: Enabling Technologies, Platforms, and
Use Cases", CRC Press
4. Jeeva Jose, "Internet of Things", Khanna Publishing House, Delhi
5. Adrian McEwen, "Designing the Internet of Things", Wiley
6. Raj Kamal, "Internet of Things: Architecture and Design", McGraw Hill

19.09.2023
03.10.2022

VISVESVARAYA TECHNOLOGICAL UNIVERSITY, BELAGAVI

B.E: Electronics & Communication Engineering / B.E: Electronics & Telecommunication Engineering
NEP, Outcome Based Education (OBE) and Choice Based Credit System (CBCS)
(Effective from the academic year 2021 – 22)
V Semester

Communication Simulink Toolbox

Course Code 21EC582 CIE Marks 50
Teaching Hours/Week (L: T:P: S) 0:0:2:0 SEE Marks 50
Credits 1 Exam Hours 03
Course objectives:
 To impart knowledge of simulation software in digital communications
 To develop skills required to build and analyze the performance of various simulated
communication systems under different conditions
Sl. No. Experiments
1 Modulation & demodulation of a random binary data stream using 16 – QAM.
2 Bit error rate (BER) improvement using Pulse Shaping on 16 – QAM signal. (Use forward error
correction (FEC) coding.)
3 Perform OFDM modulation and obtain time domain and frequency domain plots to show a low-
rate signal, a high-rate signal, and a frequency selective multipath channel response.
4 (a) Simulate basic OFDM with no cyclic prefix.
(b) Perform Equalization, Convolution, and Cyclic Prefix Addition on basic OFDM.
5 OFDM with FFT Based Oversampling - Modify an OFDM+ Cyclic Prefix signal to efficiently output
an oversampled waveform from the OFDM modulator.
6 Simulate a basic communication system in which the signal is first QPSK modulated and then
subjected to Orthogonal Frequency Division Multiplexing (OFDM).
7 Obtain the scatter plots & eye diagrams of a QPSK signal to visualize the signal behaviour in
presence of AWGN.
8 (a) Generate a multiband signal using the Communications Toolbox.
(b) Random noise generation using Simulink & display histogram plots of Gaussian, Rayleigh,
Rician, and Uniform noise.
9 QPSK Transmitter and Receiver in Simulink.
10 Multipath Fading Channel in Simulink – For example: Simulate QPSK transmission over a
 multipath Rayleigh fading channel and
 a multipath Rician fading channel.
11 Adjacent and Co-Channel Interference using Simulink.
 Use PSK-modulated signals to show the effects of adjacent and co-channel interference
on a transmitted signal.
12 Modulation Classification with Deep Learning
 Predict Modulation Type Using CNN
Course outcomes (Course Skill Set):
At the end of the course the student will be able to:
1. Perform sampling, aliasing, filtering, and quadrature modulation through simulation.
2. Plot signal space representation of digital modulation techniques.
3. Design and implement a pulse shape and matched filter to avoid inter-symbol interference and
maximize receiver SNR.
4. Demonstrate advanced wireless communication techniques like Multipath fading, CCI etc. and model
the same using MATLAB / Simulink.
Assessment Details (both CIE and SEE)
The weightage of Continuous Internal Evaluation (CIE) is 50% and for Semester End Exam (SEE) is
50%. The minimum passing mark for the CIE is 40% of the maximum marks (20 marks). A student shall
be deemed to have satisfied the academic requirements and earned the credits allotted to each course.

19.09.2023
03.10.2022

The student has to secure not less than 35% (18 Marks out of 50) in the semester-end examination
(SEE).
Continuous Internal Evaluation (CIE):
CIE marks for the practical course is 50 Marks.
The split-up of CIE marks for record/ journal and test are in the ratio 60:40.
 Each experiment to be evaluated for conduction with observation sheet and record write-up.
Rubrics for the evaluation of the journal/write-up for hardware/software experiments designed by
the faculty who is handling the laboratory session and is made known to students at the beginning
of the practical session.
 Record should contain all the specified experiments in the syllabus and each experiment write-up
will be evaluated for 10 marks.
 Total marks scored by the students are scaled downed to 30 marks (60% of maximum marks).
 Weightage to be given for neatness and submission of record/write-up on time.
 Department shall conduct 02 tests for 100 marks, the first test shall be conducted after the 8th week
of the semester and the second test shall be conducted after the 14 th week of the semester.
 In each test, test write-up, conduction of experiment, acceptable result, and procedural knowledge
will carry a weightage of 60% and the rest 40% for viva-voce.
 The suitable rubrics can be designed to evaluate each student’s performance and learning ability.
Rubrics suggested in Annexure-II of Regulation book
 The average of 02 tests is scaled down to 20 marks (40% of the maximum marks).
The Sum of scaled-down marks scored in the report write-up/journal and average marks of two tests is
the total CIE marks scored by the student.
Semester End Evaluation (SEE):
SEE marks for the practical course is 50 Marks.
SEE shall be conducted jointly by the two examiners of the same institute, examiners are appointed by
the University
 All laboratory experiments are to be included for practical examination.
 (Rubrics) Breakup of marks and the instructions printed on the cover page of the answer script to be
strictly adhered to by the examiners. OR based on the course requirement evaluation rubrics shall be
decided jointly by examiners.
 Students can pick one question (experiment) from the questions lot prepared by the internal
/external examiners jointly.
 Evaluation of test write-up/ conduction procedure and result/viva will be conducted jointly by
examiners.
 General rubrics suggested for SEE are mentioned here, writeup-20%, Conduction procedure and
result in -60%, Viva-voce 20% of maximum marks. SEE for practical shall be evaluated for 100 marks
and scored marks shall be scaled down to 50 marks (however, based on course type, rubrics shall be
decided by the examiners)
Change of experiment is allowed only once and 15% Marks allotted to the procedure part to be made
zero.
The duration of SEE is 03 hours

Rubrics suggested in Annexure-II of Regulation book

Suggested Learning Resources:

1. Communication Toolbox – Examples (https://in.mathworks.com/)
2. "Digital Communication Laboratory" Courseware by Professor Lee C Potter, Dr. Yang Yang, Electrical
and Computer Engineering, The Ohio State University.

19.09.2023
03.10.2022

VISVESVARAYA TECHNOLOGICAL UNIVERSITY, BELAGAVI

B.E: Electronics & Communication Engineering / B.E: Electronics & Telecommunication Engineering
NEP, Outcome Based Education (OBE) and Choice Based Credit System (CBCS)
(Effective from the academic year 2021 – 22)
VI Semester

VLSI Design and Testing

Course Code 21EC63 CIE Marks 50
Teaching Hours/Week (L:T:P:S) 3:0:0:1 SEE Marks 50
Total Hours of Pedagogy 40 Total Marks 100
Credits 3 Exam Hours 3
Course objectives:
 Impart knowledge of MOS transistor theory and CMOS technology
 Learn the operation principles and analysis of inverter circuits.
 Infer the operation of Semiconductor memory circuits.
 Demonstrate the concept of CMOS testing.
Teaching-Learning Process (General Instructions)
The sample strategies, which the teacher can use to accelerate the attainment of the various course
outcomes are listed in the following:
1. Lecture method (L) does not mean only the traditional lecture method, but a different type of
teaching method may be adopted to develop the outcomes.
2. Arrange visits to nearby PSUs and industries.
3. Show Video/animation films to explain the functioning of various fabrication & testing techniques.
4. Encourage collaborative (Group) Learning in the class
5. Topics will be introduced in multiple representations.
6. Discuss how every concept can be applied to the real world - and when that's possible, it helps
improve the students' understanding.
Module-1
Introduction: A Brief History, MOS Transistors, CMOS Logic (1.1 to 1.4 of TEXT1)
MOS Transistor Theory: Introduction, Long-channel I-V Characteristics, Non-ideal I-V Effects, DC
Transfer Characteristics (2.1, 2.2, 2.4 and 2.5 of TEXT1).
Teaching-Learning Chalk and talk method, PowerPoint Presentation, YouTube videos, Videos on
Process transistor working
Self-study topics: MOSFET Scaling and Small-Geometry Effects
RBT Level: L1, L2, L3
Module-2
Fabrication: CMOS Fabrication and Layout, Introduction, CMOS Technologies, Layout Design Rules, (1.5
and 3.1 to 3.3 of TEXT1).
Delay: Introduction, Transient Response, RC Delay Model, Linear Delay Model, Logical Efforts of Paths
(4.1 to 4.5 of TEXT1, except sub-sections 4.3.7, 4.4.5, 4.4.6, 4.5.5 and 4.5.6).
Teaching-Learning Chalk and talk method, Power point presentation, YouTube videos, Videos on
Process fabrication
Self-study topics: Layouts of complex design using Euler’s method
RBT Level: L1, L2, L3
Module-3
Semiconductor Memories: Introduction, Dynamic Random Access Memory (DRAM) and Static Random
Access Memory (SRAM), Nonvolatile Memory, Flash Memory, Ferroelectric Random Access Memory
(FRAM) (10.1 to 10.6 of TEXT2)
Teaching-Learning Chalk and talk method, PowerPoint Presentation, YouTube videos on Standard

19.09.2023
03.10.2022

Process cell memory Design

Self-study topics: Memory array design
RBT Level: L1, L2, L3
Module-4
Faults in digital circuits: Failures and faults, Modelling of faults, Temporary faults
Test generation for combinational logic circuits: Fault diagnosis of digital circuits, test generation
techniques for combinational circuits, Detection of multiple faults in combinational logic circuits.
(1.1 to 1.3, 2.1 to 2.3 of TEXT3)
Teaching-Learning Chalk and talk method, PowerPoint Presentation, YouTube videos, videos on
Process testing algorithms for test generation
Self-study topics: Testable combinational logic circuits
RBT Level: L1, L2, L3
Module-5
Test generation for sequential circuits: Testing of sequential circuits as iterative combinational
circuits, state table verification, test generation based on circuits structure, functional fault models, test
generation based on functional fault models.
Design of testable sequential circuits: Controllability and Observability, Adhoc design rules, design of
diagnosable sequential circuits, The scan path technique, LSSD, Random Access scan technique, partial
scan.
(4.1 to 4.5, 5.1 to 5.7 of TEXT3)
Teaching-Learning Chalk and talk method/Power point presentation, YouTube videos
Process Self-study topics: Memory testing techniques
RBT Level: L1, L2, L3
Course outcomes (Course Skill Set)
At the end of the course the student will be able to:
1. Demonstrate understanding of MOS transistor theory, CMOS fabrication flow and technology
scaling.
2. Draw the basic gates using the stick and layout diagram with the knowledge of physical design
aspects.
3. Interpret memory elements along with timing considerations.
4. Interpret testing and testability issues in combinational logic design.
5. Interpret testing and testability issues in combinational logic design.
Assessment Details (both CIE and SEE)
The weightage of Continuous Internal Evaluation (CIE) is 50% and for Semester End Exam (SEE) is 50%.
The minimum passing mark for the CIE is 40% of the maximum marks (20 marks out of 50). A student
shall be deemed to have satisfied the academic requirements and earned the credits allotted to each
subject/ course if the student secures not less than 35% (18 Marks out of 50) in the semester-end
examination (SEE), and a minimum of 40% (40 marks out of 100) in the sum total of the CIE (Continuous
Internal Evaluation) and SEE (Semester End Examination) taken together.

Continuous Internal Evaluation:

Three Unit Tests each of 20 Marks (duration 01 hour)
1. First test at the end of 5th week of the semester
2. Second test at the end of the 10th week of the semester
3. Third test at the end of the 15th week of the semester
Two assignments each of 10 Marks
4. First assignment at the end of 4th week of the semester
5. Second assignment at the end of 9th week of the semester
Group discussion/Seminar/quiz any one of three suitably planned to attain the COs and POs for 20

19.09.2023
03.10.2022

Marks (duration 01 hours)

6. At the end of the 13th week of the semester
The sum of three tests, two assignments, and quiz/seminar/group discussion will be out of 100 marks
and will be scaled down to 50 marks
(to have less stressed CIE, the portion of the syllabus should not be common /repeated for any of the
methods of the CIE. Each method of CIE should have a different syllabus portion of the course).
CIE methods /question paper is designed to attain the different levels of Bloom’s taxonomy as per
the outcome defined for the course.
Semester End Examination:
Theory SEE will be conducted by University as per the scheduled timetable, with common question
papers for the subject (duration 03 hours)
1. The question paper will have ten questions. Each question is set for 20 marks.
2. There will be 2 questions from each module. Each of the two questions under a module (with a
maximum of 3 sub-questions), should have a mix of topics under that module.
The students have to answer 5 full questions, selecting one full question from each module..Marks scored
out of 100 shall be reduced proportionally to 50 marks

Suggested Learning Resources:

Text Books:
1. “CMOS VLSI Design- A Circuits and Systems Perspective”, Neil H E Weste, and David Money Harris 4 th
Edition, Pearson Education.
2. “CMOS Digital Integrated Circuits: Analysis and Design”, Sung Mo Kang & Yosuf Leblebici, Third
Edition, Tata McGraw-Hill.
3. “Digital Circuit Testing and Testability”, Lala Parag K, New York, Academic Press, 1997.
Reference Books:
1. “Basic VLSI Design”, Douglas A Pucknell, Kamran Eshraghian, 3rd Edition, Prentice Hall of India
publication, 2005.
2. “Essential of Electronic Testing for Digital, Memory and Mixed Signal Circuits”, Vishwani D Agarwal,
Springer, 2002.
Web links and Video Lectures (e-Resources)
 https://www.youtube.com/watch?v=oL8SKNxEaHs&list=PLLy_2iUCG87Bdulp9brz9AcvW_TnFCUmM
 https://www.youtube.com/watch?v=lRpt1fCHd8Y&list=PLCmoXVuSEVHlEJi3SwdyJ4EICffuyqpjk
 https://www.youtube.com/watch?v=yLqLD8Y4-Qc
Activity Based Learning (Suggested Activities in Class)/ Practical Based learning
 Model displayed for clear understanding of fabrication process of MOS transistor
 Practise session can be held to understand the significance of various layers in MOS process, with
the help of coloured layouts

19.09.2023
03.10.2022

VISVESVARAYA TECHNOLOGICAL UNIVERSITY, BELAGAVI

B.E: Electronics & Communication Engineering / B.E: Electronics & Telecommunication Engineering
NEP, Outcome Based Education (OBE) and Choice Based Credit System (CBCS)
(Effective from the academic year 2021 – 22)
VI Semester

VLSI Laboratory
Course Code 21ECL66 CIE Marks 50
Teaching Hours/Week (L: T: P: S) 0:0:2:0 SEE Marks 50
Credits 1 Exam Hours 3
Course objectives:
This laboratory course enables students to
 Design, model, simulate and verify digital circuits.
 Design layouts and perform physical verification of CMOS digital circuits.
 Perform ASIC design flow and understand the process of synthesis, synthesis constraints and
evaluating the synthesis reports to obtain optimum gate level netlist.
 Perform RTL-GDSII flow and understand the stages in ASIC.
Sl.No. Experiments
ASIC Digital Design
1 4-Bit Adder
• Write Verilog Code
• Verify the Functionality using Test-bench
• Synthesize the design by setting proper constraints and obtain the netlist.
From the report generated identify Critical path, Maximum delay, Total number of cells, Power
requirement and Total area required

2 4-Bit Booth Multiplier

• Write Verilog Code
• Verify the Functionality using Test-bench
• Synthesize the design by setting proper constraints and obtain the netlist.
From the report generated identify Critical path, Maximum delay, Total number of cells, Power
requirement and Total area required
3 32-Bit ALU Supporting 4-Logical and 4-Arithmetic operations, using case and if statement for ALU
Behavioral Modeling
• Write Verilog Code
• Verify functionality using Test-bench
• Synthesize the design targeting suitable library and by setting area and timing constraints
• Tabulate the Area, Power and Delay for the Synthesized netlist
• Identify Critical path

4 Latch and Flip-Flop

 Synthesize the design and compare the synthesis report (D, SR, JK)

ASIC Analog Design

5 a) Capture the schematic of CMOS inverter with load capacitance of 0.1pF and set the widths of
Inverter with Wn = Wp, Wn = 2Wp, Wn = Wp/2 and length at selected technology.
Carry out the following:

19.09.2023
03.10.2022

i. Set the input signal to a pulse with rise time, fall time of 1ns and pulse width of 10ns
and the time period of 20ns and plot the input voltage and output voltage of designed
inverter?
ii. From the simulation result compute tpHL, tpLH and td for all three geometrical
settings of width?
iii. Tabulate the results of delay and find the best geometry for minimum delay for CMOS
inverter?
b) Draw layout of inverter with Wp/Wn = 40/20, use optimum layout methods. Verify for DRC
and LVS, extract parasitic and perform post layout simulations, compare the results with pre-
layout simulations. Record the observations.
6 a) Capture the schematic of 2-input CMOS NAND gate having similar delay as that of CMOS
inverter computed in experiment above. Verify the functionality of NAND gate and also find
out the delay td for all four possible combinations of input vectors. Table the results. Increase
the drive strength to 2X and 4X and tabulate the results.
b) Draw the layout of NAND with Wp/Wn = 40/20, use optimum layout methods. Verify for DRC
and LVS, extract parasitic and perform post layout simulations, compare the results with pre-
layout simulations. Record the observations.
7 a) Capture schematic of Common Source Amplifier with PMOS Current Mirror Load and find its
transient response and AC response? Measure the Unit Gain Bandwidth (UGB), amplification
factor by varying transistor geometries, study the impact of variation in width to UGB.
b) Draw Layout of common source amplifier, use optimum layout methods. Verify for DRC & LVS,
extract parasitic and perform post layout simulations, compare the results with pre-layout
simulations. Record the observations.

8 a) Capture schematics of two-stage operational amplifier and measure the following:

i. UGB
ii. dB Bandwidth
iii. Gain Margin and phase margin with and without coupling capacitance
iv. Use the op-amp in the inverting and non-inverting configuration and verify its
functionality.
v. Study the UGB, 3dB bandwidth, gain and power requirement in op-amp by varying the
stage wise transistor geometries and record the observations.
b) Draw layout of two-stage operational amplifier with minimum transistor width set to 300 (in
180/90/45 nm technology), choose appropriate transistor geometries as per the results obtained
in part a. Use optimum layout methods. Verify for DRC and LVS, extract parasitic and perform
post layout simulations, compare the results with pre-layout simulations. Record the
observations.
Demonstration Experiments ( For CIE )
9 UART
• Write Verilog Code
• Verify the Functionality using Test-bench
• Synthesize the design targeting suitable library and by setting area and timing constraints
• Tabulate the Area, Power and Delay for the Synthesized netlist, Identify Critical path
10 For synthesized netlist carry out the following:
• Floor planning
• Placement and Routing
• Record the parameters such as no. of metal layers used for routing, flip method for placement
of standard cells
• Physical Verification and record the DRC and LVS reports
• Generate GDSII

19.09.2023
03.10.2022

11 Design and characterize 6T binary SRAM cell and measure the following:
• Read Time, Write Time, SNM, Power
• Draw Layout of 6T SRAM, use optimum layout methods. Verify for DRC & LVS, extract parasitic
and perform post layout simulations, compare the results with pre-layout simulations. Record the
observations.
Course outcomes (Course Skill Set):
On the completion of this laboratory course, the students will be able to:
1. Design and simulate combinational and sequential digital circuits using Verilog HDL.
2. Understand the synthesis process of digital circuits using EDA tool.
3. Perform ASIC design flow and understand the process of synthesis, synthesis constraints and
evaluating the synthesis reports to obtain optimum gate level netlist.
4. Design and simulate basic CMOS circuits like inverter, common source amplifier, differential
amplifier, SRAM.
5. Perform RTL_GDSII flow and understand the stages in ASIC design.
Assessment Details (both CIE and SEE)

The weightage of Continuous Internal Evaluation (CIE) is 50% and for Semester End Exam (SEE) is
50%. The minimum passing mark for the CIE is 40% of the maximum marks (20 marks). A student shall
be deemed to have satisfied the academic requirements and earned the credits allotted to each course.
The student has to secure not less than 35% (18 Marks out of 50) in the semester-end examination
(SEE).
Continuous Internal Evaluation (CIE):
CIE marks for the practical course is 50 Marks.
The split-up of CIE marks for record/ journal and test are in the ratio 60:40.
 Each experiment to be evaluated for conduction with observation sheet and record write-up. Rubrics
for the evaluation of the journal/write-up for hardware/software experiments designed by the
faculty who is handling the laboratory session and is made known to students at the beginning of the
practical session.
 Record should contain all the specified experiments in the syllabus and each experiment write-up will
be evaluated for 10 marks.
 Total marks scored by the students are scaled downed to 30 marks (60% of maximum marks).
 Weightage to be given for neatness and submission of record/write-up on time.
 Department shall conduct 02 tests for 100 marks, the first test shall be conducted after the 8th week
of the semester and the second test shall be conducted after the 14 th week of the semester.
 In each test, test write-up, conduction of experiment, acceptable result, and procedural knowledge
will carry a weightage of 60% and the rest 40% for viva-voce.
 The suitable rubrics can be designed to evaluate each student’s performance and learning ability.
Rubrics suggested in Annexure-II of Regulation book
 The average of 02 tests is scaled down to 20 marks (40% of the maximum marks).
The Sum of scaled-down marks scored in the report write-up/journal and average marks of two tests is
the total CIE marks scored by the student.
Semester End Evaluation (SEE):
SEE marks for the practical course is 50 Marks.
SEE shall be conducted jointly by the two examiners of the same institute, examiners are appointed by
the University
All laboratory experiments are to be included for practical examination.
(Rubrics) Breakup of marks and the instructions printed on the cover page of the answer script to be
strictly adhered to by the examiners. OR based on the course requirement evaluation rubrics shall be

19.09.2023
03.10.2022

decided jointly by examiners.

Students can pick one question (experiment) from the questions lot prepared by the internal /external
examiners jointly.
Evaluation of test write-up/ conduction procedure and result/viva will be conducted jointly by
examiners.
General rubrics suggested for SEE are mentioned here, writeup-20%, Conduction procedure and result
in -60%, Viva-voce 20% of maximum marks. SEE for practical shall be evaluated for 100 marks and
scored marks shall be scaled down to 50 marks (however, based on course type, rubrics shall be
decided by the examiners).
Change of experiment is allowed only once and 15% Marks allotted to the procedure part to be made
zero.
The duration of SEE is 03 hours.
Rubrics suggested in Annexure-II of Regulation book

19.09.2023
03.10.2022

VISVESVARAYA TECHNOLOGICAL UNIVERSITY, BELAGAVI

B.E: Electronics & Communication Engineering / B.E: Electronics & Telecommunication Engineering
NEP, Outcome Based Education (OBE) and Choice Based Credit System (CBCS)
(Effective from the academic year 2021 – 22)
VI Semester

Communication Engineering
Course Code 21EC651 CIE Marks 50
Teaching Hours/Week (L:T:P:S) 3:0:0: 1 SEE Marks 50
Total Hours of Pedagogy 40 Total Marks 100
Credits 3 Exam Hours 3
Course objectives:
This course will enable students to:
• Describe essential elements of an electronic communication system.
• Understand Amplitude, Frequency & Phase modulations, and Amplitude demodulation.
• Define the sampling theorem and methods to generate pulse modulations.
• Learn the various methods of digital modulation techniques and compare the different schemes.
• Introduce the basic concepts of information theory and coding.
• Understand the basic concepts of wireless and cellular communications.
Teaching-Learning Process (General Instructions)
The sample strategies, which the teacher can use to accelerate the attainment of the various course
outcomes are listed in the following:
1. Lecture method (L) does not mean only the traditional lecture method, but a different type of
teaching method may be adopted to develop the outcomes.
2. Show Video/animation films to explain the evolution of communication technologies.
3. Encourage collaborative (Group) Learning in the class
4. Ask at least three HOTS (Higher-order Thinking) questions in the class, which promotes critical
thinking
5. Adopt Problem Based Learning (PBL), which fosters students’ Analytical skills, develop thinking
skills such as the ability to evaluate, generalize, and analyze information rather than simply recall
it.
6. Show the different ways to solve the same problem and encourage the students to come up with
their own creative ways to solve them.
7. Discuss how every concept can be applied to the real world - and when that's possible, it helps
improve the students' understanding.
Module-1
Introduction to Electronic Communications: Historical perspective, Electromagnetic frequency
spectrum, Signal and its representation, Elements of electronic communications system, primary
communication resources, signal transmission concepts, Analog and digital transmission, Modulation,
Concept of frequency translation, Signal radiation and propagation (Text 1: 1.1 to 1.10)
Teaching- Chalk and talk method, Power Point Presentation
Learning Self-study topics: Classification of Signals and systems
Process
RBT Level: L1, L2, L3
Module-2
Amplitude Modulation Techniques: Types of analog modulation, Principle of amplitude modulation,
AM power distribution, Limitations of AM, (TEXT 1: 4.1, 4.2, 4.4, 4.6)
Angle Modulation Techniques: Principles of Angle modulation, Theory of FM-basic Concepts, Theory
of phase modulation (TEXT1: 5.1, 5.2, 5.5)
Teaching- Chalk and talk method/Power point presentation
Learning Self-study topics: DSBSC, SSB and VSB modulation techniques and comparison.
Process
RBT Level: L1, L2, L3

19.09.2023
03.10.2022

Module-3
Sampling Theorem and Pulse Modulation Techniques: Digital Versus Analog Transmissions,
Sampling Theorem, Classification of pulse modulation techniques, PAM, PWM, PPM, PCM, Quantization
of signals (TEXT 1: 7.2 to 7.8)
Teaching- Chalk and talk method
Learning Self-study topics: Differential PCM and Delta Modulation
Process
RBT Level: L1, L2, L3
Module-4
Digital Modulation Techniques: Types of digital Modulation, ASK, FSK, PSK, QPSK. (TEXT 1: 9.1 to 9.5)
Information Theory, Source and Channel Coding: Information, Entropy and its properties, Shannon,-
Hartley Theorem, Objectives of source coding, Source coding technique, Shannon source coding theorem,
Channel coding theorem, Error Control and Coding. [Text1: 10.1,10.2, 10.11.2, 11.1 to 11.3, 11.8, 11.9,
11.12]
Teaching- Chalk and talk method, Power Point Presentation.
Learning Self-study topics: Quadrature Amplitude Modulation, Comparison of Digital Modulation
Process techniques.
RBT Level: L1, L2, L3
Module-5
Evolution of wireless communication systems: Brief History of wireless communications, Advantages
of wireless communication, disadvantages of wireless communications, wireless network generations,
Comparison of wireless systems, Evolution of next generation networks, Applications of wireless
communication (TEXT 2: 1.1 to 1.7)
Principles of Cellular Communications: Cellular terminology, Cell structure and Cluster, Frequency
reuse concept, Cluster size and system capacity, Method of locating cochannel cells, Frequency reuse
distance (TEXT 2: 4.1 to 4.7)
Teaching- Chalk and talk method/Power point presentation
Learning Self-study topics: Basic propagation mechanisms, Multipath fading.
Process
RBT Level: L1, L2, L3
Course outcomes (Course Skill Set)
At the end of the course the student will be able to:
1. Describe the scheme and concepts of radiation and propagation of communication signals through
air.
2. Understand the AM and FM modulation techniques and represent the signal in time and frequency
domain relations.
3. Understand the process of sampling and quantization of signals and describe different methods to
generate digital signals.
4. Describe the basic digital modulation techniques, channel capacity, source coding technique and
the channel coding.
5. Compare the different wireless communication systems and describe the structure of cellular
communication.

Assessment Details (both CIE and SEE)

The weightage of Continuous Internal Evaluation (CIE) is 50% and for Semester End Exam (SEE) is 50%.
The minimum passing mark for the CIE is 40% of the maximum marks (20 marks out of 50). A student
shall be deemed to have satisfied the academic requirements and earned the credits allotted to each
subject/ course if the student secures not less than 35% (18 Marks out of 50) in the semester-end
examination (SEE), and a minimum of 40% (40 marks out of 100) in the sum total of the CIE (Continuous
Internal Evaluation) and SEE (Semester End Examination) taken together.

19.09.2023
03.10.2022

Continuous Internal Evaluation:

Three Unit Tests each of 20 Marks (duration 01 hour)
1. First test at the end of 5th week of the semester
2. Second test at the end of the 10th week of the semester
3. Third test at the end of the 15th week of the semester
Two assignments each of 10 Marks
4. First assignment at the end of 4th week of the semester
5. Second assignment at the end of 9th week of the semester
Group discussion/Seminar/quiz any one of three suitably planned to attain the COs and POs for 20
Marks (duration 01 hours)
6. At the end of the 13th week of the semester
The sum of three tests, two assignments, and quiz/seminar/group discussion will be out of 100 marks
and will be scaled down to 50 marks
(to have less stressed CIE, the portion of the syllabus should not be common /repeated for any of the
methods of the CIE. Each method of CIE should have a different syllabus portion of the course).
CIE methods /question paper is designed to attain the different levels of Bloom’s taxonomy as per
the outcome defined for the course.
Semester End Examination:
Theory SEE will be conducted by University as per the scheduled timetable, with common question
papers for the subject (duration 03 hours)
1. The question paper will have ten questions. Each question is set for 20 marks.
2. There will be 2 questions from each module. Each of the two questions under a module (with a
maximum of 3 sub-questions), should have a mix of topics under that module.
The students have to answer 5 full questions, selecting one full question from each module.. Marks scored
out of 100 shall be reduced proportionally to 50 marks
Suggested Learning Resources:
Books:
1. T L Singal, Analog and Digital Communications, McGraw Hill Education (India) Private Limited,
2012, 0-07-107269-1
2. T L Singal, Wireless Communications, McGraw Hill Education (India) Private Limited, 2016,
ISBN:0-07-068178-3.

19.09.2023
03.10.2022

VISVESVARAYA TECHNOLOGICAL UNIVERSITY, BELAGAVI

B.E: Electronics & Communication Engineering / B.E: Electronics & Telecommunication Engineering
NEP, Outcome Based Education (OBE) and Choice Based Credit System (CBCS)
(Effective from the academic year 2021 – 22)
VI Semester

Microcontrollers
Course Code 21EC652 CIE Marks 50
Teaching Hours/Week (L:T:P:S) 3:0:0:1 SEE Marks 50
Total Hours of Pedagogy 40 Total Marks 100
Credits 3 Exam Hours 3
Course objectives:
This course will enable students to:
• Understand the difference between a Microprocessor and a Microcontroller and embedded
microcontrollers.
• Familiarize the basic architecture of 8051 microcontroller.
• Program 8051microprocessor using Assembly Level Language and C.
• Understand the interrupt system of 8051 and the use of interrupts.
• Understand the operation and use of inbuilt Timers/Counters and Serial port of 8051.
• Interface 8051 to external memory and I/O devices using its I/O ports.
Teaching-Learning Process (General Instructions)
The sample strategies, which the teacher can use to accelerate the attainment of the various course
outcomes are listed in the following:
1. Lecture method (L) does not mean only the traditional lecture method, but a different type of
teaching method may be adopted to develop the outcomes.
2. Show Video/animation films to explain the functioning of various techniques.
3. Encourage collaborative (Group) Learning in the class
4. Ask at least three HOTS (Higher-order Thinking) questions in the class, which promotes critical
thinking
5. Adopt Problem Based Learning (PBL), which fosters students’ Analytical skills, develop thinking
skills such as the ability to evaluate, generalize, and analyze information rather than simply recall
it.
6. Show the different ways to solve the same problem and encourage the students to come up with
their own creative ways to solve them.
7. Discuss how every concept can be applied to the real world - and when that's possible, it helps
improve the students' understanding.
8. Give Programming Assignments.
Module-1
8051 Microcontroller: Microprocessor Vs Microcontroller, Embedded Systems, Embedded
Microcontrollers, 8051 Architecture- Registers, Pin diagram, I/O ports functions, Internal Memory
organization. External Memory (ROM & RAM) interfacing.
Text2 : Chapter 1 section 1.1 to 1.3, chapter 3 sections 3.1 to 3.3
Teaching-Learning Chalk and talk method, Simulation of modulation techniques
Process RBT Level: L1, L2, L3
Module-2
8051 Instruction Set: Addressing Modes, Data Transfer instructions, Arithmetic instructions, Logical
instructions, Bit manipulation instructions. Simple Assembly language program examples (without
loops) to use these instructions.
Text2 : Chapter 5 , chapter 6, chapter 7, chapter 8
Teaching-Learning Chalk and talk method/Power point presentation
Process RBT Level: L1, L2, L3

19.09.2023
03.10.2022

Module-3
8051 Jump and Call instructions & Embedded C
Jump and Call Instructions, Calls & Subroutine instructions. Assembly language program examples on
subroutine and involving loops. Text2 : chapter 8 section 8.1 to 8.4
8051 Programming in C: Data Types and Time delay in 8051 C, I/O programming in 8051 C, Logical
Operations in C. Text1 : chapter 7 section 7.1 to 7.3
Teaching-Learning Chalk and talk method
Process RBT Level: L1, L2, L3
Module-4
8051 Timers and Serial Port
8051 Timers and Counters – Operation and Assembly language programming to generate a pulse
using Mode-1 and a square wave using Mode- 2 on a port pin.
8051 Serial Communication- Basics of Serial Data Communication, RS- 232 standard, 9 pin RS232
signals, Simple Serial Port programming in Assembly and C to transmit a message and to receive data
serially.
Text1 : Chapter 9 section 9.1 Chapter 10 section 10.1 to 10.5
Teaching-Learning Chalk and talk method
Process RBT Level: L1, L2, L3
Module-5
8051 Interrupts and Interfacing Applications
8051 Interrupts. 8051 Assembly language programming to generate an external interrupt using a
switch, 8051 C programming to generate a square waveform on a port pin using a Timer interrupt.
Interfacing 8051 to ADC-0804, DAC, LCD and Stepper motor and their 8051 Assembly and C language
interfacing programming.
Text 1: Chapter 11 section 11.1 and 11.2 Chapter 13 section 13.1 to 13.2, chapter 12 section 12.1,
chapter 17 section 17.2
Teaching-Learning Chalk and talk method/Power point presentation
Process RBT Level: L1, L2, L3
Course outcome (Course Skill Set)
At the end of the course the student will be able to:
1. Explain the difference between Microprocessors & Microcontrollers, Architecture of 8051
Microcontroller, Interfacing of 8051 to external memory and Instruction set of 8051.
2. Develop 8051 Assembly level programs using 8051 instruction set.
3. Develop 8051 Assembly / C language program to generate timings and waveforms using 8051
timers, to send & receive serial data using 8051 serial port.
4. Develop 8051 Assembly / C language programs to generate square wave on 8051 I/O port pin
using interrupt and C Programme to send & receive serial data using 8051 serial port.
5. Interface various peripheral devices to 8051 using I/O ports.
Assessment Details (both CIE and SEE)
The weightage of Continuous Internal Evaluation (CIE) is 50% and for Semester End Exam (SEE) is 50%.
The minimum passing mark for the CIE is 40% of the maximum marks (20 marks out of 50). A student
shall be deemed to have satisfied the academic requirements and earned the credits allotted to each
subject/ course if the student secures not less than 35% (18 Marks out of 50) in the semester-end
examination (SEE), and a minimum of 40% (40 marks out of 100) in the sum total of the CIE (Continuous
Internal Evaluation) and SEE (Semester End Examination) taken together.
Continuous Internal Evaluation:
Three Unit Tests each of 20 Marks (duration 01 hour)
1. First test at the end of 5th week of the semester
2. Second test at the end of the 10th week of the semester

19.09.2023
03.10.2022

3. Third test at the end of the 15th week of the semester

Two assignments each of 10 Marks
4. First assignment at the end of 4th week of the semester
5. Second assignment at the end of 9th week of the semester
Group discussion/Seminar/quiz any one of three suitably planned to attain the COs and POs for 20
Marks (duration 01 hours)
6. At the end of the 13th week of the semester
The sum of three tests, two assignments, and quiz/seminar/group discussion will be out of 100 marks
and will be scaled down to 50 marks
(to have less stressed CIE, the portion of the syllabus should not be common /repeated for any of the
methods of the CIE. Each method of CIE should have a different syllabus portion of the course).
CIE methods /question paper is designed to attain the different levels of Bloom’s taxonomy as per
the outcome defined for the course.
Semester End Examination:
Theory SEE will be conducted by University as per the scheduled timetable, with common question
papers for the subject (duration 03 hours)
1. The question paper will have ten questions. Each question is set for 20 marks.
2. There will be 2 questions from each module. Each of the two questions under a module (with a
maximum of 3 sub-questions), should have a mix of topics under that module.
The students have to answer 5 full questions, selecting one full question from each module.. Marks scored
out of 100 shall be reduced proportionally to 50 marks
Suggested Learning Resources:
Text Books:
1. “The 8051 Microcontroller and Embedded Systems – using assembly and C”, Muhammad Ali Mazidi,
Janice Gillespie Mazidi and Rollin D McKinlay; PHI, 2006 / Pearson, 2006.
2. “The 8051 Microcontroller”, Kenneth J Ayala, 3rd Edition, Thomson/Cengage Learning.

Reference Books:
1. “The 8051 Microcontroller Based Embedded Systems”, Manish K Patel, McGraw Hill, 2014, ISBN:
978-93-329-0125-4.
2. “Microcontrollers: Architecture, Programming, Interfacing and System Design”, Raj Kamal, Pearson
Education, 2005.

19.09.2023
03.10.2022

VISVESVARAYA TECHNOLOGICAL UNIVERSITY, BELAGAVI

B.E: Electronics & Communication Engineering / B.E: Electronics & Telecommunication Engineering
NEP, Outcome Based Education (OBE) and Choice Based Credit System (CBCS)
(Effective from the academic year 2021 – 22)
VI Semester

Basic VLSI Design

Course Code 21EC653 CIE Marks 50
Teaching Hours/Week (L:T:P:S) 3:0:0:1 SEE Marks 50
Total Hours of Pedagogy 40 Total Marks 100
Credits 3 Exam Hours 3
Course objectives:
 Impart knowledge of MOS transistor theory and CMOS technologies
 Impart knowledge on architectural choices and performance trade-offs involved in designing and
realizing the circuits in CMOS technology
 Cultivate the concepts of subsystem design processes
 Demonstrate the concepts of CMOS testing
Teaching-Learning Process (General Instructions)
The sample strategies, which the teacher can use to accelerate the attainment of the various course
outcomes are listed in the following:
1. Lecture method (L) does not mean only the traditional lecture method, but a different type of
teaching method may be adopted to develop the outcomes.
2. Show Video/animation films to explain the functioning of various techniques.
3. Encourage collaborative (Group) Learning in the class
4. Ask at least three HOTS (Higher-order Thinking) questions in the class, which promotes critical
thinking
5. Adopt Problem Based Learning (PBL), which fosters students’ Analytical skills, develop thinking
skills such as the ability to evaluate, generalize, and analyze information rather than simply recall
it.
6. Show the different ways to solve the same problem and encourage the students to come up with
their own creative ways to solve them.
7. Discuss how every concept can be applied to the real world - and when that's possible, it helps
improve the students' understanding.
8. Incorporate programming examples given under Activity based learning.
Module-1
Introduction: A Brief History, MOS Transistors, MOS Transistor Theory, Ideal I-V Characteristics, Non-
ideal I-V Effects, DC Transfer Characteristics (1.1, 1.3, 2.1, 2.2, 2.4, 2.5 of TEXT2).
Fabrication: nMOS Fabrication, CMOS Fabrication [P-well process, N-well process, Twin tub process],
BiCMOS Technology (1.7, 1.8, 1.10 of TEXT1).
Teaching-Learning Chalk and talk method, YouTube videos, Power point presentation
Process RBT Level: L1, L2
Module-2
MOS and BiCMOS Circuit Design Processes: MOS Layers, Stick Diagrams, Design Rules and Layout.
Basic Circuit Concepts: Sheet Resistance, Area Capacitances of Layers, Standard Unit of Capacitance,
Some Area Capacitance Calculations, Delay Unit, Inverter Delays, Driving Large Capacitive Loads
(3.1 to 3.3, 4.1, 4.3 to 4.8 of TEXT1).
Teaching-Learning Chalk and talk method/Power point presentation
Process RBT Level: L1, L2, L3

19.09.2023
03.10.2022

Module-3
Scaling of MOS Circuits: Scaling Models & Scaling Factors for Device Parameters
Subsystem Design Processes: Some General considerations, An illustration of Design Processes,
Illustration of the Design Processes: Regularity, Design of an ALU Subsystem, The Manchester Carry-
chain and Adder Enhancement Techniques
(5.1, 5.2, 7.1, 7.2, 8.2, 8.3, 8.4.1, 8.4.2 of TEXT1).
Teaching-Learning Chalk and talk method, YouTube videos, Power point presentation
Process RBT Level: L1, L2, L3
Module-4
Subsystem Design: Some Architectural Issues, Switch Logic, Gate (restoring) Logic, Parity Generators,
Multiplexers, The Programmable Logic Array (PLA)
(6.1 to 6.3, 6.4.1, 6.4.3, 6.4.6 of TEXT1).
FPGA Based Systems: Introduction, Basic concepts, Digital design and FPGAs, FPGA based System
design, FPGA architecture, Physical design for FPGAs (1.1 to 1.4, 3.2, 4.8 of TEXT3).
Teaching-Learning Chalk and talk method, YouTube videos, Power point presentation
Process RBT Level: L1, L2, L3
Module-5
Memory, Registers and Aspects of system Timing: System Timing Considerations, Some commonly
used Storage/Memory elements (9.1, 9.2 of TEXT1).
Testing and Verification: Introduction, Logic Verification, Logic Verification Principles,
Manufacturing Test Principles, Design for testability (12.1, 12.1.1, 12.3, 12.5, 12.6 of TEXT 2).
Teaching-Learning Chalk and talk method/Power point presentation
Process RBT Level: L1, L2, L3
Course outcome (Course Skill Set)
At the end of the course the student will be able to:
1. Demonstrate understanding of MOS transistor theory, CMOS fabrication flow and technology
scaling.
2. Draw the basic gates using the stick and layout diagrams with the knowledge of physical design
aspects.
3. Interpret Memory elements along with timing considerations
4. Demonstrate knowledge of FPGA based system design
5. Interpret testing and testability issues in VLSI Design
6. Analyze CMOS subsystems and architectural issues with the design constraints.
Assessment Details (both CIE and SEE)
The weightage of Continuous Internal Evaluation (CIE) is 50% and for Semester End Exam (SEE) is 50%.
The minimum passing mark for the CIE is 40% of the maximum marks (20 marks out of 50). A student
shall be deemed to have satisfied the academic requirements and earned the credits allotted to each
subject/ course if the student secures not less than 35% (18 Marks out of 50) in the semester-end
examination (SEE), and a minimum of 40% (40 marks out of 100) in the sum total of the CIE (Continuous
Internal Evaluation) and SEE (Semester End Examination) taken together.
Continuous Internal Evaluation:
Three Unit Tests each of 20 Marks (duration 01 hour)
1. First test at the end of 5th week of the semester
2. Second test at the end of the 10th week of the semester
3. Third test at the end of the 15th week of the semester
Two assignments each of 10 Marks
4. First assignment at the end of 4th week of the semester
5. Second assignment at the end of 9th week of the semester

19.09.2023
03.10.2022

Group discussion/Seminar/quiz any one of three suitably planned to attain the COs and POs for 20
Marks (duration 01 hours)
6. At the end of the 13th week of the semester
The sum of three tests, two assignments, and quiz/seminar/group discussion will be out of 100 marks
and will be scaled down to 50 marks
(to have less stressed CIE, the portion of the syllabus should not be common /repeated for any of the
methods of the CIE. Each method of CIE should have a different syllabus portion of the course).
CIE methods /question paper is designed to attain the different levels of Bloom’s taxonomy as per
the outcome defined for the course.
Semester End Examination:
Theory SEE will be conducted by University as per the scheduled timetable, with common question
papers for the subject (duration 03 hours)
1. The question paper will have ten questions. Each question is set for 20 marks.
2. There will be 2 questions from each module. Each of the two questions under a module (with a
maximum of 3 sub-questions), should have a mix of topics under that module.
The students have to answer 5 full questions, selecting one full question from each module.. Marks scored
out of 100 shall be reduced proportionally to 50 marks
Suggested Learning Resources:
Text Books:
1. “Basic VLSI Design”- Douglas A Pucknell & Kamran Eshraghian, PHI, 3rd Edition.
2. “CMOS VLSI Design- A Circuits and Systems Perspective”, Neil H E Weste, David Harris, Ayan
Banerjee, 3rd Edition, Pearson Education.
3. “FPGA Based System Design”, Wayne Wolf, Pearson Education, 2004, Technology and Engineering.

Web links and Video Lectures (e-Resources)

 https://nptel.ac.in/courses/117101058
 https://nptel.ac.in/courses/117106093
 https://youtu.be/9SnR3M3CIm4
 https://nptel.ac.in/courses/108/107/108107129/
Activity Based Learning (Suggested Activities in Class)/ Practical Based learning
Wherever necessary Cadence/Synopsis/Menta Graphics tools must be used.
1.Write Verilog Code for the following circuits and their Test Bench for verification, observe the
waveform and synthesize the code with technological library with given Constraints*. Do the initial
timing verification with gate level simulation.
i. An inverter
ii. A Buffer
iii. Transmission Gate
iv. Basic/universal gates
v. Flip flop -RS, D, JK, MS, T
vi. Serial & Parallel adder
vii. 4-bit counter [Synchronous and Asynchronous counter]
2. Design an op-amp with given specification* using given differential amplifier Common source and
Common Drain amplifier in library** and completing the design flow mentioned below:
a. Draw the schematic and verify the following
i) DC Analysis
ii) AC Analysis
iii) Transient Analysis
b. Draw the Layout and verify the DRC, ERC
c. Check for LVS
d. Extract RC and back annotate the same and verify the Design.

19.09.2023
03.10.2022

19.09.2023
03.10.2022

VISVESVARAYA TECHNOLOGICAL UNIVERSITY, BELAGAVI

B.E: Electronics & Communication Engineering / B.E: Electronics & Telecommunication Engineering
NEP, Outcome Based Education (OBE) and Choice Based Credit System (CBCS)
(Effective from the academic year 2021 – 22)
VI Semester

Electronic Circuits with Verilog

Course Code 21EC654 CIE Marks 50
Teaching Hours/Week (L:T:P:S) 2:0:2:0 SEE Marks 50
Total Hours of Pedagogy 40 Total Marks 100
Credits 3 Exam Hours 3
Course objectives:
 To understand the basic Verilog HDL design flow.
 To understand the basic Verilog programming concepts.
 To describe the simple logic circuits using dataflow, gate-level, and behavioural level modelling.
 To model digital systems using advanced concepts of Verilog HDL.
Teaching-Learning Process (General Instructions)
The sample strategies, which the teacher can use to accelerate the attainment of the various course
outcomes are listed in the following:
1. Lecture method (L) does not mean only the traditional lecture method, but a different type of
teaching method may be adopted to develop the outcomes.
2. Show Video/animation films to explain the functioning of various techniques.
3. Encourage collaborative (Group) Learning in the class
4. Ask at least three HOTS (Higher-order Thinking) questions in the class, which promotes critical
thinking
5. Adopt Problem Based Learning (PBL), which fosters students’ Analytical skills, develop thinking
skills such as the ability to evaluate, generalize, and analyze information rather than simply recall
it.
6. Show the different ways to solve the same problem and encourage the students to come up with
their own creative ways to solve them.
7. Discuss how every concept can be applied to the real world - and when that's possible, it helps
improve the students' understanding.
8. Give programming assignments.
Module-1
Overview of Digital Design with Verilog HDL: Evolution of CAD, emergence of HDLs, typical HDL-
flow, why Verilog HDL?, trends in HDLs. (Text 1)
Hierarchical Modeling Concepts: Top-down and bottom-up design methodology, differences
between modules and module instances, parts of a simulation, design block, stimulus block. (Text 1)
Teaching-Learning Chalk and talk method, Power point presentation
Process RBT Level: L1, L2, L3
Module-2
Basic Concepts: Lexical conventions, datatypes, system tasks, compiler directives. (Text 1)
Modules and Ports: Module definition, port declaration, connecting ports, hierarchical name
referencing. (Text 1)
Teaching-Learning Chalk and talk method, Power point presentation
Process RBT Level: L1, L2, L3
Module-3
Gate-Level Modeling: Modeling using basic Verilog gate primitives, description of and/or and buf/not
type gates, rise, fall and turn-off delays, min, max, and typical delays. (Text1)
Dataflow Modeling: Continuous assignments, delay specification, expressions, operators, operands,
operator types. (Text 1)

19.09.2023
03.10.2022

Teaching-Learning Chalk and talk method, Power point presentation

Process RBT Level: L1, L2, L3
Module-4
Behavioral Description: Behavioral Description Highlights, Structure of the HDL Behavioral
Description, Sequential Statements, IF Statement, The case Statement , Verilog casex and casez The
wait-for Statement. The Loop Statement, For-Loop, While-Loop, Verilog repeat, Verilog forever
(content with respect to Verilog only) (Text 2)
Teaching-Learning Chalk and talk method, Power point presentation
Process RBT Level: L1, L2, L3
Module-5
Structural Description: Highlights of Structural Description, Organization of Structural Description
Binding (4.1, 4.2, 4.3 till example 4.9) (Text 2)
Tasks and Functions: Differences between tasks and functions, declaration, invocation, automatic
tasks and functions. (Text 1)
Teaching-Learning Chalk and talk method, Power point presentation
Process RBT Level: L1, L2, L3
Course outcomes (Course Skill Set)
At the end of the course the student will be able to:
1. Under the Verilog HDL design flow.
2. Describe the basic concepts of Verilog HDL programming.
3. Design of digital electronics circuits using dataflow, behavioural, gate-level, and structural
modelling.
4. Design complex digital circuits using advanced Verilog concepts.
Assessment Details (both CIE and SEE)
The weightage of Continuous Internal Evaluation (CIE) is 50% and for Semester End Exam (SEE) is 50%.
The minimum passing mark for the CIE is 40% of the maximum marks (20 marks out of 50). A student
shall be deemed to have satisfied the academic requirements and earned the credits allotted to each
subject/ course if the student secures not less than 35% (18 Marks out of 50) in the semester-end
examination (SEE), and a minimum of 40% (40 marks out of 100) in the sum total of the CIE (Continuous
Internal Evaluation) and SEE (Semester End Examination) taken together.

Continuous Internal Evaluation:

Three Unit Tests each of 20 Marks (duration 01 hour)
1. First test at the end of 5th week of the semester
2. Second test at the end of the 10th week of the semester
3. Third test at the end of the 15th week of the semester
Two assignments each of 10 Marks
4. First assignment at the end of 4th week of the semester
5. Second assignment at the end of 9th week of the semester
Group discussion/Seminar/quiz any one of three suitably planned to attain the COs and POs for 20
Marks (duration 01 hours)
6. At the end of the 13th week of the semester
The sum of three tests, two assignments, and quiz/seminar/group discussion will be out of 100 marks
and will be scaled down to 50 marks
(to have less stressed CIE, the portion of the syllabus should not be common /repeated for any of the
methods of the CIE. Each method of CIE should have a different syllabus portion of the course).
CIE methods /question paper is designed to attain the different levels of Bloom’s taxonomy as per
the outcome defined for the course.
Semester End Examination:

19.09.2023
03.10.2022

Theory SEE will be conducted by University as per the scheduled timetable, with common question
papers for the subject (duration 03 hours)
1. The question paper will have ten questions. Each question is set for 20 marks.
2. There will be 2 questions from each module. Each of the two questions under a module (with a
maximum of 3 sub-questions), should have a mix of topics under that module.
The students have to answer 5 full questions, selecting one full question from each module.. Marks scored
out of 100 shall be reduced proportionally to 50 marks

Suggested Learning Resources:

Text Books:
1. “Verilog HDL: A Guide to Digital Design and Synthesis”, Samir Palnitkar, Pearson education, Second
edition.
2. “HDL programming (VHDL and Verilog)”, Nazeih M Botros, John Wiley India Pvt. Ltd., 2008.

19.09.2023
03.10.2022

VISVESVARAYA TECHNOLOGICAL UNIVERSITY, BELAGAVI

B.E: Electronics & Communication Engineering / B.E: Electronics & Telecommunication Engineering
NEP, Outcome Based Education (OBE) and Choice Based Credit System (CBCS)
(Effective from the academic year 2021 – 22)
VI Semester

Sensors & Actuators

Course Code 21EC655 CIE Marks 50
Teaching Hours/Week (L:T:P:S) 3:0:0:0 SEE Marks 50
Total Hours of Pedagogy 40 Total Marks 100
Credits 3 Exam Hours 3
Course objectives:
 To provide the fundamental knowledge about sensors and measurement system.
 To impart the knowledge of static and dynamic characteristics of instruments and understand the
factors in selection of instruments for measurement.
 To discuss the principle, design and working of transducers for the measurement of physical time
varying quantities.
 Understand the working of various actuators suitable in industrial process control systems.
 Understand the principle and application of smart sensors.

Teaching-Learning Process (General Instructions)

These are sample Strategies, which teacher can use to accelerate the attainment of the various course
outcomes.
1. Explain the fundamental concepts required for the module in the introduction phase for the
module.
2. Conducting quiz after completion of every module in class and evaluate.
3. Asking questions about completed previous topic, will aid to assess the student understanding.
4. Evaluate the internals answer booklet by correcting the mistakes if any.
5. Modules revision at the end as well use practical lab sessions and demonstrate the concepts if
applicable and feasible.

Module-1
Sensors and measurement system: Sensors and transducers, Classifications of transducers-primary &
secondary, active & passive, analog and digital transducers. Smart sensors.
Measurement: Definition, significance of measurement, instruments and measurement systems.
mechanical, electrical and electronic instruments. Elements of generalized measurement system with
example. Input-output configuration of measuring instruments and measurement systems, methods of
correction for interfering and modifying inputs.

Teaching- Chalk and talk method, PowerPoint Presentation, More examples relating to applications
Learning RBT Level: L1, L2, L3
Process
Module-2
Static and Dynamic Characteristics: Static calibration and error calibration curve, accuracy and
precision, indications of precision, static error, scale range and scale span, reproducibility and drift,
repeatability, signal to noise ratio, sensitivity, linearity, hysteresis, threshold, dead zone and dead time,
resolution, signal to noise ratio, factors influencing the choice of transducers/instruments.
Dynamic response – Dynamic characteristics, Transfer function of generalized first order system, time
constant. Transfer function of generalized second order system, natural frequency and Damping ratio.

Teaching- Chalk and talk method, Power point presentation, VI Lab to demonstrate the characteristics
Learning of sensors, More examples relating to applications
Process RBT Level: L1, L2, L3

19.09.2023
03.10.2022

Module-3
Measurement of Temperature: RTD, Thermistor, Thermocouple, laws of thermocouple, Thermopile,
AD590.
Measurement of Displacement: Introduction, Principles of Transduction, Variable resistance devices,
variable Inductance Transducer, Variable Capacitance Transducer, Hall Effect Devices, Proximity Devices,
Digital Transducer.
Teaching- Chalk and talk method, PowerPoint Presentation, Virtual instrumentation Lab to
Learning demonstrate the characteristics of sensors
Process RBT Level: L1, L2, L3
Module-4
Measurement of Strain: Introduction, Types of Strain Gauges, Theory of operation of resistance strain
gauges, Types of Electrical Strain Gauges –Wire gauges, unbounded strain gauges, foil gauges,
semiconductor strain gauges (principle, types & list of characteristics only), Strain gauge Circuits –
Wheatstone bride circuit, Applications.
Measurement of Force & Torque: Introduction, Force measuring sensor –Load cells – column types
devices, proving rings, cantilever beam, pressductor. Hydraulic load cell, electronic weighing system.
Torque measurement: Absorption type, transmission type, stress type & deflection type.
Teaching- Chalk and talk method, PowerPoint Presentation,
Learning More examples relating to applications
Process RBT Level: L1, L2, L3
Module-5
Actuators and process control system: Introduction. Block diagram and description of process control
system with an example. Introduction, Block diagram of Final control operation, Signal conversions
analog, digital, pneumatic signal. Actuators, Control elements.
Electrical actuating systems: Solid-state switches, Solenoids, Electric Motors- Principle of operation
and its application: D.C motors, AC motors, Synchronous Motor, Stepper motors.
Pneumatic Actuators: Principle and working of pneumatic actuators. (Numerical problems on the
topic).
Hydraulic Actuators: Principle and working of Hydraulic actuators. (Numerical problems on the topic).
Teaching- Chalk and talk method, Power point presentation
Learning More examples relating to applications
Process RBT Level: L1, L2, L3
Course outcome (Course Skill Set)
At the end of the course the student will be able to:
1. Discuss the fundamental concepts related to sensors and measurement, functional elements of
measurement system, I/O Characteristics of measurement system.
2. Interpret and analyse the static and dynamic characteristics of instruments.
3. Elucidate the working principle and usage of different transducers for temperature, displacement
and level measurement.
4. Discuss the principle and working of different types of actuators used in industrial application.
5. Discuss the principle and working of strain, force and torque measurement.

Assessment Details (both CIE and SEE)

The weightage of Continuous Internal Evaluation (CIE) is 50% and for Semester End Exam (SEE) is 50%.
The minimum passing mark for the CIE is 40% of the maximum marks (20 marks out of 50). A student
shall be deemed to have satisfied the academic requirements and earned the credits allotted to each
subject/ course if the student secures not less than 35% (18 Marks out of 50) in the semester-end
examination (SEE), and a minimum of 40% (40 marks out of 100) in the sum total of the CIE (Continuous
Internal Evaluation) and SEE (Semester End Examination) taken together.

19.09.2023
03.10.2022

Continuous Internal Evaluation:

Three Unit Tests each of 20 Marks (duration 01 hour)
1. First test at the end of 5th week of the semester
2. Second test at the end of the 10th week of the semester
3. Third test at the end of the 15th week of the semester
Two assignments each of 10 Marks
4. First assignment at the end of 4th week of the semester
5. Second assignment at the end of 9th week of the semester
Group discussion/Seminar/quiz any one of three suitably planned to attain the COs and POs for 20
Marks (duration 01 hours)
6. At the end of the 13th week of the semester
The sum of three tests, two assignments, and quiz/seminar/group discussion will be out of 100 marks
and will be scaled down to 50 marks
(to have less stressed CIE, the portion of the syllabus should not be common /repeated for any of the
methods of the CIE. Each method of CIE should have a different syllabus portion of the course).
CIE methods /question paper is designed to attain the different levels of Bloom’s taxonomy as per
the outcome defined for the course.
Semester End Examination:
Theory SEE will be conducted by University as per the scheduled timetable, with common question
papers for the subject (duration 03 hours)
1. The question paper will have ten questions. Each question is set for 20 marks.
2. There will be 2 questions from each module. Each of the two questions under a module (with a
maximum of 3 sub-questions), should have a mix of topics under that module.
The students have to answer 5 full questions, selecting one full question from each module. Marks scored
out of 100 shall be reduced proportionally to 50 marks

Suggested Learning Resources:

Text Books:
1. Electrical and Electronic Measurements and Instrumentation, A K Sawhney, 17th Edition, (Reprint
2004), Dhanpat Rai & Co. Pvt. Ltd., 2004.
2. Instrumentation: Devices and Systems, C S Rangan, G R Sarma, V S V Mani, 2nd Edition (32 Reprint),
McGraw Hill Education (India), 2014.
3. Process Control Instrumentation Technology by C D Johnson, 7 th Edition, Pearson Education Private
Limited, New Delhi 2002.

19.09.2023
VISVESVARAYA TECHNOLOGICAL UNIVERSITY, BELAGAVI
B.E: Electronics & Communication Engineering / B.E: Electronics & Telecommunication Engineering
NEP, Outcome Based Education (OBE) and Choice Based Credit System (CBCS)
(Effective from the academic year 2021 – 22)
VI Semester

Artificial Neural Networks

Course Code 21EC641 CIE Marks 50
Teaching Hours/Week (L:T:P:S) 2:2:0:0 SEE Marks 50
Total Hours of Pedagogy 40 Total Marks 100
Credits 3 Exam Hours 3
Course objectives:
 Preparation: To prepare students with fundamental knowledge and comprehensive understanding
of artificial neural networks.
 Core Competence: To equip students to develop and configure ANNs with different types of
learning algorithms for real world problems.
 Professionalism & Learning Environment: To inculcate an engineering student an ethical and
professional attitude by providing an academic environment inclusive of effective communication,
teamwork, ability to relate engineering issues to a broader social context, and life-long learning
needed for a successful professional career.
Teaching-Learning Process (General Instructions)
The sample strategies, which the teacher can use to accelerate the attainment of the various course
outcomes are listed in the following:
1. Lecture method (L) does not mean only the traditional lecture method, but a different type of
teaching method may be adopted to develop the outcomes.
2. Show Video/animation films to explain the functioning of various learning algorithms.
3. Encourage collaborative (Group) Learning in the class.
4. Ask at least three HOTS (Higher-order Thinking) questions in the class, which promotes critical
thinking.
5. Show the different ways to solve the same problem and encourage the students to come up with
their own creative ways to solve them.
6. Discuss how every concept can be applied to the real world - and when that's possible, it helps
improve the students' understanding.

Module-1
Introduction: Neural Networks, Application Scope of Neural Networks.
Artificial Neural Network: An Introduction. - Fundamental Concept, Evolution of Neural Networks,
Basic models of Artificial Neural Networks (ANN), Important Technologies of ANNs, McCulloch-Pitts
Neuron, Linear Separability.
Text 1: 1,1.1,1.2,2.1,2.2,2.3,2.4,2.5,2.6.
Teaching- Chalk and talk method, PowerPoint Presentation, YouTube videos, Animation of basic
Learning model of a neuron in comparison of biological neuron.
Process RBT Level: L1, L2, L3
Module-2
Hebb Network and simple problems
Supervised Learning Network – Introduction –Perceptron Networks-Theory, Perceptron learning
rule, architecture, flowchart for training Process, Perceptron training algorithm for single output
classes, Perceptron training algorithm for Multiple output classes, Perceptron Network Testing
Algorithm, Adaptive Linear Neuron- Theory, Delta rule, Architecture, flowchart, Training, Testing
algorithm (Adaline), Multiple Adaptive Linear Neurons -Theory, Architecture, Flowchart, Training
algorithm.
Text 1: 2.7,2.9,3.1,3.2,3.3,3.4.
Teaching- Chalk and talk method, PowerPoint Presentation, YouTube videos, Animation of

19.09.2023
Learning supervised learning algorithms. Problems on Hebb network
Process RBT Level: L1, L2, L3
Module-3
Back–Propagation Network - Theory, Architecture, Flowchart for training process, Training
Algorithm, Learning Factors of Back-Propagation Network, Testing Algorithm of Back-Propagation
Network. Radial Basis Function Network, Time Delay Neural Network, Functional Link Networks.
Text 1: 3.5,3.6,3.7,3.8.
Teaching- Chalk and talk method, Power Point Presentation, YouTube videos
Learning Self-study topics: Architecture, Flowchart, Training and Testing algorithm.
Process RBT Level: L1, L2, L3
Module-4
Associative Memory Network – Introduction, Training algorithm for Pattern association- Hebb Rule.
Associative Memory Network - Theory, Architecture, Flowchart, Training algorithm, Testing Algorithm,
Heteroassociative Memory Network- Theory, architecture, Testing algorithm, Hopfield Networks –
Discrete Hopfield Network – architecture, Training algorithm, Testing algorithm of Discrete Hopfield
Network.
Text 1: 4.1,4.2,4.3,4.4,4.6.
Teaching- Chalk and talk method, Power Point Presentation, YouTube videos
Learning Self-study topics: Architecture, Flowchart, Training and Testing algorithm.
Process RBT Level: L1, L2, L3
Module-5
Unsupervised Learning Networks – Introduction, Fixed weight competitive nets – Maxnets,
Architecture, Testing/application algorithm of Maxnet. Mexican Hat Net- Architecture, Flowchart,
algorithm, Kohonen Self organizing Feature Maps – Theory, architecture. Learning Vector quantization –
Theory, Architecture.
Text 1: 5.1,5.2-5.2.1,5.2.2,5.3- 5.3.1,5.3.2,5.4- 5.4.1,5.4.2.
Teaching- Chalk and talk method, Power Point Presentation, YouTube videos
Learning Self-study topics: Architecture, Flowchart, Training and Testing algorithm.
Process RBT Level: L1, L2, L3
Course outcome (Course Skill Set)
At the end of the course the student will be able to:
1. Compare and contrast the biological neural network and ANN.
2. Discuss the ANN for pattern classification.
3. Develop and configure ANN’s with different types of functions and learning algorithms.
4. Apply ANN for real world problems.
Assessment Details (both CIE and SEE)
The weightage of Continuous Internal Evaluation (CIE) is 50% and for Semester End Exam (SEE) is 50%.
The minimum passing mark for the CIE is 40% of the maximum marks (20 marks out of 50). A student
shall be deemed to have satisfied the academic requirements and earned the credits allotted to each
subject/ course if the student secures not less than 35% (18 Marks out of 50) in the semester-end
examination (SEE), and a minimum of 40% (40 marks out of 100) in the sum total of the CIE (Continuous
Internal Evaluation) and SEE (Semester End Examination) taken together.
Continuous Internal Evaluation:
Three Unit Tests each of 20 Marks (duration 01 hour)
1. First test at the end of 5th week of the semester
2. Second test at the end of the 10th week of the semester
3. Third test at the end of the 15th week of the semester
Two assignments each of 10 Marks
4. First assignment at the end of 4th week of the semester

19.09.2023
5. Second assignment at the end of 9th week of the semester
Group discussion/Seminar/quiz any one of three suitably planned to attain the COs and POs for 20
Marks (duration 01 hours)
6. At the end of the 13th week of the semester
The sum of three tests, two assignments, and quiz/seminar/group discussion will be out of 100 marks
and will be scaled down to 50 marks
(to have less stressed CIE, the portion of the syllabus should not be common /repeated for any of the
methods of the CIE. Each method of CIE should have a different syllabus portion of the course).
CIE methods /question paper is designed to attain the different levels of Bloom’s taxonomy as per
the outcome defined for the course.
Semester End Examination:
Theory SEE will be conducted by University as per the scheduled timetable, with common question
papers for the subject (duration 03 hours)
1. The question paper will have ten questions. Each question is set for 20 marks.
2. There will be 2 questions from each module. Each of the two questions under a module (with a
maximum of 3 sub-questions), should have a mix of topics under that module.
The students have to answer 5 full questions, selecting one full question from each module.. Marks scored
out of 100 shall be reduced proportionally to 50 marks

Suggested Learning Resources:

Text Book:
S N Sivanandam and S N Deepa, “Principles of Soft Computing”, 2nd Edition, Wiley India Pvt. Ltd., 2014.
Reference Book:
Simon Haykin, “Neural Networks: A comprehensive foundation”, 2nd Edition, PHI, 1998.

19.09.2023
03.10.2022

VI Semester
Cryptography
Course Code 21EC642 CIE Marks 50
Teaching Hours/Week (L:T:P:S) 2:2:0:0 SEE Marks 50
Total Hours of Pedagogy 40 Total Marks 100
Credits 3 Exam Hours 3
Course objectives:
This course will enable students to:
 Preparation: To prepare students with fundamental knowledge/ overview in the field of Information
Security with knowledge of mathematical concepts required for cryptography.
 Core Competence: To equip students with a basic foundation of Cryptography by delivering the
basics of symmetric key and public key cryptography and design of pseudo random sequence
generation technique
Teaching-Learning Process (General Instructions)
The sample strategies, which the teacher can use to accelerate the attainment of the various course
outcomes are listed in the following:
1. Lecture method (L) does not mean only the traditional lecture method, but a different type of
teaching method may be adopted to develop the outcomes.
2. Show Video/animation films to explain the different Cryptographic Techniques / Algorithms
3. Encourage collaborative (Group) Learning in the class
4. Ask at least three HOTS (Higher order Thinking) questions in the class, which promotes critical
thinking
5. Adopt Problem Based Learning (PBL), which fosters students’ Analytical skills, develop thinking
skills such as the ability to evaluate, generalize, and analyze information rather than simply recall
it.
6. Topics will be introduced in a multiple representation.
7. Show the different ways to solve the same problem and encourage the students to come up with
their own creative ways to solve them.
8. Discuss how every concept can be applied to the real world - and when that's possible, it helps
improve the students' understanding.
9. Adopt Flipped class technique by sharing the materials / Sample Videos prior to the class and have
discussions on the that topic in the succeeding classes
10. Give Programming Assignments
Module-1
Basic Concepts of Number Theory and Finite Fields: Divisibility and The Division Algorithm
Euclidean algorithm, Modular arithmetic, Groups, Rings and Fields, Finite fields of the form GF(p),
Polynomial Arithmetic, Finite Fields of the Form GF(2m) (Text 1: Chapter 3)
Teaching- Chalk and Talk, YouTube videos, Flipped Class Technique
Learning Programming on implementation of Euclidean algorithm, multiplicative inverse, Finite
Process fields of the form GF(p), construction of finite field over GF(2 m).
RBT Level: L1, L2, L3
Module-2
Introduction: Computer Security Concepts, A Model for Network Security (Text 1: Chapter 1)
Classical Encryption Techniques: Symmetric cipher model, Substitution techniques, Transposition
techniques (Text 1: Chapter 1)
Teaching- Chalk and Talk, YouTube videos, Flipped Class Technique and PPTs.
Learning Programming on Substitution and Transposition techniques.
Process Self-study topics: Security Mechanisms, Services and Attacks.
RBT Level: L1, L2, L3
Module-3

19.09.2023
03.10.2022

Block Ciphers: Traditional Block Cipher structure, Data encryption standard (DES) (Text 1: Chapter 2:
Section1, 2) The AES Cipher. (Text 1: Chapter 4: Section 2, 3, 4)
More on Number Theory: Prime Numbers, Fermat’s and Euler’s theorem, discrete logarithm. (Text 1:
Chapter 7: Section 1, 2, 5)
Teaching- Chalk and Talk, YouTube videos, Flipped Class Technique and PPTs.
Learning Implementation of SDES using programming languages like C++/Python/Java/Scilab.
Process Self-study topics: DES S-Box- Linear and differential attacks
RBT Level: L1, L2, L3
Module-4
ASYMMETRIC CIPHERS: Principles of Public-Key Cryptosystems, The RSA algorithm, Diffie - Hellman
Key Exchange, Elliptic Curve Arithmetic, Elliptic Curve Cryptography (Text 1: Chapter 8, Chapter 9:
Section 1, 3, 4)
Teaching- Chalk and Talk, YouTube videos, Flipped Class Technique and PPTs.
Learning Implementation of Asymmetric key algorithms using programming languages like
Process C++/Python/Java/Scilab
Numerical examples on Elliptic Curve Cryptography
RBT Level: L1, L2, L3
Module-5
Pseudo-Random-Sequence Generators and Stream Ciphers:
Linear Congruential Generators, Linear Feedback Shift Registers, Design and analysis of stream
ciphers, Stream ciphers using LFSRs, A5, Hughes XPD/KPD, Nanoteq, Rambutan, Additive generators,
Gifford, Algorithm M, PKZIP (Text 2: Chapter 16)
Teaching- Chalk and Talk, YouTube videos, Flipped Class Technique and PPTs.
Learning Implementation of simple stream ciphers using programming languages like
Process C++/Python/Java/Scilab.
RBT Level: L1, L2, L3
Course outcomes (Course Skill Set)
At the end of the course the student will be able to:
1. Explain traditional cryptographic algorithms of encryption and decryption process.
2. Use symmetric and asymmetric cryptography algorithms to encrypt and decrypt the data.
3. Apply concepts of modern algebra in cryptography algorithms.
4. Design pseudo random sequence generation algorithms for stream cipher systems.

Assessment Details (both CIE and SEE)

The weightage of Continuous Internal Evaluation (CIE) is 50% and for Semester End Exam (SEE) is 50%.
The minimum passing mark for the CIE is 40% of the maximum marks (20 marks out of 50). A student
shall be deemed to have satisfied the academic requirements and earned the credits allotted to each
subject/ course if the student secures not less than 35% (18 Marks out of 50) in the semester-end
examination (SEE), and a minimum of 40% (40 marks out of 100) in the sum total of the CIE (Continuous
Internal Evaluation) and SEE (Semester End Examination) taken together.

Continuous Internal Evaluation:

Three Unit Tests each of 20 Marks (duration 01 hour)
1. First test at the end of 5th week of the semester
2. Second test at the end of the 10th week of the semester
3. Third test at the end of the 15th week of the semester
Two assignments each of 10 Marks
4. First assignment at the end of 4th week of the semester
5. Second assignment at the end of 9th week of the semester
Group discussion/Seminar/quiz any one of three suitably planned to attain the COs and POs for 20
Marks (duration 01 hours)
6. At the end of the 13th week of the semester

19.09.2023
03.10.2022

The sum of three tests, two assignments, and quiz/seminar/group discussion will be out of 100 marks
and will be scaled down to 50 marks
(to have less stressed CIE, the portion of the syllabus should not be common /repeated for any of the
methods of the CIE. Each method of CIE should have a different syllabus portion of the course).
CIE methods /question paper is designed to attain the different levels of Bloom’s taxonomy as per
the outcome defined for the course.
Semester End Examination:
Theory SEE will be conducted by University as per the scheduled timetable, with common question
papers for the subject (duration 03 hours)
1. The question paper will have ten questions. Each question is set for 20 marks.
2. There will be 2 questions from each module. Each of the two questions under a module (with a
maximum of 3 sub-questions), should have a mix of topics under that module.
The students have to answer 5 full questions, selecting one full question from each module.. Marks scored
out of 100 shall be reduced proportionally to 50 marks

Suggested Learning Resources:

Text Books:
1. William Stallings , “Cryptography and Network Security Principles and Practice”, Pearson Education
Inc., 6th Edition, 2014, ISBN: 978-93-325-1877-3
2. Bruce Schneier, “Applied Cryptography Protocols, Algorithms, and Source code in C”, Wiley
Publications, 2nd Edition, ISBN: 9971-51-348-X.

Reference Books:
1. Cryptography and Network Security, Behrouz A Forouzan, TMH, 2007.
2. Cryptography and Network Security, Atul Kahate, TMH, 2003.
Web links and Video Lectures (e-Resources)
 https://nptel.ac.in/courses/106105031
Activity Based Learning (Suggested Activities in Class)/ Practical Based learning
 Programming Assignments / Mini Projects can be given to improve programming skills

19.09.2023
03.10.2022

VISVESVARAYA TECHNOLOGICAL UNIVERSITY, BELAGAVI

B.E: Electronics & Communication Engineering / B.E: Electronics & Telecommunication Engineering
NEP, Outcome Based Education (OBE) and Choice Based Credit System (CBCS)
(Effective from the academic year 2021 – 22)
VI Semester

Python Programming
Course Code 21EC643 CIE Marks 50
Teaching Hours/Week (L:T:P:S) 2:0:2:0 SEE Marks 50
Total Hours of Pedagogy 40 Total Marks 100
Credits 3 Exam Hours 3
Course objectives:
 To learn programming using Python
 Develop application using Python

Teaching-Learning Process (General Instructions)

The sample strategies, which the teacher can use to accelerate the attainment of the various course
outcomes are listed in the following:
1. In addition to the traditional lecture method, different types of innovative teaching methods may
be adopted so that the delivered lessons shall develop student’s theoretical and programming
skills.
2. State the need for learning Programming with real-life examples.
3. Support and guide the students for self–study.
4. You will also be responsible for assigning homework, grading assignments and quizzes, and
documenting students’ progress
5. Encourage the students for group learning to improve their creative and analytical skills.
6. Show short, related video lectures in the following ways:
 As an introduction to new topics (pre-lecture activity).
 As a revision of topics (post-lecture activity).
 As additional examples (post-lecture activity).
 As an additional material of challenging topics (pre-and post-lecture activity).
 As a model solution of some exercises (post-lecture activity).
Module-1
Python Basics, Python language features, History , Entering Expressions into the Interactive Shell, The
Integer, Floating-Point, and String Data Types, String Concatenation and Replication, Storing Values in
Variables, Your First Program, Dissecting Your Program, Flow control, Boolean Values, Comparison
Operators, Boolean Operators, Mixing Boolean and Comparison Operators, Elements of Flow Control,
Program Execution, Flow Control Statements, Importing Modules, Ending a Program Early with
sys.exit(), Functions, def Statements with Parameters, Return Values and return Statements, The None
Value, Keyword Arguments and print(), Local and Global Scope, The global Statement, Exception
Handling, A Short Program: Guess the Number
Textbook 1: Chapters 1 – 3
Teaching-Learning Chalk and talk method, Simulation of modulation techniques
Process RBT Level: L1, L2, L3
Module-2
Data Structures: Lists: The List Data Type, Working with Lists Strings: Manipulating Strings, Working
with Strings, Useful String Methods Tuples and Dictionaries, basics Using Data Structures to Model
Real-World Things, Manipulating Strings.
Textbook 1: Chapters 4 – 6
Teaching-Learning Chalk and talk method/Power point presentation
Process RBT Level: L1, L2, L3

19.09.2023
03.10.2022

Module-3
Pattern Matching with Regular Expressions, Finding Patterns of Text Without Regular Expressions,
Finding Patterns of Text with Regular Expressions, More Pattern Matching with Regular Expressions,,
The findall() Method, Character Classes, Making Your Own Character Classes, The Caret and Dollar Sign
Characters, The Wildcard Character, Review of Regex Symbols.

Reading and Writing Files, Files and File Paths, The os.path Module, The File Reading/Writing Process,
Saving Variables with the shelve Module, Saving Variables with the pprint. pformat() Function
Textbook 1: Chapters 7, 8
Teaching-Learning Chalk and talk method / PowerPoint Presentation
Process RBT Level: L1, L2, L3
Module-4
Classes and objects: Programmer-defined types, Attributes, Rectangles, Instances as return values,
Objects are mutable, Copying, Classes and functions: Time, Pure functions, Modifiers, Prototyping
versus planning, Classes and methods: Object-oriented features, Printing objects, Another example,
The init method, The__str__ method, Operator overloading, Type-based dispatch, Polymorphism.
Textbook 2: Textbook 2: Chapters 15 – 18
Teaching-Learning Chalk and talk method / PowerPoint Presentation
Process RBT Level: L1, L2, L3
Module-5
HTTP, The World’s simplest Web Browser, Retrieving an image over HTTP, Retrieving web pages with
urllib, Parsing html and scraping the web, Parsing HTML using RE, BeautifulSoup, Reading binary files
using urllib, XML, Parsing XML, Looping through nodes, JSON, Parsing JSON, API, geocoding Web
Service, Security & API usage, What is database?, Database Concepts, Database Browser, Creating a
database table, SQL, Spidering Twitter, Basic data modeling, Programming with multiple tables, Three
kinds of Keys, JOIN
Text book : Chapter 2, 13, 15
Teaching-Learning Chalk and talk method/Power point presentation
Process RBT Level: L1, L2, L3
Course outcomes (Course Skill Set)
At the end of the course the student will be able to:
1. To acquire programming skills in Python
2. To demonstrate data structure representation using Python
3. To develop the skill of pattern matching and files in Python
4. To acquire Object Oriented Skills in Python
5. To develop the ability to write database applications in Python
Assessment Details (both CIE and SEE)
The weightage of Continuous 5 End Examination) taken together.

Continuous Internal Evaluation:

Three Unit Tests each of 20 Marks (duration 01 hour)
1. First test at the end of 5th week of the semester
2. Second test at the end of the 10th week of the semester
3. Third test at the end of the 15th week of the semester

Two assignments each of 10 Marks

4. First assignment at the end of 4th week of the semester
5. Second assignment at the end of 9th week of the semester
Group discussion/Seminar/quiz any one of three suitably planned to attain the COs and POs for 20
Marks (duration 01 hours)

19.09.2023
03.10.2022

6. At the end of the 13th week of the semester

The sum of three tests, two assignments, and quiz/seminar/group discussion will be out of 100 marks
and will be scaled down to 50 marks
(to have less stressed CIE, the portion of the syllabus should not be common /repeated for any of the
methods of the CIE. Each method of CIE should have a different syllabus portion of the course).
CIE methods /question paper is designed to attain the different levels of Bloom’s taxonomy as per
the outcome defined for the course.
Semester End Examination:
Theory SEE will be conducted by University as per the scheduled timetable, with common question
papers for the subject (duration 03 hours)
1. The question paper will have ten questions. Each question is set for 20 marks.
2. There will be 2 questions from each module. Each of the two questions under a module (with a
maximum of 3 sub-questions), should have a mix of topics under that module.
The students have to answer 5 full questions, selecting one full question from each module.. Marks scored
out of 100 shall be reduced proportionally to 50 marks

Suggested Learning Resources:

Text Books:
1. Al Sweigart, “Automate the Boring Stuff with Python”,1st Edition, No Starch Press, 2015.
(Available under CC-BY-NC-SA license at https://automatetheboringstuff.com/) (Chapters 1 to 8)
2. Allen B Downey, “Think Python: How to Think Like a Computer Scientist”, 2nd Edition, Green Tea
Press, 2015. (Available under CC-BY-NC license at
http://greenteapress.com/thinkpython2/thinkpython2.pdf) (Chapters 15 - 18)
(Download pdf/html files from the above links)
3. Charles R. Severance, “Python for Everybody: Exploring Data Using Python 3”, 1st, Create Space
Independent Publishing Platform, 2016
Web links and Video Lectures (e-Resources)
 https://www.youtube.com/watch?v=_xQNeOTRyig
 https://www.youtube.com/watch?v=kqtD5dpn9C8
Activity Based Learning (Suggested Activities in Class)/ Practical Based learning
 Write a program to generate Fibonacci series
 Write a program to find factorial of a number using function.
 Write a menu driven program to implement stack using Lists
 Create a DB using dictionaries containing key as USN and related fields containing Name, gender,
Marks1, Marks2 & Marks3 of students. Implement the following functions to perform i) Update
Name/gender/marks ii) search for usn and display the relevant fields iii) delete based on search
for name iv)generate the report with avg marks more than 70%
 Write a program to implement search and replace multiple occurrences of a given substring in
the main string in a list.
 Write a function called most_frequent that takes a string and prints the letters in decreasing order of
frequency.
 Write a program that reads a file, display the contents, builds a histogram of the words in the file and
print most common words in the file.
 Write a program that searches a directory and all of its subdirectories, recursively, and returns a list of
complete paths for all files with a given suffix.

19.09.2023
03.10.2022

 Write python code to extract From: and To: Email Addresses from the given text file using regular
expressions. https://www.py4e.com/code3/mbox.txt.
 Consider the sentence “From [email protected] Fri Jan 4 14:50:18 2008”, Write python code to
extract email address and time of the day from the given sentence
 Write a program to read, display and count number of sentences of the given file.
 Write a program that gets the current date and prints the day of the week.
 Write a function called print_time that takes two Time objects and prints total time it in the form
hour:minute:second.
 Write a program that takes a birthday as input and prints the user’s age and the number of days, hours,
minutes and seconds until their next birthday.

19.09.2023
03.10.2022

VISVESVARAYA TECHNOLOGICAL UNIVERSITY, BELAGAVI

B.E: Electronics & Communication Engineering / B.E: Electronics & Telecommunication Engineering
NEP, Outcome Based Education (OBE) and Choice Based Credit System (CBCS)
(Effective from the academic year 2021 – 22)
VI Semester
Micro Electro Mechanical Systems
Course Code 21EC644 CIE Marks 50
Teaching Hours/Week (L:T:P:S) 3: 0 :0 : 1 SEE Marks 50
Total Hours of Pedagogy 40 Total Marks 100
Credits 3 Exam Hours 3
Course objectives:
 Preparation: To prepare students with fundamental knowledge/ overview in the field of Micro
Electro Mechanical Systems.
 Core Competence: To equip students with a basic foundation in electronic engineering,
mechanical engineering, electrical engineering, chemistry, physics and mathematics fundamentals
required for comprehending the operation and application of MEMS circuits, design.
 Professionalism & Learning Environment: To inculcate in students an ethical and professional
attitude by providing an academic environment inclusive of effective communication, teamwork,
ability to relate engineering issues to a broader social context, and life-long learning needed for a
successful professional career.
Teaching-Learning Process (General Instructions)
These are sample Strategies, which teacher can use to accelerate the attainment of the various course
outcomes.
1. Lecture method (L) does not mean only the traditional lecture method, but a different type of
teaching method may be adopted to develop the outcomes
2. Show Video/animation films to explain the functioning of various
3. Encourage collaborative (Group) Learning in the class to promote critical thinking
4. Topics for seminars on several MEMS related topics and their applications
5. Encourage the students to take up mini projects and main projects
6. Discuss how every concept can be applied to the real world - and when that's possible, it helps
improve the students' understanding.

Module-1
Overview of MEMS and Microsystems: MEMS and Microsystem, Typical MEMS and Microsystems
Products, Evolution of Microfabrication, Microsystems and Microelectronics, Multidisciplinary Nature
of Microsystems, Miniaturization. Applications and Markets.
Text1: 1.1, 1.2, 1.3, 1.4, 1.5, 1.6, 1.7, 1.8, 1.9
Teaching- Chalk and talk method, Animation of MEMS products and applications
Learning RBT Level: L1, L2, L3
Process
Module-2
Working Principles of Microsystems: Introduction, Microsensors, Micro actuation, MEMS with Micro
actuators, Micro accelerometers, Microfluidics. Text1: 2.1,2.2, 2.3, 2.4, 2.5, 2.6
Engineering Science for Microsystems Design and Fabrication: Introduction, Atomic Structure of
Matter, Ions and Ionization Molecular Theory of Matter and Intermolecular Forces, Plasma Physics,
Electrochemistry. Text1: 3.1, 3.2, 3.3, 3.4, 3.7, 3.8

Teaching- PowerPoint Presentation, YouTube videos, Animations of MEMS Micro sensors, Micro
Learning actuators, Micro accelerometers and Microfluidics, molecules, Ions and matter
Process RBT Level: L1, L2, L3

19.09.2023
03.10.2022

Module-3
Engineering Mechanics for Microsystems Design: Introduction, Static Bending of Thin Plates,
Mechanical Vibration, Thermo mechanics, Fracture Mechanics, Thin Film Mechanics, Overview on
Finite Element Stress Analysis. Text1: 4.1,4.2,4.3,4.4,4.5,4.6,4.7
Teaching- Chalk and talk method, Power Point Presentations and supporting YouTube Videos
Learning Solve numericals related to Thin Plates, and Vibration.
Process Self study topics: solve numericals related to other topics
RBT Level: L1, L2, L3
Module-4
Scaling Laws in Miniaturization: Introduction, Scaling in Geometry, Scaling in Rigid-Body Dynamics,
Scaling in Electrostatic Forces, Scaling in Electromagnetic Forces, Scaling in Electricity, Scaling in Fluid
Mechanics, Scaling in Heat Transfer. Text1: 6.1, 6.2,6.3,6.4,6.5,6.6,6.7,6.8
Teaching- Chalk and Talk Method, You Tube Videos, Solve numericals related to scaling in Geometry
Learning Self study topics: solve numericals of other topics
Process RBT Level: L1, L2, L3
Module-5
Overview of Micromanufacturing: Introduction, Bulk Micromanufacturing, Surface Micromachining,
The LIGA Process, Summary on Micromanufacturing. Text1: 9.1,9.2,9.3,9.4,9.5
Microsystem Packaging: Introduction, Overview of Mechanical Packaging of Microelectronics,
Microsystem Packaging. Text1: 11.1,11.2, 11.3
Teaching- Power Point Presentation, YouTube videos, Animation of MEMS micromanufacturing
Learning Supporting animation videos on packaging
Process RBT Level: L1, L2, L3
Course outcomes (Course Skill Set)
At the end of the course the student will be able to:
1. Appreciate the technologies related to Micro Electro Mechanical Systems.
2. Understand design and fabrication processes involved with MEMS devices.
3. Analyse the MEMS devices and develop suitable mathematical models
4. Know various application areas for MEMS device.
Assessment Details (both CIE and SEE)
The weightage of Continuous Internal Evaluation (CIE) is 50% and for Semester End Exam (SEE) is 50%.
The minimum passing mark for the CIE is 40% of the maximum marks (20 marks out of 50). A student
shall be deemed to have satisfied the academic requirements and earned the credits allotted to each
subject/ course if the student secures not less than 35% (18 Marks out of 50) in the semester-end
examination (SEE), and a minimum of 40% (40 marks out of 100) in the sum total of the CIE (Continuous
Internal Evaluation) and SEE (Semester End Examination) taken together.
Continuous Internal Evaluation:
Three Unit Tests each of 20 Marks (duration 01 hour)
1. First test at the end of 5th week of the semester
2. Second test at the end of the 10th week of the semester
3. Third test at the end of the 15th week of the semester
Two assignments each of 10 Marks
4. First assignment at the end of 4th week of the semester
5. Second assignment at the end of 9th week of the semester
Group discussion/Seminar/quiz any one of three suitably planned to attain the COs and POs for 20
Marks (duration 01 hours)
6. At the end of the 13th week of the semester
The sum of three tests, two assignments, and quiz/seminar/group discussion will be out of 100 marks
and will be scaled down to 50 marks

19.09.2023
03.10.2022

(to have less stressed CIE, the portion of the syllabus should not be common /repeated for any of the
methods of the CIE. Each method of CIE should have a different syllabus portion of the course).
CIE methods /question paper is designed to attain the different levels of Bloom’s taxonomy as per
the outcome defined for the course.
Semester End Examination:
Theory SEE will be conducted by University as per the scheduled timetable, with common question
papers for the subject (duration 03 hours)
1. The question paper will have ten questions. Each question is set for 20 marks.
2. There will be 2 questions from each module. Each of the two questions under a module (with a
maximum of 3 sub-questions), should have a mix of topics under that module.
The students have to answer 5 full questions, selecting one full question from each module.. Marks scored
out of 100 shall be reduced proportionally to 50 marks

Suggested Learning Resources:

Text Book:
Tai-Ran Hsu, MEMS and Micro systems: Design and Manufacture, 1st Ed, Tata Mc Graw Hill.
Reference Books:
1. Hans H Gatzen, Volker Saile, JurgLeuthold, Micro and Nano Fabrication: Tools and Processes,
Springer, 2015.
2. Dilip Kumar Bhattacharya, Brajesh Kumar Kaushik, Microelectromechanical Systems
(MEMS), Cengage Learning.
3. Chang Liu, Foundations of MEMS, Pearson Ed.
Activity Based Learning (Suggested Activities in Class)/ Practical Based learning
 Develop mini projects and Final year projects using MEMS components to address the real world
problems

19.09.2023
03.10.2022

VISVESVARAYA TECHNOLOGICAL UNIVERSITY, BELAGAVI

B.E: Electronics & Communication Engineering / B.E: Electronics & Telecommunication Engineering
NEP, Outcome Based Education (OBE) and Choice Based Credit System (CBCS)
(Effective from the academic year 2021 – 22)
VII Semester

Advanced VLSI
Course Code 21EC71 CIE Marks 50
Teaching Hours/Week (L:T:P:S) 3:0:0:1 SEE Marks 50
Total Hours of Pedagogy 40 Total Marks 100
Credits 3 Exam Hours 3
Course objectives:
 Learn overview of VLSI design flow
 Emphasise on Back end VLSI design flow
 Learn basics of verification with reference to System Verilog
Teaching-Learning Process (General Instructions)
The sample strategies, which the teacher can use to accelerate the attainment of the various course
outcomes are listed in the following:
1. Lecture method (L) does not mean only the traditional lecture method, but a different type of
teaching method may be adopted to develop the outcomes.
2. Show Video/animation films to explain the functioning of various techniques.
3. Encourage collaborative (Group) Learning in the class
4. Ask at least three HOTS (Higher-order Thinking) questions in the class, which promotes critical
thinking
5. Adopt Problem Based Learning (PBL), which fosters students’ Analytical skills, develop thinking
skills such as the ability to evaluate, generalize, and analyze information rather than simply recall
it.
6. Topics will be introduced in multiple representations.
7. Show the different ways to solve the same problem and encourage the students to come up with
their own creative ways to solve them.
8. Discuss how every concept can be applied to the real world - and when that's possible, it helps
improve the students' understanding.
Module-1
Introduction to ASICs: Full custom, Semi-custom and Programmable ASICs, ASIC Design flow, ASIC
cell libraries. CMOS Logic: Data path Logic Cells: Data Path Elements, Adders: Carry skip, Carry bypass,
Carry save, Carry select, Conditional sum, Multiplier (Booth encoding), Data path Operators, I/O cells,
Cell Compilers. Text Book 1
Teaching-Learning Chalk and talk method, Power point presentation
Process RBT Level: L1, L2, L3
Module-2
Floor planning and placement: Goals and objectives, Measurement of delay in Floor planning, Floor
planning tools, Channel definition, I/O and Power planning and Clock planning. Placement: Goals and
Objectives, Min-cut Placement algorithm, Iterative Placement Improvement, Time driven placement
methods, Physical Design Flow.
Routing: Global Routing: Goals and objectives, Global Routing Methods, Global routing between blocks,
Back annotation. Text Book 1
Teaching-Learning Chalk and talk method, Power point presentation
Process RBT Level: L1, L2, L3

19.09.2023
03.10.2022

Module-3
Verification Guidelines: The verification process, basic test bench functionality, directed testing,
methodology basics, constrained random stimulus, randomization, functional coverage, test bench
components, layered testbench.
Data Types: Built in Data types, fixed and dynamic arrays, Queues, associative arrays, linked lists,
array methods, choosing a type, creating new types with type def, creating user defined structures,
type conversion, Enumerated types, constants and strings, Expression width.
Text Book 2
Teaching-Learning Chalk and talk method, Power point presentation
Process RBT Level: L1, L2, L3
Module-4
Procedural Statements and Routines: Procedural statements, Tasks, Functions and void functions,
Task and function overview, Routine arguments, returning from a routine, Local data storage, time
values.
Connecting the test bench and design: Separating the test bench and design, The interface construct,
Stimulus timing, Interface driving and sampling, System Verilog assertions.
Text Book 2
Teaching-Learning Chalk and talk method, Power point presentation
Process RBT Level: L1, L2, L3
Module-5
Randomization: Introduction, What to randomize? , Randomization in System Verilog, Random
number functions, Common randomization problems, Random Number Generators.
Functional Coverage: Coverage types, Coverage strategies, Simple coverage example, Anatomy of
Cover group and Triggering a Cover group, Data sampling, Cross coverage, Generic Cover groups,
Coverage options, Analyzing coverage data, measuring coverage statistics during simulation.
Text Book 2
Teaching-Learning Chalk and talk method, Power point presentation
Process RBT Level: L1, L2, L3
Course outcomes (Course Skill Set)
At the end of the course the student will be able to:
1. Understand VLSI design flow
2. Describe the concepts of ASIC design methodology
3. Create floor plan including partition and routing with the use of CAD algorithms
4. Will have better insights into VLSI back-end design flow
5. Learn verification basics and System Verilog
Assessment Details (both CIE and SEE)
The weightage of Continuous Internal Evaluation (CIE) is 50% and for Semester End Exam (SEE) is 50%.
The minimum passing mark for the CIE is 40% of the maximum marks (20 marks out of 50). A student
shall be deemed to have satisfied the academic requirements and earned the credits allotted to each
subject/ course if the student secures not less than 35% (18 Marks out of 50) in the semester-end
examination (SEE), and a minimum of 40% (40 marks out of 100) in the sum total of the CIE (Continuous
Internal Evaluation) and SEE (Semester End Examination) taken together.
Continuous Internal Evaluation:
Three Unit Tests each of 20 Marks (duration 01 hour)
1. First test at the end of 5th week of the semester
2. Second test at the end of the 10th week of the semester
3. Third test at the end of the 15th week of the semester
Two assignments each of 10 Marks
4. First assignment at the end of 4th week of the semester
5. Second assignment at the end of 9th week of the semester

19.09.2023
03.10.2022

Group discussion/Seminar/quiz any one of three suitably planned to attain the COs and POs for 20
Marks (duration 01 hours)
6. At the end of the 13th week of the semester
The sum of three tests, two assignments, and quiz/seminar/group discussion will be out of 100 marks
and will be scaled down to 50 marks
(to have less stressed CIE, the portion of the syllabus should not be common /repeated for any of the
methods of the CIE. Each method of CIE should have a different syllabus portion of the course).
CIE methods /question paper is designed to attain the different levels of Bloom’s taxonomy as per
the outcome defined for the course.
Semester End Examination:
Theory SEE will be conducted by University as per the scheduled timetable, with common question
papers for the subject (duration 03 hours)
1. The question paper will have ten questions. Each question is set for 20 marks.
2. There will be 2 questions from each module. Each of the two questions under a module (with a
maximum of 3 sub-questions), should have a mix of topics under that module.
The students have to answer 5 full questions, selecting one full question from each module.. Marks scored
out of 100 shall be reduced proportionally to 50 marks
Suggested Learning Resources:
Text Books:
1. Michael John Sebastian Smith, Application - Specific Integrated Circuits, Addison-Wesley
Professional, 2005.
2. Chris Spear, System Verilog for Verification – A guide to learning the Test bench language
features, Springer Publications, Second Edition, 2010.

Activity Based Learning (Suggested Activities in Class)/ Practical Based learning

 Use EDA tool to design basic Analog blocks like amplifiers and 4-bit RAM
 Prepare a white paper on ASIC design flow referring to literatures of Cadence and Synopsys EDA
tools
 Mini project using System Verilog

19.09.2023
03.10.2022

VISVESVARAYA TECHNOLOGICAL UNIVERSITY, BELAGAVI

B.E: Electronics & Communication Engineering / B.E: Electronics & Telecommunication Engineering
NEP, Outcome Based Education (OBE) and Choice Based Credit System (CBCS)
(Effective from the academic year 2021 – 22)
VII Semester

Optical & Wireless Communication

Course Code 21EC72 CIE Marks 50
Teaching Hours/Week (L:T:P:S) 2:0:0:1 SEE Marks 50
Total Hours of Pedagogy 30 Total Marks 100
Credits 2 Exam Hours 3
Non-MCQ pattern of CIE and SEE
Course objectives:
This course will enable students to:
 Learn the basic principle of optical fiber communication with different modes of light propagation.
 Understand the transmission characteristics and losses in optical fiber.
 Study of optical components and its applications in optical communication networks.
 Understand the concepts of propagation over wireless channels from a physics standpoint
 Understand the multiple access techniques used in cellular communications standards.
 Application of Communication theory both Physical and networking to understand GSM systems that
handle mobile telephony.
Teaching-Learning Process (General Instructions)
The sample strategies, which the teacher can use to accelerate the attainment of the various course
outcomes are listed in the following:
1. Lecture method (L) does not mean only the traditional lecture method, but a different type of
teaching method may be adopted to develop the outcomes.
2. Show Video/animation films to explain the functioning of various techniques.
3. Encourage collaborative (Group) Learning in the class
4. Ask at least three HOTS (Higher-order Thinking) questions in the class, which promotes critical
thinking
5. Adopt Problem Based Learning (PBL), which fosters students’ Analytical skills, develop thinking
skills such as the ability to evaluate, generalize, and analyze information rather than simply recall
it.
6. Topics will be introduced in multiple representations.
7. Show the different ways to solve the same problem and encourage the students to come up with
their own creative ways to solve them.
8. Discuss how every concept can be applied to the real world - and when that's possible, it helps
improve the students' understanding.
Module-1
Optical Fiber Structures: Optical Fiber Modes and Configurations, Mode theory for circular
waveguides, Single mode fibers, Fiber materials.
Attenuation and Dispersion: Attenuation, Absorption, Scattering Losses, Bending loss, Signal
Dispersion: Modal delay, Group delay, Material dispersion.
[Text1 : 3.1, 3.2, 2.3[2.3.1 to 2.3.4], 2.4[2.4.1, 2.4.2],2.5, 2.7].
Teaching-Learning Chalk and talk method, Power point presentation
Process RBT Level: L1, L2, L3
Module-2
Optical Sources and detectors: Light Emitting Diode: LED Structures, Light source materials,
Quantum efficiency and LED power, Laser Diodes: Modes and threshold conditions, Rate equations,
External quantum efficiency, Resonant frequencies, Photodetectors: The pin Photodetector, Avalanche
Photodiodes.

19.09.2023
03.10.2022

WDM Concepts: Overview of WDM, Isolators and Circulators, Fiber grating filters, Dielectric thin-film
filters, Diffraction Gratings.
[Text1: 4.2 ,4.3, 6.1, 10.1, 10.3, 10.4, 10.5, 10.7]
Teaching-Learning Chalk and talk method, Power point presentation
Process RBT Level: L1, L2, L3
Module-3
Mobile Communication Engineering: Wireless Network generations, Basic propagation Mechanisms,
Mobile radio Channel.
Principles of Cellular Communications: Cellular terminology, Cell structure and Cluster, Frequency
reuse concept, Cluster size and system capacity, Frequency Reuse Distance, Cochannel Interference and
signal quality.
[ Text2: 1.4, 2.4, 2.5, 4.1 to 4.4, 4.6, 4.7]
Teaching-Learning Chalk and talk method, Power point presentation
Process RBT Level: L1, L2, L3
Module-4
Multiple Access Techniques: FDMA, TDMA, CDMA, SDMA, Hybrid Multiple Access Techniques,
Multicarrier Multiple Access Schemes.
A Basic Cellular System: A basic cellular system connected to PSTN, Parts of basic cellular system,
Operation of a cellular system.
[Text2: 8.2, 8.3, 8.4.5, 8.5, 8.6, 8.10, 9.2.2, 9.2.3, 9.3]
Teaching-Learning Chalk and talk method, Power point presentation
Process RBT Level: L1, L2, L3
Module-5
Global System for Mobile (GSM): GSM Network Architecture, GSM signalling protocol architecture,
Identifiers used in GSM system, GSM Channels, Frame structure for GSM, GSM Call procedures, GSM
hand-off Procedures, GSM Services and features.
[Text2: 11.1, 11.2,11.3,11.4, 11.5, 11.8, 11.9. 11.10]
Teaching-Learning Chalk and talk method, Power point presentation
Process RBT Level: L1, L2, L3
Course outcomes (Course Skill Set)
At the end of the course the student will be able to:
1. Classification and characterization of optical fibers with different modes of signal propagation.
2. Describe the constructional features and the characteristics of optical fiber and optical devices
used for signal transmission and reception.
3. Understand the essential concepts and principles of mobile radio channel and cellular
communication.
4. Describe various multiple access techniques used in wireless communication systems.
5. Describe the GSM architecture and procedures to establish call set up, call progress handling and
call tear down in a GSM cellular network.
Assessment Details (both CIE and SEE)
The weightage of Continuous Internal Evaluation (CIE) is 50% and for Semester End Exam (SEE) is 50%.
The minimum passing mark for the CIE is 40% of the maximum marks (20 marks out of 50). A student
shall be deemed to have satisfied the academic requirements and earned the credits allotted to each
subject/ course if the student secures not less than 35% (18 Marks out of 50) in the semester-end
examination (SEE), and a minimum of 40% (40 marks out of 100) in the sum total of the CIE (Continuous
Internal Evaluation) and SEE (Semester End Examination) taken together
Continuous Internal Evaluation (CIE):
CIE will be the same as other core theory courses.

19.09.2023
03.10.2022

CIE methods /question paper is designed to attain the different levels of Bloom’s taxonomy as per
the outcome defined for the course.
Semester End Examination (SEE):
For non-MCQ pattern of CIE and SEE
Continuous Internal Evaluation (CIE):
At the beginning of the semester, the instructor/faculty teaching the course has to announce the methods
of CIE for the course.
Three Unit Tests each of 20 Marks (duration 01 hour)
1. First test at the end of 5th week of the semester
2. Second test at the end of the 10th week of the semester
3. Third test at the end of the 15th week of the semester
Two assignments each of 10 Marks
4. First assignment at the end of 4th week of the semester
5. Second assignment at the end of 9th week of the semester
Group discussion/Seminar/quiz any one of three suitably planned to attain the COs and POs for 20
Marks (duration 01 hours)
6. At the end of the 13th week of the semester
The sum of three tests, two assignments, and quiz/seminar/group discussion will be out of 100 marks
and will be scaled down to 50 marks
(to have less stressed CIE, the portion of the syllabus should not be common /repeated for any of the
methods of the CIE. Each method of CIE should have a different syllabus portion of the course).
CIE methods /question paper is designed to attain the different levels of Bloom’s taxonomy as per
the outcome defined for the course.
Semester End Examination:
Theory SEE will be conducted by University as per the scheduled timetable, with common question
papers for the subject (duration 03 hours)
1. The question paper will have ten questions. Each question is set for 20 marks.
2. There will be 2 questions from each module. Each of the two questions under a module (with a
maximum of 3 sub-questions), should have a mix of topics under that module.
The students have to answer 5 full questions, selecting one full question from each module. Marks scored
out of 100 shall be reduced proportionally to 50 marks
Suggested Learning Resources:
Text Books
1. Gerd Keiser, Optical Fiber Communication, 5th Edition, McGraw Hill Education (India) Private
Limited, 2016. ISBN:1-25-900687-5.
2. T L Singal, Wireless Communications, McGraw Hill Education (India) Private Limited, 2016, ISBN:0-
07-068178-3.
Reference Books
1. John M Senior, Optical Fiber Communications, Principles and Practice, 3 rd Edition, Pearson
Education, 2010, ISBN:978-81-317-3266-3
2. Theodore Rappaport, Wireless Communications: Principles and Practice, 2nd Edition, Prentice Hall
Communications Engineering and Emerging Technologies Series, 2002, ISBN 0-13-042232-0.
3. Gary Mullet, Introduction to Wireless Telecommunications Systems and Networks, First Edition,
Cengage Learning India Pvt Ltd., 2006, ISBN - 13: 978-81-315-0559-5.

19.09.2023
03.10.2022

VISVESVARAYA TECHNOLOGICAL UNIVERSITY, BELAGAVI

B.E: Electronics & Communication Engineering / B.E: Electronics & Telecommunication Engineering
NEP, Outcome Based Education (OBE) and Choice Based Credit System (CBCS)
(Effective from the academic year 2021 – 22)
VII Semester

Optical & Satellite Communication

Course Code 21EC741 CIE Marks 50
Teaching Hours/Week (L:T:P:S) 3:0:0:1 SEE Marks 50
Total Hours of Pedagogy 40 Total Marks 100
Credits 3 Exam Hours 3
Course objectives: This course will enable students to:
 Learn the basic principle of optical fiber communication with different modes of light propagation.
 Understand the transmission characteristics and losses in optical fiber.
 Study of optical components and its applications in optical communication networks.
 Understand the basic principle of satellite orbits and trajectories.
 Study of electronic systems associated with a satellite and the earth station.
 Study satellite applications focusing various domains services such as remote sensing, weather
forecasting and navigation.
Teaching-Learning Process (General Instructions)
The sample strategies, which the teacher can use to accelerate the attainment of the various course
outcomes are listed in the following:
1. Lecture method (L) does not mean only the traditional lecture method, but a different type of
teaching method may be adopted to develop the outcomes.
2. Show Video/animation films to explain the functioning of various techniques.
3. Encourage collaborative (Group) Learning in the class
4. Ask at least three HOTS (Higher-order Thinking) questions in the class, which promotes critical
thinking
5. Adopt Problem Based Learning (PBL), which fosters students’ Analytical skills, develop thinking
skills such as the ability to evaluate, generalize, and analyze information rather than simply recall
it.
6. Topics will be introduced in multiple representations.
7. Show the different ways to solve the same problem and encourage the students to come up with
their own creative ways to solve them.
8. Discuss how every concept can be applied to the real world - and when that's possible, it helps
improve the students' understanding.
Module-1
Optical Fiber Structures: Optical Fiber Modes and Configurations, Mode theory for circular
waveguides, Single mode fibers, Fiber materials, Photonic Crystal Fibers, Fiber Optic Cables.
Attenuation and Dispersion: Attenuation: Absorption, Scattering Losses, Bending loss, Signal
Dispersion: Modal delay, Group delay, Material dispersion.
[Text1 : 2.3[2.3.1 to 2.3.4], 2.4[2.4.1, 2.4.2],2.5, 2.7,2.8, 2.11, 3.1, 3.2].
Teaching-Learning Chalk and talk method, Power Point Presentation.
Process Self-study topics: Optical Spectral bands, Basic optical laws and definitions.
RBT Level: L1, L2, L3
Module-2
Optical Sources and detectors: Light Emitting Diode: LED Structures, Light source materials,
Quantum efficiency and LED power, Laser Diodes: Modes and threshold conditions, Rate equations,
External quantum efficiency, Resonant frequencies, Photodetectors: The pin Photodetector, Avalanche
Photodiodes.
WDM Concepts: Overview of WDM, Isolators and Circulators, Fiber grating filters, Dielectric thin-film
filters, Diffraction Gratings.

19.09.2023
03.10.2022

Optical Amplifiers: Basic Applications and types, Erbium doped fiber amplifiers. [Text1: 4.2 ,4.3, 6.1,
10.1, 10.3, 10.4, 10.5, 10.7, 11.1, 11.3.1,11.3.2]
Teaching-Learning Chalk and talk method, Power point presentation
Process Self-study topics: Raman Amplifiers.
RBT Level: L1, L2, L3
Module-3
Satellite Orbit and Trajectories: Definition, Basic Principles, Orbital parameters, Injection velocity
and satellite trajectory, Types of Satellite orbits. [Text2: 2.1, 2.2, 2.3,2.4,2.5]
Satellite In-orbit Operations: Orbital perturbations, Satellite stabilization, Orbital effects on satellite’s
performance, Eclipses, Look angles: Azimuth angle, Elevation angle. [Text2: 3.3, 3.4, 3.5, 3.6, 3.7]
Teaching-Learning Chalk and talk method, Power Point Presentation.
Process Self-study topics: Satellite launch sequence.
RBT Level: L1, L2, L3
Module-4
Satellite Hardware: Satellite Subsystems, Power supply subsystem, Attitude and Orbit control, Tracking,
Telemetry and command subsystem, Payload. [Text2: 4.1, 4.5, 4.6, 4.7,4.8]
Earth Station: Types of earth station, Architecture, Design considerations, Testing, Earth station
Hardware, Satellite tracking. [Text2: 8.1, 8.2, 8.3,8.4,8.5,8.6]
Teaching-Learning Chalk and talk method, Power Point Presentation.
Process Self-study topics: Mechanical structure and propulsion subsystem
RBT Level: L1, L2, L3
Module-5
Communication Satellites: Introduction, Related Applications, Frequency Bands, Payloads, Satellite Vs.
Terrestrial Networks, Satellite Television, Satellite Data Communication Services.
Applications: Remote Sensing Satellites: Classification, Orbits, payloads. Weather Forecasting
Satellites: Overview, Fundamentals, orbits and payload. Global Positioning Satellite System.
Teaching-Learning Chalk and talk method, Power point presentation
Process Self-study topics: Regional, National and International Satellite systems
RBT Level: L1, L2, L3
Course outcomes (Course Skill Set)
At the end of the course the student will be able to:
1. Classification and characterization of optical fibers and devices used for optical communication.
2. Understand the principle of operation of optical devices used for multiplexing and amplification of
light.
3. Describe the satellite orbits and its trajectories with the definitions of parameters associated with
it.
4. Describe the electronic hardware systems associated with the satellite subsystem and earth station.
5. Understand the functioning of satellites for communication, remote sensing, and weather and
navigation applications.
Assessment Details (both CIE and SEE)
The weightage of Continuous Internal Evaluation (CIE) is 50% and for Semester End Exam (SEE) is 50%.
The minimum passing mark for the CIE is 40% of the maximum marks (20 marks out of 50). A student
shall be deemed to have satisfied the academic requirements and earned the credits allotted to each
subject/ course if the student secures not less than 35% (18 Marks out of 50) in the semester-end
examination (SEE), and a minimum of 40% (40 marks out of 100) in the sum total of the CIE (Continuous
Internal Evaluation) and SEE (Semester End Examination) taken together.
Continuous Internal Evaluation:
Three Unit Tests each of 20 Marks (duration 01 hour)
1. First test at the end of 5th week of the semester

19.09.2023
03.10.2022

2. Second test at the end of the 10th week of the semester

3. Third test at the end of the 15th week of the semester
Two assignments each of 10 Marks
4. First assignment at the end of 4th week of the semester
5. Second assignment at the end of 9th week of the semester
Group discussion/Seminar/quiz any one of three suitably planned to attain the COs and POs for 20
Marks (duration 01 hours)
6. At the end of the 13th week of the semester
The sum of three tests, two assignments, and quiz/seminar/group discussion will be out of 100 marks
and will be scaled down to 50 marks
(to have less stressed CIE, the portion of the syllabus should not be common /repeated for any of the
methods of the CIE. Each method of CIE should have a different syllabus portion of the course).
CIE methods /question paper is designed to attain the different levels of Bloom’s taxonomy as per
the outcome defined for the course.
Semester End Examination:
Theory SEE will be conducted by University as per the scheduled timetable, with common question
papers for the subject (duration 03 hours)
1. The question paper will have ten questions. Each question is set for 20 marks.
2. There will be 2 questions from each module. Each of the two questions under a module (with a
maximum of 3 sub-questions), should have a mix of topics under that module.
The students have to answer 5 full questions, selecting one full question from each module.. Marks scored
out of 100 shall be reduced proportionally to 50 marks
Suggested Learning Resources:
Text Books:
1. Gerd Keiser, Optical Fiber Communication, 5th Edition, McGraw Hill Education (India) Private
Limited, 2016. ISBN:1-25-900687-5.
2. Anil K Maini, Varsha Agrawal, Satellite Communication, Wiley India Pvt. Ltd., 2015, ISBN: 978-81-
265-2071-8.
Reference Books:
1. John M Senior, Optical Fiber Communications, Principles and Practice, 3 rd Edition, Pearson
Education, 2010, ISBN:978-81-317-3266-3
2. Timothy Pratt, Charles Bostian, Jeremy Allnutt, Satellite Communications, 2 nd Edition, Wiley India
Pvt. Ltd , 2017, ISBN: 978-81-265-0833-4
3. Dennis Roddy, Satellite Communications, 4th Edition, McGraw- Hill International edition, 2006.

19.09.2023
03.10.2022

VISVESVARAYA TECHNOLOGICAL UNIVERSITY, BELAGAVI

B.E: Electronics & Communication Engineering / B.E: Electronics & Telecommunication Engineering
NEP, Outcome Based Education (OBE) and Choice Based Credit System (CBCS)
(Effective from the academic year 2021 – 22)
VII Semester

ARM Embedded Systems

Course Code 21EC742 CIE Marks 50
Teaching Hours/Week (L:T:P:S) 3:0:0:1 SEE Marks 50
Total Hours of Pedagogy 40 Total Marks 100
Credits 3 Exam Hours 3
Course objectives:
This course will enable students to:
 Explain the architectural features and instructions of 32 bit ARM microcontroller
 Develop Programs using the various instructions of ARM for different Applications.
 Understand the basic hardware components and their selection method based on the
characteristics and
 Attributes of an embedded system.
 Develop the hardware software co-design and firmware design approaches.
 Explain the need of real time operating system for embedded system applications.
Teaching-Learning Process (General Instructions)
The sample strategies, which the teacher can use to accelerate the attainment of the various course
outcomes are listed in the following:
1. Lecture method (L) does not mean only the traditional lecture method, but a different type of
teaching method may be adopted to develop the outcomes.
2. Show Video/animation films to explain the functioning of various techniques.
3. Encourage collaborative (Group) Learning in the class
4. Ask at least three HOTS (Higher-order Thinking) questions in the class, which promotes critical
thinking
5. Adopt Problem Based Learning (PBL), which fosters students’ Analytical skills, develop thinking
skills such as the ability to evaluate, generalize, and analyze information rather than simply recall
it.
6. Show the different ways to solve the same problem and encourage the students to come up with
their own creative ways to solve them.
7. Discuss how every concept can be applied to the real world - and when that's possible, it helps
improve the students' understanding.
8. Give programming assignments.
Module-1
ARM Embedded System: RISC Design Philosophy, ARM design Philosophy, Embedded System
hardware and Embedded System software.
ARM Processor Fundamentals: Registers, Current Program Status Registers, Pipeline, Exceptions,
Interrupts and the Vector table, Core Extensions, Architecture Revisions, ARM processor families
(Text1 : Chapter 1 and Chapter 2 )
Teaching-Learning Chalk and talk method, Power point presentation
Process RBT Level: L1, L2, L3
Module-2
ARM Instructions: Introduction, Data Processing Instructions, Branch Instructions, Load – Store
Instructions Software Instructions, Program Status Register Instructions, Conditional Execution.
Thumb Instructions: Thumb register usage, ARM – Thumb Interworking, Other branch Instructions,
Data Processing instructions, Single and Multiple Register Load Store Instructions, Stack Instructions,
Software Interrupt Instructions.
(Text1: Chapter 3 and chapter 4,)

19.09.2023
03.10.2022

Teaching-Learning Chalk and talk method, Power point presentation

Process RBT Level: L1, L2, L3
Module-3
Embedded System Components: Embedded Vs General computing system, Classification of
Embedded systems, Major applications and purpose of ES. Elements of an Embedded System (Block
diagram and explanation), Differences between RISC and CISC, Harvard and Princeton, Big and Little
Endian formats, Memory (ROM and RAM types), Sensors, Actuators, Optocoupler, Communication
Interfaces (I2C, SPI, IrDA, Bluetooth, Wi-Fi, Zigbee only)

(Text 2: All the Topics from Ch-1 and Ch-2 (Fig and explanation before 2.1) 2.1.1.6 to 2.1.1.8, 2.2 to
2.2.2.3, 2.3 to 2.3.2, 2.3.3.3, selected topics of 2.4.1 and 2.4.2 only).
Teaching-Learning Chalk and talk method, Power point presentation
Process RBT Level: L1, L2, L3
Module-4
Embedded System Design Concepts: Characteristics and Quality Attributes of Embedded Systems,
Operational and non-operational quality attributes, Embedded Systems-Application and Domain
specific, Hardware Software Co-Design and Program Modeling (excluding UML), Embedded firmware
design and development (excluding C language).
Text 2: Ch-3, Ch-4 (4.1, 4.2.1 and 4.2.2 only), Ch-7 (Sections 7.1, 7.2 only), Ch-9 (Sections 9.1, 9.2, 9.3.1,
9.3.2 only)
Teaching-Learning Chalk and talk method, Power point presentation
Process RBT Level: L1, L2, L3
Module-5
RTOS and IDE for Embedded System Design: Operating System basics, Types of operating systems,
Task, process and threads (Only POSIX Threads with an example program), Thread preemption,
Preemptive Task scheduling techniques, Task Communication, Task synchronization issues – Racing
and Deadlock, Concept of Binary and counting semaphores (Mutex example without any program),
How to choose an RTOS, Integration and testing of Embedded hardware and firmware, Embedded
system Development Environment – Block diagram (excluding Keil), Disassembler/decompiler,
simulator, emulator and debugging techniques
(Text 2: Ch-10 (Sections 10.1, 10.2, 10.3, 10.5.2 , 10.7, 10.8.1.1, 10.8.1.2, 10.8.2.2, 10.10 only), Ch-12,
Ch-13 (a block diagram before 13.1, 13.3, 13.4, 13.5, 13.6 only)
Teaching-Learning Chalk and talk method, Power point presentation
Process RBT Level: L1, L2, L3
Course outcomes (Course Skill Set)
At the end of the course the student will be able to:
1. Describe the architectural features and instructions of 32 bit microcontroller ARM Cortex M3.
2. Apply the knowledge gained for Programming ARM Cortex M3 for different applications.
3. Understand the basic hardware components and their selection method based on the characteristics
and attributes of an embedded system.
4. -design and firmware design approaches.
5. Explain the need of real time operating system for embedded system applications.
Assessment Details (both CIE and SEE)
The weightage of Continuous Internal Evaluation (CIE) is 50% and for Semester End Exam (SEE) is 50%.
The minimum passing mark for the CIE is 40% of the maximum marks (20 marks out of 50). A student
shall be deemed to have satisfied the academic requirements and earned the credits allotted to each
subject/ course if the student secures not less than 35% (18 Marks out of 50) in the semester-end
examination (SEE), and a minimum of 40% (40 marks out of 100) in the sum total of the CIE (Continuous
Internal Evaluation) and SEE (Semester End Examination) taken together.

19.09.2023
03.10.2022

Continuous Internal Evaluation:

Three Unit Tests each of 20 Marks (duration 01 hour)
1. First test at the end of 5th week of the semester
2. Second test at the end of the 10th week of the semester
3. Third test at the end of the 15th week of the semester
Two assignments each of 10 Marks
4. First assignment at the end of 4th week of the semester
5. Second assignment at the end of 9th week of the semester
Group discussion/Seminar/quiz any one of three suitably planned to attain the COs and POs for 20
Marks (duration 01 hours)
6. At the end of the 13th week of the semester
The sum of three tests, two assignments, and quiz/seminar/group discussion will be out of 100 marks
and will be scaled down to 50 marks
(to have less stressed CIE, the portion of the syllabus should not be common /repeated for any of the
methods of the CIE. Each method of CIE should have a different syllabus portion of the course).
CIE methods /question paper is designed to attain the different levels of Bloom’s taxonomy as per
the outcome defined for the course.
Semester End Examination:
Theory SEE will be conducted by University as per the scheduled timetable, with common question
papers for the subject (duration 03 hours)
1. The question paper will have ten questions. Each question is set for 20 marks.
2. There will be 2 questions from each module. Each of the two questions under a module (with a
maximum of 3 sub-questions), should have a mix of topics under that module.
The students have to answer 5 full questions, selecting one full question from each module.. Marks scored
out of 100 shall be reduced proportionally to 50 marks
Suggested Learning Resources:
Text Books:
1. Andrew N Sloss, “ARM System Developer’s guide”, Elsevier Publications, 2016
2. Shibu K V, “Introduction to Embedded Systems”, Tata McGraw Hill Education Private Limited, 2 nd
Edition.

Reference Books:

1. James K Peckol, "Embedded systems- A contemporary design tool", John Wiley, 2008.
2. Yifeng Zhu, “Embedded Systems with Arm Cortex-M Microcontrollers in Assembly Language and C”,
2nd Ed., Man Press LLC ©, 2015.
3. K V K K Prasad, “Embedded real time systems”, Dreamtech publications, 2003.
4. Rajkamal, “Embedded Systems”,2nd Edition, McGraw hill Publications, 2010.

19.09.2023
03.10.2022

VISVESVARAYA TECHNOLOGICAL UNIVERSITY, BELAGAVI

B.E: Electronics & Communication Engineering / B.E: Electronics & Telecommunication Engineering
NEP, Outcome Based Education (OBE) and Choice Based Credit System (CBCS)
(Effective from the academic year 2021 – 22)
VII Semester

Basic Digital Image Processing

Course Code 21EC743 CIE Marks 50
Teaching Hours/Week (L:T:P:S) 2:0:2:1 SEE Marks 50
Total Hours of Pedagogy 40 Total Marks 100
Credits 3 Exam Hours 3
Course objectives:
 Understand the fundamentals of digital image processing
 Understand the image enhancement techniques in spatial domain used in digital image processing
 Understand the frequency domain enhancement techniques in digital image processing
 Understand the Color Image Processing in digital image processing
 Understand the image restoration techniques and methods used in digital image processing
Teaching-Learning Process (General Instructions)
These are sample Strategies, which teacher can use to accelerate the attainment of the various course
outcomes.
1. Show Video/animation films to explain the functioning of various image processing concepts.
2. Encourage cooperative (Group) Learning through puzzles, diagrams, coding etc., in the class.
3. Encourage students to ask questions and investigate their own ideas helps improve their
problem-solving skills as well as gain a deeper understanding of academic concepts.
4. Ask at least three HOTS (Higher-order Thinking) questions in the class, which promotes critical
thinking
5. Students are encouraged to do coding based projects to gain knowledge in image processing.
6. Adopt Problem Based Learning (PBL), which fosters students’ Analytical skills, develop thinking
skills such as the ability to evaluate, generalize, and analyze information rather than simply
recall it.
7. Topics will be introduced in multiple representations.
8. Discuss how every concept can be applied to the real world - and when that's possible, it helps
improve the students' understanding.
9. Arrange visits to nearby PSUs such as CAIR(DRDO), NAL, BEL, ISRO, etc., and small-scale
software industries to give industry exposure.
Module-1
Digital Image Fundamentals: What is Digital Image Processing?, Origins of Digital Image Processing,
Examples of fields that use DIP, Fundamental Steps in Digital Image Processing, Components of an
Image Processing System, Elements of Visual Perception, Image Sensing and Acquisition, Image
Sampling and Quantization, Some Basic Relationships Between Pixels.
[Text 1: Chapter 1, Chapter 2: Sections 2.1 to 2.5]
Teaching- Chalk and talk method, PowerPoint Presentation, YouTube videos, Videos on Image
Learning processing applications
Process Self-study topics: Arithmetic and Logical operations
Practical topics: Problems on Basic Relationships Between Pixels.
RBT Level: L1, L2, L3
Module-2
Spatial Domain: Some Basic Intensity Transformation Functions, Histogram Processing,
Fundamentals of Spatial Filtering, Smoothing Spatial Filters, Sharpening Spatial Filters
[Text 1: Chapter 3: Sections 3.2 to 3.6]

19.09.2023
03.10.2022

Teaching- Chalk and talk method, PowerPoint Presentation, YouTube videos and animations of
Learning Intensity Transformation Functions, Histogram Processing, Spatial domain filters.
Process Self-study topics: Point, line and edge detection.
Practical topics: Problems on Intensity Transformation Functions, Histogram, Spatial
domain filters
RBT Level: L1, L2, L3
Module-3
Frequency Domain: Basics of Filtering in the Frequency Domain, Image Smoothing and Image
Sharpening Using Frequency Domain Filters.
[Text 1: Chapter 4: Sections 4.7 to 4.9]
Teaching- Chalk and talk method, PowerPoint Presentation, YouTube videos on frequency domain
Learning filtering, Color image processing.
Process Self-study topics: Basic concept of segmentation.
Practical topics: Problems on Image smoothing and sharpening
RBT Level: L1, L2, L3
Module-4
Color Image Processing: Color Fundamentals, Color Models, Pseudo-color Image Processing.
[Text 1: Chapter 6: Sections 6.1 to 6.3]
Teaching- Chalk and talk method, PowerPoint Presentation, YouTube videos on Color image
Learning processing. Practical topics: Problems on Pseudo-color Image Processing
Process RBT Level: L1, L2, L3
Module-5
Restoration: A model of the Image Degradation/Restoration Process, Noise models, Restoration in the
Presence of Noise Only using Spatial Filtering and Frequency Domain Filtering, Inverse Filtering,
Minimum Mean Square Error (Wiener) Filtering.
[Text 1: Chapter 5: Sections 5.1, to 5.4.3, 5.7, 5.8]
Teaching- Chalk and talk method, PowerPoint Presentation, YouTube videos on Noise models, filters
Learning and its applications.
Process Self-study topics: Linear position invariant degradation, Estimation of degradation
function.
RBT Level: L1, L2, L3
Course outcome (Course Skill Set)
At the end of the course the student will be able to:
1. Understand image formation and the role of human visual system plays in perception of gray and
color image data.
2. Apply image processing techniques in spatial domains.
3. Apply image processing techniques in frequency (Fourier) domains.
4. Conduct independent study and analysis of Image Enhancement techniques.
Assessment Details (both CIE and SEE)
The weightage of Continuous Internal Evaluation (CIE) is 50% and for Semester End Exam (SEE) is 50%.
The minimum passing mark for the CIE is 40% of the maximum marks (20 marks out of 50). A student
shall be deemed to have satisfied the academic requirements and earned the credits allotted to each
subject/ course if the student secures not less than 35% (18 Marks out of 50) in the semester-end
examination (SEE), and a minimum of 40% (40 marks out of 100) in the sum total of the CIE (Continuous
Internal Evaluation) and SEE (Semester End Examination) taken together.

Continuous Internal Evaluation:

Three Unit Tests each of 20 Marks (duration 01 hour)
1. First test at the end of 5th week of the semester
2. Second test at the end of the 10th week of the semester

19.09.2023
03.10.2022

3. Third test at the end of the 15th week of the semester

Two assignments each of 10 Marks
4. First assignment at the end of 4th week of the semester
5. Second assignment at the end of 9th week of the semester
Group discussion/Seminar/quiz any one of three suitably planned to attain the COs and POs for 20
Marks (duration 01 hours)
6. At the end of the 13th week of the semester
The sum of three tests, two assignments, and quiz/seminar/group discussion will be out of 100 marks
and will be scaled down to 50 marks
(to have less stressed CIE, the portion of the syllabus should not be common /repeated for any of the
methods of the CIE. Each method of CIE should have a different syllabus portion of the course).
CIE methods /question paper is designed to attain the different levels of Bloom’s taxonomy as per
the outcome defined for the course.
Semester End Examination:
Theory SEE will be conducted by University as per the scheduled timetable, with common question
papers for the subject (duration 03 hours)
1. The question paper will have ten questions. Each question is set for 20 marks.
2. There will be 2 questions from each module. Each of the two questions under a module (with a
maximum of 3 sub-questions), should have a mix of topics under that module.
The students have to answer 5 full questions, selecting one full question from each module.. Marks scored
out of 100 shall be reduced proportionally to 50 marks

Suggested Learning Resources:

Text Book:
Digital Image Processing- Rafael C Gonzalez and Richard E Woods, PHI, 3 rd Edition, 2010.
Reference Books:
1. Digital Image Processing- S Jayaraman, S Esakkirajan, T Veerakumar, Tata McGraw Hill, 2014.
2. Fundamentals of Digital Image Processing- A K Jain, PHI Learning Private Limited 2014.
Web links and Video Lectures (e-Resources)
 Image databases, https://imageprocessingplace.com/root_files_V3/image_databases.htm
 Student support materials, https://imageprocessingplace.com/root_files_V3/students/students.htm
 NPTEL Course, Introduction to Digital Image Processing, https://nptel.ac.in/courses/117105079
 Computer Vision and Image Processing, https://nptel.ac.in/courses/108103174
 Image Processing and Computer Vision – Matlab and Simulink,
 https://in.mathworks.com/solutions/image-video-processing.html
Activity Based Learning (Suggested Activities in Class)/ Practical Based learning
 Simulink models for Image processing

19.09.2023
03.10.2022

VISVESVARAYA TECHNOLOGICAL UNIVERSITY, BELAGAVI

B.E: Electronics & Communication Engineering / B.E: Electronics & Telecommunication Engineering
NEP, Outcome Based Education (OBE) and Choice Based Credit System (CBCS)
(Effective from the academic year 2021 – 22)
VII Semester

Basic Digital Signal Processing

Course Code 21EC744 CIE Marks 50
Teaching Hours/Week (L:T:P:S) 3:0:0:1 SEE Marks 50
Total Hours of Pedagogy 40 Total Marks 100
Credits 3 Exam Hours 3
Course objectives:
This course will enable students to:
 Preparation: To prepare students with fundamental knowledge/ overview in the field of Signal
Processing
 Core Competence: To equip students with a basic foundation of Signal Processing by delivering
the mathematical description of discrete time signals and systems, classifying signals into different
categories based on their properties, analyzing Linear Time Invariant (LTI)systems in time and
transform domains, basics of FIR & IIR Filter Design
Teaching-Learning Process (General Instructions)
These are sample Strategies, which teacher can use to accelerate the attainment of the various course
outcomes.
1. Lecture method (L) does not mean only traditional lecture method, but different type of teaching
methods may be adopted to develop the outcomes.
2. Show Video/animation films to explain the different concepts Digital Signal Processing.
3. Encourage collaborative (Group) Learning in the class.
4. Ask at least three HOTS (Higher order Thinking) questions in the class, which promotes critical
thinking.
5. Adopt Problem Based Learning (PBL), which fosters students’ Analytical skills, develop thinking skills
such as the ability to evaluate, generalize, and analyze information rather than simply recall it.
6. Topics will be introduced in a multiple representation.
7. Show the different ways to solve the same problem and encourage the students to come up with their
own creative ways to solve them.
8. Discuss how every concept can be applied to the real world - and when that's possible, it helps
improve the students' understanding.
9. Adopt Flipped class technique by sharing the materials / Sample Videos prior to the class and have
discussions on the that topic in the succeeding classes
10. Give Programming Assignments.
Module-1
Signal Definition, Signal Classification, System definition, System classification, for both continuous
time and discrete time, Definition of LTI systems (Chapter1)
Teaching- Chalk and talk method, YouTube videos, Flipped Class Technique, Programming
Learning assignments
Process RBT Level: L1, L2, L3
Module-2
Introduction to Fourier Transform, Fourier Series, Relating the Laplace Transform to Fourier
Transform, Frequency response of continuous time systems (Chapter3)
Teaching- Chalk and talk method, YouTube videos, Flipped Class Technique, Programming
Learning assignments
Process RBT Level: L1, L2, L3

19.09.2023
03.10.2022

Module-3
Frequency response of ideal analog filters, Salient features of Butterworth filters Design and
implementation of Analog Butterworth filters to meet given specifications (Chapter8)
Teaching- Chalk and talk method, YouTube videos, Flipped Class Technique, Programming
Learning assignments
Process RBT Level: L1, L2, L3
Module-4
Sampling Theorem- Statement and proof, converting the analog signal to a digital signal, Practical
sampling, The Discrete Fourier Transform, Properties of DFT, Comparing the frequency response of
analog and digital systems (FFT not included) (Chapter 3,4)
Teaching- Chalk and talk method, YouTube videos, Flipped Class Technique, Programming
Learning assignments
Process RBT Level: L1, L2, L3
Module-5
Definition of FIR and IIR filters, Frequency response of ideal digital filters. Transforming the Analog
Butterworth filter to the Digital IIR Filter using BLT to meet given specifications. Design of Low pass /
High pass FIR Filters using the Window technique, to meet given specifications, Comparing the
designed filter with the desired filter frequency response (Chapter8)
Teaching- Chalk and talk method, Power point presentation, YouTube videos, Flipped Class
Learning Technique, Programming assignments
Process RBT Level: L1, L2, L3
Course outcome (Course Skill Set)
At the end of the course the student will be able to:
1. Understand the continuous time and discrete time signals and systems, in time and frequency domain
2. Apply the concepts of signals and systems to obtain the desired parameter/representation
3. Design analog/digital filters to meet given specifications
4. Design and implement the analog filter using components/suitable simulation tools
5. Design and implement the digital filter (FIR/IIR) using suitable simulation tools, and record the input
and output of the filter for the given audio signal
Assessment Details (both CIE and SEE)
The weightage of Continuous Internal Evaluation (CIE) is 50% and for Semester End Exam (SEE) is 50%.
The minimum passing mark for the CIE is 40% of the maximum marks (20 marks out of 50). A student
shall be deemed to have satisfied the academic requirements and earned the credits allotted to each
subject/ course if the student secures not less than 35% (18 Marks out of 50) in the semester-end
examination (SEE), and a minimum of 40% (40 marks out of 100) in the sum total of the CIE (Continuous
Internal Evaluation) and SEE (Semester End Examination) taken together.
Continuous Internal Evaluation:
Three Unit Tests each of 20 Marks (duration 01 hour)
1. First test at the end of 5th week of the semester
2. Second test at the end of the 10th week of the semester
3. Third test at the end of the 15th week of the semester
Two assignments each of 10 Marks
4. First assignment at the end of 4th week of the semester
5. Second assignment at the end of 9th week of the semester
Group discussion/Seminar/quiz any one of three suitably planned to attain the COs and POs for 20
Marks (duration 01 hours)
6. At the end of the 13th week of the semester
The sum of three tests, two assignments, and quiz/seminar/group discussion will be out of 100 marks
and will be scaled down to 50 marks

19.09.2023
03.10.2022

(to have less stressed CIE, the portion of the syllabus should not be common /repeated for any of the
methods of the CIE. Each method of CIE should have a different syllabus portion of the course).
CIE methods /question paper is designed to attain the different levels of Bloom’s taxonomy as per
the outcome defined for the course.
Semester End Examination:
Theory SEE will be conducted by University as per the scheduled timetable, with common question
papers for the subject (duration 03 hours)
1. The question paper will have ten questions. Each question is set for 20 marks.
2. There will be 2 questions from each module. Each of the two questions under a module (with a
maximum of 3 sub-questions), should have a mix of topics under that module.
The students have to answer 5 full questions, selecting one full question from each module.. Marks scored
out of 100 shall be reduced proportionally to 50 marks

Suggested Learning Resources:

Text Books:
1. ‘Signals and Systems’, Simon Haykin and Barry Van Veen, Wiley.
2. “Fundamentals of Digital Signal Processing”, Lonnie C Ludeman, John Wiley and Sons, 1986.

Reference Books:
3. 'Theory and Application of Digital Signal Processing', Rabiner and Gold
4. ‘Signals and Systems’, Schaum’s Outline series
5. ‘Digital Signal Processing’, Schaum’s Outline series
Web links and Video Lectures (e-Resources)
By Prof. S C Dutta Roy, IIT Delhi
https://nptel.ac.in/courses/117102060
Activity Based Learning (Suggested Activities in Class)/ Practical Based learning
 Programming Assignments / Mini Projects can be given to improve programming skills

19.09.2023
03.10.2022

VISVESVARAYA TECHNOLOGICAL UNIVERSITY, BELAGAVI

B.E: Electronics & Communication Engineering / B.E: Electronics & Telecommunication Engineering
NEP, Outcome Based Education (OBE) and Choice Based Credit System (CBCS)
(Effective from the academic year 2021 – 22)
VII Semester

E-waste Management
Course Code 21EC745 CIE Marks 50
Teaching Hours/Week (L:T:P:S) 3:0:0:1 SEE Marks 50
Total Hours of Pedagogy 40 Total Marks 100
Credits 3 Exam Hours 3
Course objectives:
 Current Status: According to a report on e-waste presented by the United Nations (UN) in World
Economic Forum on January 24, 2019, the waste stream reached 48.5 MT in 2018. With such a large
quantity of e-waste being generated each year, the future of e-waste recycling in India looks pretty
bright. The E-waste (Management) Rules, 2016, enacted on October 1, 2017, added over 21 products
(Schedule-I) under the purview of the rule.
 Purview: This course covers an extensive review of e-waste management in India. With a focus on
the evolution of legal frameworks in India and the world, it presents impacts and outcomes;
challenges and opportunities; and management strategies and practices to deal with e-waste. It also
includes a survey of pan-India initiatives and trajectories of law-driven initiatives for effective e-
waste management along with responses from industries and producers.
 Scope: There is a considerable scope for e-waste recycling in India. It is not only a solution to help
mitigate e-waste management issues, but it also helps to generate employment. With the rise in e-
waste recycling plants, the demand for employees with all levels of qualification and skills also
increases.
Teaching-Learning Process (General Instructions)
These are sample Strategies, which teacher can use to accelerate the attainment of the various course
outcomes.
1. Lecture method (L) does not mean only the traditional lecture method, but a different type of teaching
method may be adopted to develop the outcomes.
2. Show Video/animation films to explain the functioning of various techniques.
3. Encourage collaborative (Group) Learning in the class
4. Ask at least three HOTS (Higher-order Thinking) questions in the class, which promotes critical
thinking
5. Adopt Problem Based Learning (PBL), which fosters students’ Analytical skills, develop thinking skills
such as the ability to evaluate, generalize, and analyze information rather than simply recall it.
6. Topics will be introduced in multiple representations.
7. Discuss how every concept can be applied to the real world - and when that's possible, it helps to
improve the students' understanding.
8. Arrange visits to nearby industries to give industry exposure.
Module-1
Sustainable development and e-waste management: Importance of electrical and electronic
equipment in a nation's development, and e-waste as toxic companion of digital era, I: Let's understand
e-waste, II: E-waste statistics: quantities, collection and recycling, E-waste categories and harmonising
statistics, III: An overview on status of e-waste related legislation across the globe; IV: UN initiatives for
e-waste management: creating partnerships and achieving Agenda 2030; V: Indian scenario: e-waste
generation, collection and recycling.
Teaching-Learning Chalk and talk method, YouTube videos.
Process RBT Level: L1, L2
Module-2
Extended producer responsibility: a mainstay for e-waste management: Evolution of concept of
‘extended producer responsibility’, EPR applied for waste management and extended for e-waste

19.09.2023
03.10.2022

management, EPR: goals, implementation, and challenges for e-waste management, EPR implemented
for e-waste management under the existing regulatory frameworks in different countries, Role of a
PRO prescribed in regulatory framework, Considerations for successful implementation of EPR,
Challenges in implementation of EPR for e-waste management, Impact of EPR, EPR and e-waste
management in India.
Toxicity and impacts on environment and human health: Toxicity, recycling, and regulations, I:
Environmental concerns, II: Human health concerns.
Teaching-Learning Chalk and talk method, PowerPoint Presentation, More examples relating to
Process applications. RBT Level: L1, L2, L3
Module-3
Treating e-waste, resource efficiency, and circular economy: Safe environment, resource use, and
circular economy, Circular economy: recycling, resource recovery, and resource efficiency, Potentials
of urban mining in circular economy, Recycling and resource efficiency related challenges to the
circular economy, Urban mining, recycling, resource use, resource efficiency, and circular economy in
India.
E-waste management through legislations in India: I: Historical backdrop of regulatory regime for
e-waste in India, II: E-waste (management) Rules, 2016 and E-waste (management) Amendment Rules,
2018, III: Analysing performance of EPR and CPCB as regulatory mechanisms, IV: Legal cases and
judicial directives.
Teaching-Learning Chalk and talk method, PowerPoint Presentation
Process RBT Level: L1, L2, L3
Module-4
Strategies and initiatives for dealing with e-waste in India: I: Overview of pan-India initiatives for
dealing with e-waste during 2000 and 2012, II: Law-driven e-waste management – initiatives by the
government, non-government agencies, and judiciary.
Teaching-Learning Chalk and talk method, PowerPoint Presentation.
Process RBT Level: L1, L2, L3
Module-5
Moving towards horizons: I: Legal and judicial domain, II: Economic concerns, III: Environment
concerns, IV: Recycling culture/recycling society.
Teaching-Learning Chalk and talk method, PowerPoint Presentation, More examples relating to
Process applications.
RBT Level: L1, L2, L3
Course outcome (Course Skill Set)
At the end of the course the student will be able to:
1. Understand the existing discourse on e-waste and its management, statistics across the world,
opportunities, and challenges w.r.t. regulatory framework, SDGs, CE, and LCIA (Life Cycle Impact
Assessment) and MFA (Material Flow Analysis), Indian scenario.
2. Describe EPR, a regulatory framework for achieving specified goals across different countries and
impacts on environment and human health.
3. Explain themes in the context of resource use and sustainable development. Urban mining, informal
sector operations and need for resource use policy, financial support for recycling infrastructure
building, etc. in Indian context and also explain to what extent – different aspects of e-waste
management have been incorporated in the existing regulatory framework in comparison with
international legislatures.
4. Identify and infer pan-Indian initiatives dealing with e‑waste management, ranging from building
knowledge base through research and social action by different stakeholders to technological
and legal advancements, and industrial initiatives. Analyse roadmap for the Agenda 2030.
5. Use opportunities and challenges around four domains: legal and judicial domain; economic
concerns; recycling culture/society; and environment concerns.

19.09.2023
03.10.2022

Assessment Details (both CIE and SEE)

The weightage of Continuous Internal Evaluation (CIE) is 50% and for Semester End Exam (SEE) is 50%.
The minimum passing mark for the CIE is 40% of the maximum marks (20 marks out of 50). A student
shall be deemed to have satisfied the academic requirements and earned the credits allotted to each
subject/ course if the student secures not less than 35% (18 Marks out of 50) in the semester-end
examination (SEE), and a minimum of 40% (40 marks out of 100) in the sum total of the CIE (Continuous
Internal Evaluation) and SEE (Semester End Examination) taken together.
Continuous Internal Evaluation:
Three Unit Tests each of 20 Marks (duration 01 hour)
1. First test at the end of 5th week of the semester
2. Second test at the end of the 10th week of the semester
3. Third test at the end of the 15th week of the semester
Two assignments each of 10 Marks
4. First assignment at the end of 4th week of the semester
5. Second assignment at the end of 9th week of the semester
Group discussion/Seminar/quiz any one of three suitably planned to attain the COs and POs for 20
Marks (duration 01 hours)
6. At the end of the 13th week of the semester
The sum of three tests, two assignments, and quiz/seminar/group discussion will be out of 100 marks
and will be scaled down to 50 marks
(to have less stressed CIE, the portion of the syllabus should not be common /repeated for any of the
methods of the CIE. Each method of CIE should have a different syllabus portion of the course).
CIE methods /question paper is designed to attain the different levels of Bloom’s taxonomy as per
the outcome defined for the course.
Semester End Examination:
Theory SEE will be conducted by University as per the scheduled timetable, with common question
papers for the subject (duration 03 hours)
1. The question paper will have ten questions. Each question is set for 20 marks.
2. There will be 2 questions from each module. Each of the two questions under a module (with a
maximum of 3 sub-questions), should have a mix of topics under that module.
The students have to answer 5 full questions, selecting one full question from each module.. Marks scored
out of 100 shall be reduced proportionally to 50 marks

Suggested Learning Resources:

Text Book:
Varsha Bhagat Gangulay, ‘E-Waste Management’, Taylor and Francis, 2022.
Web links and Video Lectures (e-Resources)
•https://link.springer.com/book/10.1007/978-3-030-14184-4
•https://rajyasabha.nic.in/rsnew/publication_electronic/E-Waste_in_india.pdf
•https://greene.gov.in/wp-content/uploads/2018/01/E-waste-Vol-II-E-waste-Management-Manual.pdf
•https://nptel.ac.in/courses/105105169
Activity Based Learning (Suggested Activities in Class)/ Practical Based learning
• Groups can be made to conduct a survey on the present scenario of India and top 5 countries facing
ewaste management challenges.
• Industry visits to give an exposure of the e waste management process and also business.
• Case studies to develop e-waste management models.
• Survey of few e-waste management companies can be carried out and submit report.

19.09.2023
03.10.2022

VISVESVARAYA TECHNOLOGICAL UNIVERSITY, BELAGAVI

B.E: Electronics & Communication Engineering / B.E: Electronics & Telecommunication Engineering
NEP, Outcome Based Education (OBE) and Choice Based Credit System (CBCS)
(Effective from the academic year 2021 – 22)
VII Semester

Advanced Design Tools for VLSI

Course Code 21EC721 CIE Marks 50
Teaching Hours/Week (L:T:P:S) 3:0:0:1 SEE Marks 50
Total Hours of Pedagogy 40 Total Marks 100
Credits 3 Exam Hours 3
Course objectives:
 Impart knowledge of EDA tools and methodology for FPGA
 Learn principles of IP core for FPGA and embedded systems
 Infer the concept of machine learning in fabrication and physical design
Teaching-Learning Process (General Instructions)
The sample strategies, which the teacher can use to accelerate the attainment of the various course
outcomes are listed in the following:
1. Lecture method (L) does not mean only the traditional lecture method, but a different type of
teaching method may be adopted to develop the outcomes.
2. Arrange visits to nearby PSUs and small-scale communication industries.
3. Show Video/animation films to explain the functioning of various techniques.
4. Encourage collaborative (Group) Learning in the class
5. Ask at least three HOTS (Higher-order Thinking) questions in the class, which promotes critical
thinking
6. Adopt Problem Based Learning (PBL), which fosters students’ Analytical skills, develop thinking
skills such as the ability to evaluate, generalize, and analyze information rather than simply recall
it.
7. Topics will be introduced in multiple representations.
8. Show the different ways to solve the same problem and encourage the students to come up with
their own creative ways to solve them.
9. Discuss how every concept can be applied to the real world - and when that's possible, it helps
improve the students' understanding.
Module-1
Introduction: Introduction, Prologue, EDA: From Methodologies, Algorithms, Tools to Integrated
Circuits and Systems, EDA from Halcyon’s Days to the Blooming Paradigm of Chip Industry, Categories
of the EDA Tools, Quo Vadis, EDA? The Challenges and Opportunities, Designing the System as SoC
Using the Soft IP Cores, Types of IP Cores, Design Issues Pertaining to the Soft IP Cores
Text Book1: 1.1 to 1.5, 1.7 to 1.10

Development of FPGA Based Network on Chip for Circumventing Spam: Introduction, Conception
of the Spam Mail, FPGA Based Network on Chip for Circumventing Spam, Tools Infrastructure and
Design Flow, Introducing Hardware-Software Co-design, Hardware Software Co-design, Framework
Proposed in the Present Case Study, Description of System at Higher Level, Resolving the System a Step
Down, System Design, Development of Soft IP Core of Bloom Filter, Presenting System Design of Purely
Software Modules, Integrating of the Hardware-Software Modules Using EDK
Text Book1: 2.1 to 2.13
Teaching-Learning Chalk and talk method, , PowerPoint Presentation, YouTube videos
Process RBT Level: L1, L2, L3
Module-2
Analog Front End and FPGA Based Soft IP Core for ECG Logger: Prior Art, The Very Rationale of the
System, Analog Front End of the Setup, VHDL Implementation of the ECG Soft IP Core, ModelSim
Simulation Results, Synthesis Results Using Mentor Graphics Tool, Monitoring the ECG Using MODEM

19.09.2023
03.10.2022

Based Setup, ECG Signal Reconstruction Mechanism at the Hospital End, VHDL Listing for Driving the
Analog Demultiplexer and Serial DAC from Spartan-3E FPGA, Discussion Regarding the VHDL
Implementation, ModelSim Simulation Results, Synthesis Results Using Mentor Graphics Tool:
Leonardo Spectrum.
Text Book1: 3.1 to 3.12
Teaching-Learning Chalk and talk method/Power point presentation
Process RBT Level: L1, L2, L3
Module-3
FPGA Based Multifunction Interface for Embedded Applications: Introduction, Universal FPGA
Based Interface for High End Embedded Applications, Soft IP Core for the LCD Interface, Soft IP Core
for the DAC Interface, Handel C Listing of the Soft IP Core for the DAC Interface, Soft IP Core for the
Linear Tech LTC6912-1 Dual Amp, Soft IP Core for the ADC Interface, Soft IP Core for the VGA Interface,
Soft IP Core for the Keyboard Interface, Triangular Wave Generator Using DAC
Text Book1: 4.1 - 4.10
Teaching-Learning Chalk and talk method, Power point presentation
Process RBT Level: L1, L2, L3
Module-4
Machine Learning for Compact Lithographic Process Models: Introduction, The Lithographic
Patterning Process, Machine Learning of Compact Process Models, Neural Network Compact
Patterning Models. Text Book2: 2.1 to 2.4

Machine Learning for Mask Synthesis: Introduction, Machine Learning-Guided OPC, Machine
Learning-Guided EPC. Text Book2: 3.1 to 3.4
Teaching-Learning Chalk and talk method, Power point presentation
Process RBT Level: L1, L2, L3
Module-5
Machine Learning in Physical Verification, Mask Synthesis, and Physical Design: Introduction,
Machine Learning in Physical Verification, Machine Learning in Mask Synthesis, Machine Learning in
Physical Design. Text Book2: 4.1 to 4.4
Teaching-Learning Chalk and talk method, Power point presentation
Process RBT Level: L1, L2, L3
Course outcome (Course Skill Set)
At the end of the course the student will be able to:
1. Demonstrate the EDA methodologies and Tools for FPGA based NoC
2. Interpretation of soft core for ECG logger
3. Interfacing of DAC for embedded Application
4. Interpretation of Machine Learning for fabrication
5. Interpretation of ML in physical design
Assessment Details (both CIE and SEE)
The weightage of Continuous Internal Evaluation (CIE) is 50% and for Semester End Exam (SEE) is 50%.
The minimum passing mark for the CIE is 40% of the maximum marks (20 marks out of 50). A student
shall be deemed to have satisfied the academic requirements and earned the credits allotted to each
subject/ course if the student secures not less than 35% (18 Marks out of 50) in the semester-end
examination (SEE), and a minimum of 40% (40 marks out of 100) in the sum total of the CIE (Continuous
Internal Evaluation) and SEE (Semester End Examination) taken together.

Continuous Internal Evaluation:

Three Unit Tests each of 20 Marks (duration 01 hour)
1. First test at the end of 5th week of the semester

19.09.2023
03.10.2022

2. Second test at the end of the 10th week of the semester

3. Third test at the end of the 15th week of the semester
Two assignments each of 10 Marks
4. First assignment at the end of 4th week of the semester
5. Second assignment at the end of 9th week of the semester
Group discussion/Seminar/quiz any one of three suitably planned to attain the COs and POs for 20
Marks (duration 01 hours)
6. At the end of the 13th week of the semester
The sum of three tests, two assignments, and quiz/seminar/group discussion will be out of 100 marks
and will be scaled down to 50 marks
(to have less stressed CIE, the portion of the syllabus should not be common /repeated for any of the
methods of the CIE. Each method of CIE should have a different syllabus portion of the course).
CIE methods /question paper is designed to attain the different levels of Bloom’s taxonomy as per
the outcome defined for the course.
Semester End Examination:
Theory SEE will be conducted by University as per the scheduled timetable, with common question
papers for the subject (duration 03 hours)
1. The question paper will have ten questions. Each question is set for 20 marks.
2. There will be 2 questions from each module. Each of the two questions under a module (with a
maximum of 3 sub-questions), should have a mix of topics under that module.
The students have to answer 5 full questions, selecting one full question from each module.. Marks scored
out of 100 shall be reduced proportionally to 50 marks
Suggested Learning Resources:
Text Books:
1. Rajanish K Kamat, Santosh A Shinde, Pawan K Gaikwad, Hansraj Guhilot, ‘Harnessing VLSI System
Design with EDA Tools’, Springer, 2012.
2. Ibrahim (Abe) M Elfadel, Duane S Boning, Xin Li, ‘Machine Learning in VLSI Computer-Aided Design’,
Springer, 2011.

Web links and Video Lectures (e-Resources)

 https://www.digimat.in/nptel/courses/video/117101004/L01.html
 https://www.youtube.com/watch?v=zC5b5_7oRKk

19.09.2023
03.10.2022

VISVESVARAYA TECHNOLOGICAL UNIVERSITY, BELAGAVI

B.E: Electronics & Communication Engineering / B.E: Electronics & Telecommunication Engineering
NEP, Outcome Based Education (OBE) and Choice Based Credit System (CBCS)
(Effective from the academic year 2021 – 22)
VII Semester

Digital Image Processing

Course Code 21EC722 CIE Marks 50
Teaching Hours/Week (L:T:P:S) 3:0:0:1 SEE Marks 50
Total Hours of Pedagogy 40 Total Marks 100
Credits 3 Exam Hours 3
Course objectives:
 Understand the fundamentals of digital image processing.
 Understand the image transform used in digital image processing.
 Understand the image enhancement techniques in spatial domain used in digital image processing.
 Understand the Color Image Processing and frequency domain enhancement techniques in digital
image processing.
 Understand the image restoration techniques and methods used in digital image processing.
Teaching-Learning Process (General Instructions)
These are sample Strategies, which teacher can use to accelerate the attainment of the various course
outcomes.
1. Show Video/animation films to explain the functioning of various image processing concepts.
2. Encourage cooperative (Group) Learning through puzzles, diagrams, coding etc., in the class.
3. Encourage students to ask questions and investigate their own ideas helps improve their
problem-solving skills as well as gain a deeper understanding of academic concepts.
4. Ask at least three HOTS (Higher-order Thinking) questions in the class, which promotes critical
thinking
5. Students are encouraged to do coding based projects to gain knowledge in image processing.
6. Adopt Problem Based Learning (PBL), which fosters students’ Analytical skills, develop thinking
skills such as the ability to evaluate, generalize, and analyze information rather than simply
recall it.
7. Topics will be introduced in multiple representations.
8. Discuss how every concept can be applied to the real world - and when that's possible, it helps
improve the students' understanding
9. Arrange visits to nearby PSUs such as CAIR (DRDO), NAL, BEL, ISRO, etc., and small-scale
software industries to give industry exposure.

Module-1
Digital Image Fundamentals: What is Digital Image Processing?, Origins of Digital Image Processing,
Examples of fields that use DIP, Fundamental Steps in Digital Image Processing, Components of an
Image Processing System, Elements of Visual Perception, Image Sensing and Acquisition, Image
Sampling and Quantization, Some Basic Relationships Between Pixels.
[Text 1: Chapter 1, Chapter 2: Sections 2.1 to 2.5]
Teaching- Chalk and talk method, PowerPoint Presentation, YouTube videos, Videos on Image
Learning processing applications
Process Self-study topics: Arithmetic and Logical operations
Practical topics: Problems on Basic Relationships Between Pixels.
RBT Level: L1, L2, L3

19.09.2023
03.10.2022

Module-2
Image Transforms: Introduction, Two-Dimensional Orthogonal and Unitary Transforms, Properties of
Unitary Transforms, Two-Dimensional DFT, cosine Transform, Haar Transform.
Text 2: Chapter 5: Sections 5.1 to 5.3, 5.5, 5.6, 5.9]
Teaching- Chalk and talk method, PowerPoint Presentation, YouTube videos of various
Learning transformation techniques and related applications.
Process Self-study topics: Sine transforms, Hadamard transforms, KL transform, Slant transform.
Practical topics: Problems on DFT and DCT
RBT Level: L1, L2, L3
Module-3
Spatial Domain: Some Basic Intensity Transformation Functions, Histogram Processing,
Fundamentals of Spatial Filtering, Smoothing Spatial Filters, Sharpening Spatial Filters
[Text: Chapter 3: Sections 3.2 to 3.6]
Teaching- Chalk and talk method, PowerPoint Presentation, YouTube videos and animations of
Learning Intensity Transformation Functions, Histogram Processing, Spatial domain filters.
Process Self-study topics: Point, line and edge detection.
Practical topics: Problems on Intensity Transformation Functions, Histogram, Spatial
domain filters
RBT Level: L1, L2, L3
Module-4
Frequency Domain: Basics of Filtering in the Frequency Domain, Image Smoothing and Image
Sharpening Using Frequency Domain Filters.
Color Image Processing: Color Fundamentals, Color Models, Pseudo-color Image Processing.
[Text 1: Chapter 4: Sections 4.7 to 4.9 and Chapter 6: Sections 6.1 to 6.3]
Teaching- Chalk and talk method, PowerPoint Presentation, YouTube videos on frequency domain
Learning filtering, Color image processing.
Process Self-study topics: Basic concept of segmentation.
Practical topics: Problems on Pseudo-color Image Processing
RBT Level: L1, L2, L3
Module-5
Restoration: A model of the Image Degradation/Restoration Process, Noise models, Restoration in the
Presence of Noise Only using Spatial Filtering and Frequency Domain Filtering, Inverse Filtering,
Minimum Mean Square Error (Wiener) Filtering.
[Text 1: Chapter 5: Sections 5.1, to 5.4.3, 5.7, 5.8]
Teaching- Chalk and talk method, PowerPoint Presentation, YouTube videos on Noise models, filters
Learning and its applications.
Process Self-study topics: Linear position invariant degradation, Estimation of degradation
function.
RBT Level: L1, L2, L3
Course outcomes (Course Skill Set)
At the end of the course the student will be able to:
1. Understand image formation and the role of human visual system plays in perception of gray and
color image data.
2. Compute various transforms on digital images.
3. Conduct independent study and analysis of Image Enhancement techniques.
4. Apply image processing techniques in frequency (Fourier) domain.
5. Design image restoration techniques.

19.09.2023
03.10.2022

Assessment Details (both CIE and SEE)

The weightage of Continuous Internal Evaluation (CIE) is 50% and for Semester End Exam (SEE) is 50%.
The minimum passing mark for the CIE is 40% of the maximum marks (20 marks out of 50). A student
shall be deemed to have satisfied the academic requirements and earned the credits allotted to each
subject/ course if the student secures not less than 35% (18 Marks out of 50) in the semester-end
examination (SEE), and a minimum of 40% (40 marks out of 100) in the sum total of the CIE (Continuous
Internal Evaluation) and SEE (Semester End Examination) taken together.
Continuous Internal Evaluation:
Three Unit Tests each of 20 Marks (duration 01 hour)
1. First test at the end of 5th week of the semester
2. Second test at the end of the 10th week of the semester
3. Third test at the end of the 15th week of the semester
Two assignments each of 10 Marks
4. First assignment at the end of 4th week of the semester
5. Second assignment at the end of 9th week of the semester
Group discussion/Seminar/quiz any one of three suitably planned to attain the COs and POs for 20
Marks (duration 01 hours)
6. At the end of the 13th week of the semester
The sum of three tests, two assignments, and quiz/seminar/group discussion will be out of 100 marks
and will be scaled down to 50 marks
(to have less stressed CIE, the portion of the syllabus should not be common /repeated for any of the
methods of the CIE. Each method of CIE should have a different syllabus portion of the course).
CIE methods /question paper is designed to attain the different levels of Bloom’s taxonomy as per
the outcome defined for the course.
Semester End Examination:
Theory SEE will be conducted by University as per the scheduled timetable, with common question
papers for the subject (duration 03 hours)
1. The question paper will have ten questions. Each question is set for 20 marks.
2. There will be 2 questions from each module. Each of the two questions under a module (with a
maximum of 3 sub-questions), should have a mix of topics under that module.
The students have to answer 5 full questions, selecting one full question from each module.. Marks scored
out of 100 shall be reduced proportionally to 50 marks

Suggested Learning Resources:

Text Books:
1. Digital Image Processing- Rafael C Gonzalez and Richard E Woods, PHI, 3rd Edition 2010.
2. Fundamentals of Digital Image Processing- A K Jain, PHI Learning Private Limited 2014.
Reference Book:
Digital Image Processing- S Jayaraman, S Esakkirajan, T Veerakumar, Tata McGraw Hill, 2014.
Web links and Video Lectures (e-Resources)
 Image databases, https://imageprocessingplace.com/root_files_V3/image_databases.htm
 Student support materials,
https://imageprocessingplace.com/root_files_V3/students/students.htm
 NPTEL Course, Introduction to Digital Image Processing, https://nptel.ac.in/courses/117105079
 Computer Vision and Image Processing, https://nptel.ac.in/courses/108103174
 Image Processing and Computer Vision – Matlab and Simulink,
 https://in.mathworks.com/solutions/image-video-processing.html
Activity Based Learning (Suggested Activities in Class)/ Practical Based learning
 Verilog /VHDL coding for Image manipulation.
 Simulink models for Image processing.

19.09.2023
03.10.2022

VISVESVARAYA TECHNOLOGICAL UNIVERSITY, BELAGAVI

B.E: Electronics & Communication Engineering / B.E: Electronics & Telecommunication Engineering
NEP, Outcome Based Education (OBE) and Choice Based Credit System (CBCS)
(Effective from the academic year 2021 – 22)
VII Semester

DSP Algorithms & Architecture

Course Code 21EC723 CIE Marks 50
Teaching Hours/Week (L:T:P:S) 3:0:0:1 SEE Marks 50
Total Hours of Pedagogy 40 Total Marks 100
Credits 3 Exam Hours 3
Course objectives:
This course will enable the students to
 Understand the concepts of digital signal processing techniques.
 Understand the computational building blocks of DSP processors and its speed issues.
 Understand the various addressing modes, peripherals, interrupts and pipelining structure of the
TMS320C54xx processor.
 Learn how to interface the external devices to the TMS320C54xx processor in various modes.
 Understand DSP algorithms and applications with their implementation using TMS320C54xx
processor.
Teaching-Learning Process (General Instructions)
The sample strategies, which the teacher can use to accelerate the attainment of the various course
outcomes are listed in the following:
1. Lecture method (L) does not mean only the traditional lecture method, but a different type of
teaching method may be adopted to develop the outcomes.
2. Show Video/animation films to explain the functioning of various techniques.
3. Encourage collaborative (Group) Learning in the class
4. Ask at least three HOTS (Higher-order Thinking) questions in the class, which promotes critical
thinking
5. Adopt Problem Based Learning (PBL), which fosters students’ Analytical skills, develop thinking
skills such as the ability to evaluate, generalize, and analyze information rather than simply recall
it.
6. Topics will be introduced in multiple representations.
7. Show the different ways to solve the same problem and encourage the students to come up with
their own creative ways to solve them.
8. Discuss how every concept can be applied to the real world - and when that's possible, it helps
improve the students' understanding.
Module-1
Introduction to Digital Signal Processing: Introduction, A Digital Signal – Processing system, Major
features of programmable Digital signal processors, The Sampling Process, Discrete Time Sequences,
Discrete Fourier Transform (DFT) and Fast Fourier Transform (FFT), Linear Time-Invariant Systems,
Digital Filters, Decimation and Interpolation.
Section 1.3, 2.1 to 2.8 of Text 1
Teaching-Learning Chalk and talk method, Power point presentation
Process RBT Level: L1, L2, L3
Module-2
Architectures for Programmable Digital Signal Processing Devices: Introduction, Basic
Architectural Features, DSP Computational Building Blocks, Bus Architecture and Memory, Data
Addressing Capabilities, Address Generation Unit, Programmability and Program Execution, Speed
Issues, Features for External Interfacing.
Section 4.1 to 4.9 of Text 1
Teaching-Learning Chalk and talk method, Power point presentation

19.09.2023
03.10.2022

Process RBT Level: L1, L2, L3

Module-3
Programmable Digital Signal Processors: Introduction, Commercial Digital Signal-processing
Devices, Data Addressing Modes of TMS32OC54XX, Memory Space of TMS32OC54xx Processors,
Program Control. Detail Study of TMS320C54X & 54xx Instructions and Programming, On – Chip
Peripherals, Interrupts of TMS32OC54XX Processors, Pipeline Operation of TMS32OC54xx Processor.
Section 5.1 to 5.10 of Text 1
Teaching-Learning Chalk and talk method, Power point presentation
Process RBT Level: L1, L2, L3
Module-4
Implementation of Basic DSP Algorithms: Introduction, The Q – notation, FIR Filters, IIR Filters,
Interpolation and Decimation Filters (one example in each case).
Implementation of FFT Algorithms: Introduction, An FFT Algorithm for DFT Computation, Overflow
and Scaling, Bit – Reversed Index. Generation & Implementation on the TMS32OC54xx.
Section 7.1 to 7.6 and 8.1 to 8.6 of Text 1
Teaching-Learning Chalk and talk method, Power point presentation
Process RBT Level: L1, L2, L3
Module-5
Interfacing Memory and Parallel I/O Peripherals to Programmable DSP Devices: Introduction,
Memory Space Organization, External Bus Interfacing Signals. Memory Interface, Parallel I/O Interface,
Programmed I/O, Interrupts and I/O Direct Memory Access (DMA).
Interfacing and Applications of DSP Processors: Introduction, Synchronous Serial Interface, A
CODEC Interface Circuit, DSP Based Bio-telemetry Receiver, A Speech Processing System, An Image
Processing System.
Section 9.1 to 9.8, 10.1 to 10.5 and11.1 to 11.5 of Text 1
Teaching-Learning Chalk and talk method, Power point presentation
Process RBT Level: L1, L2, L3
Course outcome (Course Skill Set)
At the end of the course the student will be able to:
1. Comprehend the knowledge & concepts of digital signal processing techniques.
2. Apply knowledge of various types of addressing modes, interrupts, peripherals and pipelining
structure of TMS320C54xx processor.
3. Develop assembly language programs to implement FIR, IIR filters and FFT algorithms.
4. Build the Applications on Programmable DSP devices.
Assessment Details (both CIE and SEE)
The weightage of Continuous Internal Evaluation (CIE) is 50% and for Semester End Exam (SEE) is 50%.
The minimum passing mark for the CIE is 40% of the maximum marks (20 marks out of 50). A student
shall be deemed to have satisfied the academic requirements and earned the credits allotted to each
subject/ course if the student secures not less than 35% (18 Marks out of 50) in the semester-end
examination (SEE), and a minimum of 40% (40 marks out of 100) in the sum total of the CIE (Continuous
Internal Evaluation) and SEE (Semester End Examination) taken together.
Continuous Internal Evaluation:
Three Unit Tests each of 20 Marks (duration 01 hour)
1. First test at the end of 5th week of the semester
2. Second test at the end of the 10th week of the semester
3. Third test at the end of the 15th week of the semester
Two assignments each of 10 Marks
4. First assignment at the end of 4th week of the semester
5. Second assignment at the end of 9th week of the semester
Group discussion/Seminar/quiz any one of three suitably planned to attain the COs and POs for 20

19.09.2023
03.10.2022

Marks (duration 01 hours)

6. At the end of the 13th week of the semester
The sum of three tests, two assignments, and quiz/seminar/group discussion will be out of 100 marks
and will be scaled down to 50 marks
(to have less stressed CIE, the portion of the syllabus should not be common /repeated for any of the
methods of the CIE. Each method of CIE should have a different syllabus portion of the course).
CIE methods /question paper is designed to attain the different levels of Bloom’s taxonomy as per
the outcome defined for the course.
Semester End Examination:
Theory SEE will be conducted by University as per the scheduled timetable, with common question
papers for the subject (duration 03 hours)
1. The question paper will have ten questions. Each question is set for 20 marks.
2. There will be 2 questions from each module. Each of the two questions under a module (with a
maximum of 3 sub-questions), should have a mix of topics under that module.
The students have to answer 5 full questions, selecting one full question from each module.. Marks scored
out of 100 shall be reduced proportionally to 50 marks

Suggested Learning Resources:

Text Book:
“Digital Signal Processing”, Avatar Singh and S Srinivasan, Thomson Learning, 2004
Reference Books:
1. “Digital Signal Processing: A practical approach”, Ifeachor E C, Jervis B. W Pearson-Education, PHI,
2002.
2. “Digital Signal Processors”, B Venkataramani and M Bhaskar, TMH, 2nd Ed., 2010
3. “Architectures for Digital Signal Processing”, Peter Pirsch, John Wiley.

19.09.2023
03.10.2022

VISVESVARAYA TECHNOLOGICAL UNIVERSITY, BELAGAVI

B.E: Electronics & Communication Engineering / B.E: Electronics & Telecommunication Engineering
NEP, Outcome Based Education (OBE) and Choice Based Credit System (CBCS)
(Effective from the academic year 2021 – 22)
VII Semester

Biomedical Signal Processing

Course Code 21EC724 CIE Marks 50
Teaching Hours/Week (L:T:P:S) 3:0:0:1 SEE Marks 50
Total Hours of Pedagogy 40 Total Marks 100
Credits 3 Exam Hours 3
Course objectives:
This course will enable students to:
 Possess the basic mathematical, scientific and computational skills necessary to analyse ECG and
EEG signals.
 Apply classical and modern filtering and compression techniques for ECG and EEG signals.
 Develop a thorough understanding on basics of ECG and EEG feature extraction.
Teaching-Learning Process (General Instructions)
The sample strategies, which the teacher can use to accelerate the attainment of the various course
outcomes are listed in the following:
1. Lecture method (L) does not mean only the traditional lecture method, but a different type of
teaching method may be adopted to develop the outcomes.
2. Show Video/animation films to explain the functioning of various techniques.
3. Encourage collaborative (Group) Learning in the class
4. Ask at least three HOTS (Higher-order Thinking) questions in the class, which promotes critical
thinking
5. Discuss how every concept can be applied to the real world - and when that's possible, it helps
improve the students' understanding.
Module-1
Introduction to Biomedical Signals: The nature of Biomedical Signals, Examples of Biomedical Signals,
Objectives of Biomedical Signal analysis, Difficulties in Biomedical Signal analysis.
(Text-1: 1.1, 1.2, 1.3, 1.4)
Electrocardiography: Techniques used in electrocardiography, ECG Electrodes, the cardiac equivalent
generator, genesis of the ECG, the standard and augmented limb leads, 12 lead ECG, the
vectorcardiogram, ECG signal characteristics.
(Text-2: 2.1, 2.1.1, 2.1.2, 2.1.3, 2.1.4, 2.1.5, 2.2.1, 2.2.2, 2.3)
Signal Conversion: Simple signal conversion systems, Conversion requirements for biomedical signals,
Signal converter characteristics, D to A converters, A to D converters, Sample and Hold circuit, Analog
Multiplexer, Amplifiers
(Text-2: 3.2, 3.3, 3.4.1, 3.4.2, 3.4.3, 3.4.4, 3.4.5, 3.4.6).
Teaching-Learning Chalk and talk method, PowerPoint Presentation, YouTube videos
Process RBT Level: L1, L2, L3
Module-2
Signal Averaging: Basics of signal averaging, Signal averaging as a digital filter, a typical averager,
Software for signal averaging, Limitations of signal averaging.
(Text-2: 9.1, 9.2, 9.3, 9.4, 9.5).
Adaptive Filters: Principal noise canceller model, 60-Hz adaptive cancelling using a sine wave model,
Applications: Maternal ECG in fetal ECG, Cardiogenic artifact, detection of ventricular fibrillation and
tachycardia. (Text-2: 8.1, 8.2, 8.3.1, 8.3.2, 8.3.3).
Teaching-Learning Chalk and talk method, PowerPoint Presentation, YouTube videos

19.09.2023
03.10.2022

Process RBT Level: L1, L2, L3

Module-3
Data Reduction Techniques: Introduction, Turning point algorithm, AZTEC algorithm, Fano algorithm,
Huffman coding: Static coding, Modified coding, Adaptive coding, Residual differencing, Runlength
coding.
(Text-2: 10.1, 10.2, 10.3, 10.4.1, 10.4.2, 10.4.3, 10.4.4, 10.4.5).
Time and Frequency domain techniques: The Fourier transform for a discrete nonperiodic and
periodic signals, the Fast Fourier transform, Correlation in time domain and in frequency domain,
Convolution in time domain and in frequency domain, Power spectrum estimation: Parseval's theorem
(Text-2: 11.1.1, 11.1.2, 11.1.3, 11.2.1, 11.2.2, 11.2.3, 11.3.1, 11.3.2, 11.3.3, 11.4.1)
Teaching-Learning Chalk and talk method, PowerPoint Presentation, YouTube videos
Process RBT Level: L1, L2, L3
Module-4
ECG QRS detection: Power spectrum of the ECG, Bandpass filtering techniques, Differentiation
techniques, Template matching techniques: Template cross correlation, template subtraction, automata
based template matching, a QRS detection algorithm.
ECG Analysis Systems: Interpretation of the 12 lead ECG, ST segment analyzer, Portable arrhythmia
monitor: Holter recording, software and hardware design, arrhythmia analysis (Text -2)
Teaching-Learning Chalk and talk method, PowerPoint Presentation, YouTube videos
Process RBT Level: L1, L2, L3
Module-5
Neurological signal processing: The brain and its potentials, origin of brain waves, the EEG signal and
its characteristics, EEG analysis, Linear prediction theory, The Autoregressive method, Recursive
estimation of AR parameters, Spectral error measure.
(Text-3: 4.1, 4.2, 4.3 4.4, 4.5, 4.6, 4.7, 4.8)
Event detection and waveform analysis: EEG rhythms, waves and transients, Detection of EEG
rhythms, Template matching for EEG spike and wave detection, the matched filter
(Text-1: 4.2.4, 4.4.1, 4.4.2, 4.6)
Teaching-Learning Chalk and talk method, Power point presentation
Process RBT Level: L1, L2, L3
Course outcome (Course Skill Set)
At the end of the course the student will be able to:
1. Describe the origin, properties and suitable models of important biological signals such as ECG
and EEG.
2. Know the basic signal processing techniques in analysing biological signals.
3. Acquire mathematical and computational skills relevant to the field of biomedical signal
processing.
4. Describe the basics of ECG signal compression algorithms.
5. Know the complexity of various biological phenomena.
Assessment Details (both CIE and SEE)
The weightage of Continuous Internal Evaluation (CIE) is 50% and for Semester End Exam (SEE) is 50%.
The minimum passing mark for the CIE is 40% of the maximum marks (20 marks out of 50). A student
shall be deemed to have satisfied the academic requirements and earned the credits allotted to each
subject/ course if the student secures not less than 35% (18 Marks out of 50) in the semester-end
examination (SEE), and a minimum of 40% (40 marks out of 100) in the sum total of the CIE (Continuous
Internal Evaluation) and SEE (Semester End Examination) taken together.
Continuous Internal Evaluation:
Three Unit Tests each of 20 Marks (duration 01 hour)
1. First test at the end of 5th week of the semester
2. Second test at the end of the 10th week of the semester

19.09.2023
03.10.2022

3. Third test at the end of the 15th week of the semester

Two assignments each of 10 Marks
4. First assignment at the end of 4th week of the semester
5. Second assignment at the end of 9th week of the semester
Group discussion/Seminar/quiz any one of three suitably planned to attain the COs and POs for 20
Marks (duration 01 hours)
6. At the end of the 13th week of the semester
The sum of three tests, two assignments, and quiz/seminar/group discussion will be out of 100 marks
and will be scaled down to 50 marks
(to have less stressed CIE, the portion of the syllabus should not be common /repeated for any of the
methods of the CIE. Each method of CIE should have a different syllabus portion of the course).
CIE methods /question paper is designed to attain the different levels of Bloom’s taxonomy as per
the outcome defined for the course.
Semester End Examination:
Theory SEE will be conducted by University as per the scheduled timetable, with common question
papers for the subject (duration 03 hours)
1. The question paper will have ten questions. Each question is set for 20 marks.
2. There will be 2 questions from each module. Each of the two questions under a module (with a
maximum of 3 sub-questions), should have a mix of topics under that module.
The students have to answer 5 full questions, selecting one full question from each module.. Marks scored
out of 100 shall be reduced proportionally to 50 marks

Suggested Learning Resources:

Books:
1. Biomedical Signal Analysis-Rangaraj M Rangayyan, John Wiley & Sons 2002
2. Biomedical Digital Signal Processing- Willis J Tompkins, PHI2001.
3. Biomedical Signal Processing Principles and Techniques-D C Reddy, McGraw-Hill publications, 2005.

19.09.2023
03.10.2022

VISVESVARAYA TECHNOLOGICAL UNIVERSITY, BELAGAVI

B.E: Electronics & Communication Engineering / B.E: Electronics & Telecommunication Engineering
NEP, Outcome Based Education (OBE) and Choice Based Credit System (CBCS)
(Effective from the academic year 2021 – 22)
VII Semester

Speech Signal Processing

Course Code 21EC725 CIE Marks 50
Teaching Hours/Week (L:T:P:S) 3:0:0:0 SEE Marks 50
Total Hours of Pedagogy 40 Total Marks 100
Credits 3 Exam Hours 3
Course objectives:
 Introduce the models for speech production
 Develop Time domain and frequency domain speech processing techniques
 Introduce a predictive technique for speech compression
 Provide fundamental knowledge required to understand and analyze speech recognition, synthesis
and speaker identification systems.
Teaching-Learning Process (General Instructions)
The sample strategies, which the teacher can use to accelerate the attainment of the various course
outcomes are listed in the following:
1. Lecture method (L) does not mean only the traditional lecture method, but a different type of
teaching method may be adopted to develop the outcomes.
2. Show Video/animation films to explain the functioning of various techniques.
3. Encourage collaborative (Group) Learning in the class
4. Ask at least three HOTS (Higher-order Thinking) questions in the class, which promotes critical
thinking
5. Adopt Problem Based Learning (PBL), which fosters students’ Analytical skills, develop thinking
skills such as the ability to evaluate, generalize, and analyze information rather than simply recall
it.
6. Discuss how every concept can be applied to the real world - and when that's possible, it helps
improve the students' understanding.
Module-1
Fundamentals of Human Speech Production: The Process of Speech Production, Short-Time Fourier
representation of Speech, The Acoustic Theory of Speech production, Digital Models for Sampled
Speech Signals.
Teaching-Learning Chalk and talk method, Power point presentations,
Process Animation of process of speech production
RBT Level: L1, L2, L3
Module-2
Time-Domain Methods for Speech Processing: Introduction to Short-Time Analysis of Speech,
Short-Time Energy and Short-Time Magnitude, Short-Time Zero-Crossing Rate, The Short-Time
Autocorrelation Function, Speech vs Silence detection.
Teaching-Learning Chalk and talk method, Power point presentation
Process Simulation of Short Time analysis algorithm using tools like Matlab/simulink
RBT Level: L1, L2, L3
Module-3
Frequency Domain Representations: Discrete-Time Fourier Analysis, Short-Time Fourier Analysis,
Overlap Addition (OLA) and Filter Bank Summation (FBS) Method of Synthesis, Time-Decimated Filter
Banks, Two-Channel Filter Banks, Modifications of the STFT.
Teaching-Learning Chalk and talk method, Power point presentation
Process Visualization of speech using spectrogram
RBT Level: L1, L2, L3

19.09.2023
03.10.2022

Module-4
The Cepstrum and Homomorphic Speech Processing: Introduction, Homomorphic Systems for
Convolution, Homomorphic Analysis of the Speech Model, Computing the Short-Time Cepstrum and
Complex Cepstrum of Speech, Homomorphic Filtering of Natural Speech, Cepstrum Analysis of All-Pole
Models, Cepstrum Distance Measures.
Teaching-Learning Chalk and talk method, Power point presentation
Process RBT Level: L1, L2, L3
Module-5
Linear Predictive Analysis of Speech Signals: Introduction to Basic Principles of Linear Predictive
Analysis, Computation of the Gain for the Model, Frequency Domain Interpretations of Linear
Predictive Analysis, Solution of the LPC Equations, The Prediction Error Signal.
Teaching-Learning Chalk and talk method, Power point presentation
Process RBT Level: L1, L2, L3
Course outcomes (Course Skill Set)
At the end of the course the student will be able to:
1. Model speech production system and describe the fundamentals of speech.
2. Apply time domain and frequency domain algorithms, on speech to find, enhance and modify
speech parameters.
3. Choose an appropriate processing technique for a given application.
4. Analyse speech recognition, synthesis and speaker identification systems
Assessment Details (both CIE and SEE)
The weightage of Continuous Internal Evaluation (CIE) is 50% and for Semester End Exam (SEE) is 50%.
The minimum passing mark for the CIE is 40% of the maximum marks (20 marks out of 50). A student
shall be deemed to have satisfied the academic requirements and earned the credits allotted to each
subject/ course if the student secures not less than 35% (18 Marks out of 50) in the semester-end
examination (SEE), and a minimum of 40% (40 marks out of 100) in the sum total of the CIE (Continuous
Internal Evaluation) and SEE (Semester End Examination) taken together.
Continuous Internal Evaluation:
Three Unit Tests each of 20 Marks (duration 01 hour)
1. First test at the end of 5th week of the semester
2. Second test at the end of the 10th week of the semester
3. Third test at the end of the 15th week of the semester
Two assignments each of 10 Marks
4. First assignment at the end of 4th week of the semester
5. Second assignment at the end of 9th week of the semester
Group discussion/Seminar/quiz any one of three suitably planned to attain the COs and POs for 20
Marks (duration 01 hours)
6. At the end of the 13th week of the semester
The sum of three tests, two assignments, and quiz/seminar/group discussion will be out of 100 marks
and will be scaled down to 50 marks
(to have less stressed CIE, the portion of the syllabus should not be common /repeated for any of the
methods of the CIE. Each method of CIE should have a different syllabus portion of the course).
CIE methods /question paper is designed to attain the different levels of Bloom’s taxonomy as per
the outcome defined for the course.
Semester End Examination:
Theory SEE will be conducted by University as per the scheduled timetable, with common question

19.09.2023
03.10.2022

papers for the subject (duration 03 hours)

1. The question paper will have ten questions. Each question is set for 20 marks.
2. There will be 2 questions from each module. Each of the two questions under a module (with a
maximum of 3 sub-questions), should have a mix of topics under that module.
The students have to answer 5 full questions, selecting one full question from each module.. Marks scored
out of 100 shall be reduced proportionally to 50 marks
Suggested Learning Resources:
Text Books
1. Digital Processing of Speech Signals - L R Rabiner and R W Schafer, Pearson Education Asia, 2004.
2. Theory and Applications of Digital Speech Processing-Rabiner and Schafer, Pearson Education
2011.

Reference Books
1. Fundamentals of Speech Recognition- Lawrence Rabiner and Biing-Hwang Juang, Pearson
Education, 2003.
2. Speech and Language Processing–An Introduction to Natural Language Processing, Computational
Linguistics, and Speech Recognition- Daniel Jurafsky and James H Martin, Pearson Prentice Hall,
2009.

19.09.2023
03.10.2022

VISVESVARAYA TECHNOLOGICAL UNIVERSITY, BELAGAVI

B.E: Electronics & Communication Engineering / B.E: Electronics & Telecommunication Engineering
NEP, Outcome Based Education (OBE) and Choice Based Credit System (CBCS)
(Effective from the academic year 2021 – 22)
VII Semester

IoT & Wireless Sensor Networks

Course Code 21EC731 CIE Marks 50
Teaching Hours/Week (L:T:P:S) 3:0:0:0 SEE Marks 50
Total Hours of Pedagogy 40 Total Marks 100
Credits 3 Exam Hours 3
Course objectives:
 To provide an exposure to the broad perspective of Internet of Things with respect to the
characteristics, design, technologies and applications.
 To provide a basic understanding of the important aspects of Wireless sensor networks covering
applications, sensor and transmission technology & systems, middleware, performance and traffic
management.
Teaching-Learning Process (General Instructions)
The sample strategies, which the teacher can use to accelerate the attainment of the various course
outcomes are listed in the following:
1. Lecture method (L) does not mean only the traditional lecture method, but a different type of
teaching method may be adopted to develop the outcomes.
2. Show Video/animation films to explain the various concepts.
3. Encourage collaborative (Group) Learning in the class
4. Ask at least three HOTS (Higher-order Thinking) questions in the class, which promotes critical
thinking
5. Adopt Problem Based Learning (PBL), which fosters students’ Analytical skills, develop thinking
skills such as the ability to evaluate, generalize, and analyze information rather than simply recall
it.
6. Topics will be introduced in multiple representations.
7. Show the different ways to solve the same problem and encourage the students to come up with
their own creative ways to solve them.
8. Discuss how every concept can be applied to the real world - and when that's possible, it helps
improve the students' understanding.
Module-1
Internet of Things: Introduction, Physical design, Logical design, Enabling technologies, Levels &
deployment templates.
Text 1: Chapter 1
Teaching-Learning Chalk and talk method, Power point presentation
Process RBT Level: L1, L2, L3
Module-2
Domain Specific IoTs: Home automation, cities, environment, energy, retail, logistics, agriculture,
industry, health & lifestyle.
Text 1: Chapter 2
Teaching-Learning Chalk and talk method, Power point presentation
Process RBT Level: L1, L2, L3
Module-3
Wireless Sensor Networks: Introduction, applications of sensor networks, basic overview of the
technology, basic sensor network architectural elements, present day sensor network research,
challenges and hurdles, examples of Category 2 WSN applications, examples of Category 1 WSN
applications

19.09.2023
03.10.2022

Text 2: Chapter 1 – 1.1, 1.1.2, 1.2, 1.2.1, 1.2.2 (phase 4), 1.2.3 Chapter 2: 2.4, 2.5
Teaching-Learning Chalk and talk method, Power point presentation
Process RBT Level: L1, L2, L3
Module-4
Wireless sensor technology: Introduction, sensor node technology – overview, hardware and
software, sensor taxonomy, WN operating environment, WN trends.
Wireless Transmission technology and systems: Introduction, Campus applications, MAN/WAN
applications.
Text 2: Chapter 3: 3.1, 3.2 – 3.2.1, 3.2.2, 3.3, 3.4, 3.5 Chapter 4: 4.1, 4.3.1, 4.3.2
Teaching-Learning Chalk and talk method, Power point presentation
Process RBT Level: L1, L2, L3
Module-5
Middleware for WSNs: Introduction, principles, architecture, data related functions
Performance and traffic management: background, WSN Design issues, performance modelling of
WSNs.
Text 2: Chapter 8: 8.1, 8.2, 8.3, 8.3.1 Chapter 11: 11.2, 11.3, 11.4
Teaching-Learning Chalk and talk method, Power point presentation
Process RBT Level: L1, L2, L3
Course outcome (Course Skill Set)
At the end of the course the student will be able to:
1. Understand the characteristics, building blocks, enabling technologies of the IoT systems
2. Describe the characteristics and applications of domain specific IoTs.
3. Discuss the overview of the Wireless sensor networks characteristics and applications.
4. Present the sensor, transmission technology and systems associated with WSN.
5. Understand the concepts of middleware, performance evaluation and traffic management in WSN.
Assessment Details (both CIE and SEE)
The weightage of Continuous Internal Evaluation (CIE) is 50% and for Semester End Exam (SEE) is 50%.
The minimum passing mark for the CIE is 40% of the maximum marks (20 marks out of 50). A student
shall be deemed to have satisfied the academic requirements and earned the credits allotted to each
subject/ course if the student secures not less than 35% (18 Marks out of 50) in the semester-end
examination (SEE), and a minimum of 40% (40 marks out of 100) in the sum total of the CIE (Continuous
Internal Evaluation) and SEE (Semester End Examination) taken together.

Continuous Internal Evaluation:

Three Unit Tests each of 20 Marks (duration 01 hour)
1. First test at the end of 5th week of the semester
2. Second test at the end of the 10th week of the semester
3. Third test at the end of the 15th week of the semester
Two assignments each of 10 Marks
4. First assignment at the end of 4th week of the semester
5. Second assignment at the end of 9th week of the semester
Group discussion/Seminar/quiz any one of three suitably planned to attain the COs and POs for 20
Marks (duration 01 hours)
6. At the end of the 13th week of the semester
The sum of three tests, two assignments, and quiz/seminar/group discussion will be out of 100 marks
and will be scaled down to 50 marks
(to have less stressed CIE, the portion of the syllabus should not be common /repeated for any of the
methods of the CIE. Each method of CIE should have a different syllabus portion of the course).
CIE methods /question paper is designed to attain the different levels of Bloom’s taxonomy as per

19.09.2023
03.10.2022

the outcome defined for the course.

Semester End Examination:
Theory SEE will be conducted by University as per the scheduled timetable, with common question
papers for the subject (duration 03 hours)
1. The question paper will have ten questions. Each question is set for 20 marks.
2. There will be 2 questions from each module. Each of the two questions under a module (with a
maximum of 3 sub-questions), should have a mix of topics under that module.
The students have to answer 5 full questions, selecting one full question from each module.. Marks scored
out of 100 shall be reduced proportionally to 50 marks
Suggested Learning Resources:
Text Books:
1. ‘Internet of Things’, Arshdeep Bagha and Vijay Madisetti, Universities Press, 2015
2. ‘Wireless Sensor Networks’, Kazem Sohraby, Daniel Minoli and Taieb Znati, Wiley, 2015.

19.09.2023
03.10.2022

VISVESVARAYA TECHNOLOGICAL UNIVERSITY, BELAGAVI

B.E: Electronics & Communication Engineering / B.E: Electronics & Telecommunication Engineering
NEP, Outcome Based Education (OBE) and Choice Based Credit System (CBCS)
(Effective from the academic year 2021 – 22)
VII Semester

Network Security
Course Code 21EC732 CIE Marks 50
Teaching Hours/Week (L:T:P:S) 3:0:0:1 SEE Marks 50
Total Hours of Pedagogy 40 Total Marks 100
Credits 3 Exam Hours 3
Course objectives:
 Preparation: To prepare students with fundamental knowledge/ overview in the field of Network
Security with knowledge of security mechanisms and services.
 Core Competence: To equip students with a basic foundation of Network Security by delivering the
basics of Transport Level Security, Secure Socket Layer, Internet Protocol security, Intruders,
Intrusion detection and Malicious Software, Firewalls, Firewall characteristics, Biasing and
Configuration.
Teaching-Learning Process (General Instructions)
These are sample Strategies, which teacher can use to accelerate the attainment of the various course
outcomes.
1. Lecture method (L) does not mean only traditional lecture method, but different type of teaching
methods may be adopted to develop the outcomes.
2. Show Video/animation films to explain the different Network Security Techniques / Algorithms
3. Encourage collaborative (Group) Learning in the class
4. Ask at least three HOTS (Higher order Thinking) questions in the class, which promotes critical
thinking
5. Adopt Problem Based Learning (PBL), which fosters students’ Analytical skills, develop thinking
skills such as the ability to evaluate, generalize, and analyze information rather than simply recall
it.
6. Topics will be introduced in a multiple representation.
7. Show the different ways to solve the same problem and encourage the students to come up with
their own creative ways to solve them.
8. Discuss how every concept can be applied to the real world - and when that's possible, it helps
improve the students' understanding.
9. Adopt Flipped class technique by sharing the materials / Sample Videos prior to the class and have
discussions on the that topic in the succeeding classes
10. Give Programming Assignments
Module-1
Attacks on Computers and Computer Security: Need for Security, Security Approaches, Principles of
Security Types of Attacks. (Text2: Chapter1)
Security Mechanisms, Services and Attacks, A model for Network security (Text1: Chapter1: 3, 4, 5, 6)
Network Access Control, Extensible Authentication Protocol (Text1: Chapter 16: Section 1,2)
Teaching- Chalk and talk method, YouTube videos, Flipped Class Technique
Learning RBT Level: L1, L2, L3
Process
Module-2
Transport Level Security: Web Security Considerations, Secure Sockets Layer, Transport Layer
Security, HTTPS, Secure Shell (SSH) (Text1: Chapter15)
Teaching- Chalk and talk method YouTube videos, Flipped Class Technique and PPTs.
Learning Self-study topics: Block cipher modes, Cryptographic Hash functions and MAC codes
Process RBT Level: L1, L2, L3

19.09.2023
03.10.2022

Module-3
IP Security: Overview of IP Security (IPSec), IP Security Architecture, Modes of Operation, Security
Associations (SA), Authentication Header (AH), Encapsulating Security Payload (ESP), Internet Key
Exchange. (Text1: Chapter19)
Teaching- Chalk and talk method, YouTube videos, Flipped Class Technique and PPTs.
Learning Self-study topics: OSI Model
Process
RBT Level: L1, L2, L3
Module-4
Intruders: Intruders, Intrusion Detection, Password Management. (Chapter20-Text1)
MALICIOUS SOFTWARE: Viruses and Related Threats, Virus Countermeasures, (Chapter21-Text1)
Teaching- Chalk and talk method, YouTube videos, Flipped Class Technique and PPTs.
Learning RBT Level: L1, L2, L3
Process
Module-5
Firewalls: The Need for firewalls, Firewall Characteristics, Types of Firewalls, Firewall Biasing,
Firewall location and configuration (Chapter 22-Text 1)
Teaching- Chalk and talk method, YouTube videos, Flipped Class Technique and PPTs.
Learning RBT Level: L1, L2, L3
Process
Course outcomes (Course Skill Set)
At the end of the course the student will be able to:
1. Explain network security services and mechanisms and explain security concepts
2. Understand the concept of Transport Level Security and Secure Socket Layer.
3. Explain Security concerns in Internet Protocol security
4. Explain Intruders, Intrusion detection and Malicious Software
5. Describe Firewalls, Firewall Characteristics, Biasing and Configuration
Assessment Details (both CIE and SEE)
The weightage of Continuous Internal Evaluation (CIE) is 50% and for Semester End Exam (SEE) is 50%.
The minimum passing mark for the CIE is 40% of the maximum marks (20 marks out of 50). A student
shall be deemed to have satisfied the academic requirements and earned the credits allotted to each
subject/ course if the student secures not less than 35% (18 Marks out of 50) in the semester-end
examination (SEE), and a minimum of 40% (40 marks out of 100) in the sum total of the CIE (Continuous
Internal Evaluation) and SEE (Semester End Examination) taken together.
Continuous Internal Evaluation:
Three Unit Tests each of 20 Marks (duration 01 hour)
1. First test at the end of 5th week of the semester
2. Second test at the end of the 10th week of the semester
3. Third test at the end of the 15th week of the semester
Two assignments each of 10 Marks
4. First assignment at the end of 4th week of the semester
5. Second assignment at the end of 9th week of the semester
Group discussion/Seminar/quiz any one of three suitably planned to attain the COs and POs for 20
Marks (duration 01 hours)
6. At the end of the 13th week of the semester
The sum of three tests, two assignments, and quiz/seminar/group discussion will be out of 100 marks
and will be scaled down to 50 marks
(to have less stressed CIE, the portion of the syllabus should not be common /repeated for any of the
methods of the CIE. Each method of CIE should have a different syllabus portion of the course).
CIE methods /question paper is designed to attain the different levels of Bloom’s taxonomy as per

19.09.2023
03.10.2022

the outcome defined for the course.

Semester End Examination:
Theory SEE will be conducted by University as per the scheduled timetable, with common question
papers for the subject (duration 03 hours)
1. The question paper will have ten questions. Each question is set for 20 marks.
2. There will be 2 questions from each module. Each of the two questions under a module (with a
maximum of 3 sub-questions), should have a mix of topics under that module.
The students have to answer 5 full questions, selecting one full question from each module.. Marks scored
out of 100 shall be reduced proportionally to 50 marks
Suggested Learning Resources:
Text Books:
1. William Stallings, “Cryptography and Network Security Principles and Practice”, Pearson Education
Inc., 5th Edition, 2014, ISBN: 978-81-317- 6166-3
2. Atul Kahate, “Cryptography and Network Security”, TMH, 2003.

Reference Books:
1. Cryptography and Network Security, Behrouz A Forouzan, TMH, 2007.
2. Introduction to Computer Security, Matt Bishop, Sathyanarayana S V, Pearson Education, 2006,
ISBN 81-7758-425/1.
Web links and Video Lectures (e-Resources)
https://nptel.ac.in/courses/106105031
https://nptel.ac.in/courses/128106006
Activity Based Learning (Suggested Activities in Class)/ Practical Based learning
 Programming Assignments / Mini Projects can be given to improve programming skills.

19.09.2023
03.10.2022

VISVESVARAYA TECHNOLOGICAL UNIVERSITY, BELAGAVI

B.E: Electronics & Communication Engineering / B.E: Electronics & Telecommunication Engineering
NEP, Outcome Based Education (OBE) and Choice Based Credit System (CBCS)
(Effective from the academic year 2021 – 22)
VII Semester

Fabrication Technology
Course Code 21EC733 CIE Marks 50
Teaching Hours/Week (L:T:P:S) 3:0:0:1 SEE Marks 50
Total Hours of Pedagogy 40 Total Marks 100
Credits 3 Exam Hours 3
Course objectives:
 Familiarise with the concepts of different processes involved in fabrication process and also with
packaging issues.
 Apply principles to identify and analyse the various steps for the fabrication of various
components.
 Introduce the fundamental concepts relevant to VLSI fabrication.
 Enable the students to understand the various VLSI fabrication techniques.
Teaching-Learning Process (General Instructions)
The sample strategies, which the teacher can use to accelerate the attainment of the various course
outcomes are listed in the following:
1. Lecture method (L) does not mean only the traditional lecture method, but a different type of
teaching method may be adopted to develop the outcomes.
2. Show Video/animation films to explain the functioning of various techniques.
3. Encourage collaborative (Group) Learning in the class.
4. Topics will be introduced in multiple representations.
5. Discuss how every concept can be applied to the real world - and when that's possible, it helps
improve the students' understanding.
Module-1
Crystal Growth and Wafer Preparation: Introduction, Electronic grade Silicon, Czochralski Crystal
Growing, Silicon Shaping
Epitaxy: Introduction, Vapor-Phase Epitaxy
Text Book 1.1 to 1.4, 2.1 to 2.2
Teaching- Chalk and talk method, PowerPoint Presentation, Videos on crystal growth process
Learning Self-study topics: Mask Preparation
Process RBT Level: L1, L2, L3
Module-2
Epitaxy: Molecular beam epitaxy, Epitaxial evaluation
Oxidation: Introduction, Growth mechanism and kinetics, Thin oxides, oxidation techniques, oxide
properties, redistribution of dopants, oxidation of polysilicon, oxidation-induced defects
Text Book 2.3 and 2.5, 3.1 to 3.8
Teaching- Chalk and talk method, Power point presentation, videos on Epitaxial process
Learning Self-study topics: Advanced oxidation techniques
Process
RBT Level: L1, L2, L3
Module-3
Lithography: Introduction, Optical Lithography, Electron Lithography, X-ray lithography, Ion
Lithography
Text Book 4.1 to 4.5
Teaching- Chalk and talk method, PowerPoint Presentation, Videos on Lithography

19.09.2023
03.10.2022

Learning Self-study topics: Sputtering and edge lithography

Process
RBT Level: L1, L2, L3
Module-4
Diffusion: Introduction, Models of diffusion in solids, fick’s 1D diffusion equation, atomic diffusion
mechanism, Diffussivities, Measurement techniques, fast diffusants in silicon, diffusion in polycrystalline
silicon, diffusion in SiO2
Ion Implantation: Introduction, Implantation equipment
Text Book 7.1 to 7.9, 8.1 and 8.3
Teaching- Chalk and talk method, PowerPoint Presentation, Videos on diffusion method
Learning Self-study topics: Effect of doping concentration in diffusion process
Process RBT Level: L1, L2, L3
Module-5
Ion Implantation: Annealing, Shallow Junctions, High energy implantation
Metallization: Introduction, Metallization applications, metallization choices, Metallization problems,
New role of metallization.
Text Book 8.4 to 8.6, 9.1 to 9.7 (except 9.4 and 9.5)
Teaching- Chalk and talk method, Power point presentation, Videos on Annealing process
Learning Self-study topics: e-beam evaporation, plasma spray deposition
Process RBT Level: L1, L2, L3
Course outcome (Course Skill Set)
At the end of the course the student will be able to:
1. Understanding the process in the field of Fabrication technology.
2. Understand the properties and growth mechanism of oxidation.
3. Relate to the competing methods of various lithographic techniques and their limitations.
4. Analyse the diffusion profiles and models in various materials.
5. Describe the Metallization choices, properties and selection of optimum deposition process.
Assessment Details (both CIE and SEE)
The weightage of Continuous Internal Evaluation (CIE) is 50% and for Semester End Exam (SEE) is 50%.
The minimum passing mark for the CIE is 40% of the maximum marks (20 marks out of 50). A student
shall be deemed to have satisfied the academic requirements and earned the credits allotted to each
subject/ course if the student secures not less than 35% (18 Marks out of 50) in the semester-end
examination (SEE), and a minimum of 40% (40 marks out of 100) in the sum total of the CIE (Continuous
Internal Evaluation) and SEE (Semester End Examination) taken together.
Continuous Internal Evaluation:
Three Unit Tests each of 20 Marks (duration 01 hour)
1. First test at the end of 5th week of the semester
2. Second test at the end of the 10th week of the semester
3. Third test at the end of the 15th week of the semester
Two assignments each of 10 Marks
4. First assignment at the end of 4th week of the semester
5. Second assignment at the end of 9th week of the semester
Group discussion/Seminar/quiz any one of three suitably planned to attain the COs and POs for 20
Marks (duration 01 hours)
6. At the end of the 13th week of the semester
The sum of three tests, two assignments, and quiz/seminar/group discussion will be out of 100 marks
and will be scaled down to 50 marks
(to have less stressed CIE, the portion of the syllabus should not be common /repeated for any of the
methods of the CIE. Each method of CIE should have a different syllabus portion of the course).
CIE methods /question paper is designed to attain the different levels of Bloom’s taxonomy as per

19.09.2023
03.10.2022

the outcome defined for the course.

Semester End Examination:
Theory SEE will be conducted by University as per the scheduled timetable, with common question
papers for the subject (duration 03 hours)
1. The question paper will have ten questions. Each question is set for 20 marks.
2. There will be 2 questions from each module. Each of the two questions under a module (with a
maximum of 3 sub-questions), should have a mix of topics under that module.
The students have to answer 5 full questions, selecting one full question from each module.. Marks scored
out of 100 shall be reduced proportionally to 50 marks
Suggested Learning Resources:
Text Book:
VLSI Technology, S M Sze, 2nd edition, Mc Graw Hill.

Reference Books:

1. VLSI Fabrication Principles, S K Gandhi, John Willey & Sons.

2. Micromachined transducer, G T A Kovacs, McGraw Hill.

19.09.2023
03.10.2022

VISVESVARAYA TECHNOLOGICAL UNIVERSITY, BELAGAVI

B.E: Electronics & Communication Engineering / B.E: Electronics & Telecommunication Engineering
NEP, Outcome Based Education (OBE) and Choice Based Credit System (CBCS)
(Effective from the academic year 2021 – 22)
VII Semester

Machine Learning with Python

Course Code 21EC734 CIE Marks 50
Teaching Hours/Week (L:T:P:S) 2:0: 2:1 SEE Marks 50
Total Hours of Pedagogy 40 Total Marks 100
Credits 3 Exam Hours 3
Course objectives:
 To understand the basic theory underlying machine learning.
 To be able to formulate machine learning problems corresponding to different applications.
 To understand a range of machine learning algorithms along with their strengths and weaknesses.
 To be able to apply machine learning algorithms to solve problems of moderate complexity.
 To apply the algorithms to a real-world problem, optimize the models learned and report on the
expected accuracy that can be achieved by applying the models.
Teaching-Learning Process (General Instructions)
These are sample Strategies, which teacher can use to accelerate the attainment of the various course
outcomes.
1. In addition to the traditional lecture method, different types of innovative teaching methods may be
adopted so that the delivered lessons shall develop student’s theoretical and programming skills.
2. State the need for learning Machine Learning with real-life examples.
3. Support and guide the students for self–study.
4. You will also be responsible for assigning homework, grading assignments and quizzes, and
documenting students & progress
5. Encourage the students for group learning to improve their creative and analytical skills.
6. Show short, related video lectures in the following ways:
 As an introduction to new topics (pre-lecture activity).
 As a revision of topics (post-lecture activity).
 As additional examples (post-lecture activity).
 As an additional material of challenging topics (pre-and post-lecture activity).
 As a model solution of some real world problems. (post-lecture activity).
Module-1
Introduction:
Introduction to Machine Learning, Building intelligent machines to transform data into knowledge, The
three different types of machine learning, An introduction to the basic terminology and notations, A
roadmap for building machine learning systems, Using Python for machine learning.
Training Machine Learning Algorithms for Classification
Artificial neurons – a brief glimpse into the early history of machine learning, Implementing a
perceptron learning algorithm in Python, Adaptive linear neurons and the convergence of learning.
Textbook 1: Chapters 1, 2
Teaching-Learning Chalk and talk method, Power point presentation
Process RBT Level: L1, L2, L3
Module-2
A Tour of Machine Learning Classifiers Using Scikit-Learn
Choosing a classification algorithm, First steps with scikit-learn, Modeling class probabilities via logistic
regression, Maximum margin classification with support vector machines, Solving nonlinear problems
using a kernel SVM, Decision tree learning, K-nearest neighbors – a lazy learning algorithm

19.09.2023
03.10.2022

Building Good Training Sets – Data Preprocessing

Dealing with missing data, Handling categorical data, Partitioning a dataset in training and test sets,
Bringing features onto the same scale, Selecting meaningful features, Assessing feature importance with
random forests.
Textbook 1: Chapters 3 ,4

Teaching-Learning Chalk and talk method, Power point presentation

Process RBT Level: L1, L2, L3
Module-3
Compressing Data via Dimensionality Reduction
Unsupervised dimensionality reduction via principal component Analysis, Supervised data compression
via linear discriminant analysis, Using kernel principal component analysis for nonlinear mappings
Learning Best Practices for Model Evaluation and Hyperparameter Tuning
Streamlining workflows with pipelines, Using k-fold cross-validation to assess model performance,
Debugging algorithms with learning and validation curves, Fine-tuning machine learning models via
grid search, Looking at different performance evaluation metrics
Applying Machine Learning to Sentiment Analysis
Obtaining the IMDb movie review dataset, Introducing the bag-of-words model, training a logistic
regression model for document classification , Working with bigger data – online algorithms and
out-of-core learning
Textbook 1: Chapters 5,6,8
Teaching-Learning Chalk and talk method, Power point presentation
Process RBT Level: L1, L2, L3
Module-4
Embedding a Machine Learning Model into a Web Application
Serializing fitted scikit-learn estimators, Setting up a SQLite database for data storage, Developing a web
application with Flask, Turning the movie classifier into a web application, Deploying the web application
to a public server
Predicting Continuous Target Variables with Regression Analysis
Introducing a simple linear regression model, Exploring the Housing Dataset, Implementing an ordinary
least squares linear regression model, Fitting a robust regression model using RANSAC, Evaluating the
performance of linear regression models, Using regularized methods for regression- Turning a linear
regression model into a curve – polynomial regression Textbook 1: Chapters 9,10
Teaching-Learning Chalk and talk method, Power point presentation
Process RBT Level: L1, L2, L3
Module-5
Working with Unlabeled Data – Clustering Analysis
Grouping objects by similarity using k-means, Organizing clusters as a hierarchical tree,
Training Artificial Neural Networks for Image Recognition
Modeling complex functions with artificial neural networks, Classifying handwritten digits, Training an
artificial neural network, Other neural network architectures
Textbook 1: Chapters 11,12
Teaching-Learning Chalk and talk method, Power point presentation
Process RBT Level: L1, L2, L3

19.09.2023
03.10.2022

Course outcomes (Course Skill Set)

At the end of the course the student will be able to:
1. Appreciate the importance of visualization in the data analytics solution
2. Apply structured thinking to unstructured problems
3. Understand a very broad collection of machine learning algorithms and problems
4. Learn algorithmic topics of machine learning and mathematically deep enough to introduce the
required theory
5. Develop an appreciation for what is involved in learning from data.

Assessment Details (both CIE and SEE)

The weightage of Continuous Internal Evaluation (CIE) is 50% and for Semester End Exam (SEE) is 50%.
The minimum passing mark for the CIE is 40% of the maximum marks (20 marks out of 50). A student
shall be deemed to have satisfied the academic requirements and earned the credits allotted to each
subject/ course if the student secures not less than 35% (18 Marks out of 50) in the semester-end
examination (SEE), and a minimum of 40% (40 marks out of 100) in the sum total of the CIE (Continuous
Internal Evaluation) and SEE (Semester End Examination) taken together.
Continuous Internal Evaluation:
Three Unit Tests each of 20 Marks (duration 01 hour)
1. First test at the end of 5th week of the semester
2. Second test at the end of the 10th week of the semester
3. Third test at the end of the 15th week of the semester
Two assignments each of 10 Marks
4. First assignment at the end of 4th week of the semester
5. Second assignment at the end of 9th week of the semester
Group discussion/Seminar/quiz any one of three suitably planned to attain the COs and POs for 20
Marks (duration 01 hours)
6. At the end of the 13th week of the semester
The sum of three tests, two assignments, and quiz/seminar/group discussion will be out of 100 marks
and will be scaled down to 50 marks
(to have less stressed CIE, the portion of the syllabus should not be common /repeated for any of the
methods of the CIE. Each method of CIE should have a different syllabus portion of the course).
CIE methods /question paper is designed to attain the different levels of Bloom’s taxonomy as per
the outcome defined for the course.
Semester End Examination:
Theory SEE will be conducted by University as per the scheduled timetable, with common question
papers for the subject (duration 03 hours)
1. The question paper will have ten questions. Each question is set for 20 marks.
2. There will be 2 questions from each module. Each of the two questions under a module (with a
maximum of 3 sub-questions), should have a mix of topics under that module.
The students have to answer 5 full questions, selecting one full question from each module.. Marks scored
out of 100 shall be reduced proportionally to 50 marks
Suggested Learning Resources:
Text Books:
1. Python Machine Learning by Sebastian Raschka, Published by Packt Publishing Ltd.
2. Machine Learning with Python for Everyone by Mark E Fenner
3. Machine Learning using Python by Manaranjan Pradhan & U Dinesh Kumar
4. Practical Machine Learning with Python by Dipanjan Sarkar, Raghav Bali &Tushar Sharma

19.09.2023
03.10.2022

Web links and Video Lectures (e-Resources)

 https://www.youtube.com/watch?v=RnFGwxJwx-0
 https://www.youtube.com/watch?v=eq7KF7JTinU
Activity Based Learning (Suggested Activities in Class)/ Practical Based learning
 Using IRIS data set implement Adaline rule Classification Algorithm.
 Implement Logistic Regression algorithm and generate corresponding graphs for overfitting and
under fitting.
 Implement linear SVM algorithm with maximum margin intuition.
 Implement a kernel SVM to solve nonlinear problems.
 Implement KNN Algorithm.
 Implement decision tree algorithm.
 Implement s rbf_kernel_pca for separating half-moon shapes.
 Develop web application using flask.

19.09.2023
03.10.2022

VISVESVARAYA TECHNOLOGICAL UNIVERSITY, BELAGAVI

B.E: Electronics & Communication Engineering / B.E: Electronics & Telecommunication Engineering
NEP, Outcome Based Education (OBE) and Choice Based Credit System (CBCS)
(Effective from the academic year 2021 – 22)
VII Semester

Multimedia Communication
Course Code 21EC735 CIE Marks 50
Teaching Hours/Week (L:T:P:S) 3:0:0:1 SEE Marks 50
Total Hours of Pedagogy 40 Total Marks 100
Credits 3 Exam Hours 3
Course objectives:
This course will enable students to:
 Understand the importance of multimedia in today’s online and offline information sources and
repositories.
 Understand the how Text, Audio, Image and Video information can be represented digitally in a
computer so that it can be processed, transmitted and stored efficiently.
 Understand the Multimedia Transport in Wireless Networks
 Understand the Real-time multimedia network applications.
 Understand the Different network layer based application.
Teaching-Learning Process (General Instructions)
The sample strategies, which the teacher can use to accelerate the attainment of the various course
outcomes are listed in the following:
1. Lecture method (L) does not mean only the traditional lecture method, but a different type of
teaching method may be adopted to develop the outcomes.
2. Show Video/animation films to explain the functioning of various techniques.
3. Encourage collaborative (Group) Learning in the class
4. Ask at least three HOTS (Higher-order Thinking) questions in the class, which promotes critical
thinking
5. Topics will be introduced in multiple representations.
6. Discuss how every concept can be applied to the real world - and when that's possible, it helps
improve the students' understanding.
Module-1
Multimedia Communications: Introduction, Multimedia information representation, Multimedia
networks, multimedia applications, Application and networking terminology.
(Chapter 1 of Text 1)
Teaching-Learning Chalk and talk method, Power point presentation
Process RBT Level: L1, L2
Module-2
Information Representation: Introduction, Digitization principles, Text, Images, Audio and Video.
(Chapter 2 of Text 1)
Teaching-Learning Chalk and talk method, Power point presentation
Process RBT Level: L1, L2, L3
Module-3
Text and Image Compression: Introduction, Compression principles, text compression, image
Compression. (Chapter 3 of Text 1 )
Teaching-Learning Chalk and talk method, Power point presentation
Process RBT Level: L1, L2, L3

19.09.2023
03.10.2022

Module-4
Audio and video compression: Introduction, Audio compression, video compression, video
compression principles, video compression. (Chapter 4 of Text 1)
Teaching-Learning Chalk and talk method, Power point presentation
Process RBT Level: L1, L2, L3
Module-5
Multimedia Information Networks: Introduction, LANs, Ethernet, Token ring, Bridges, FDDI High-
speed LANs, LAN protocol (Chap. 8 of Text 1).
Teaching-Learning Chalk and talk method, Power point presentation
Process RBT Level: L1, L2
Course outcomes (Course Skill Set)
At the end of the course the student will be able to:
1. Understand basics of different multimedia networks and applications.
2. Understand different compression techniques to compress audio and video.
3. Describe multimedia Communication across Networks.
4. Analyse different media types to represent them in digital form.
5. Compress different types of text and images using different compression techniques.
Assessment Details (both CIE and SEE)
The weightage of Continuous Internal Evaluation (CIE) is 50% and for Semester End Exam (SEE) is 50%.
The minimum passing mark for the CIE is 40% of the maximum marks (20 marks out of 50). A student
shall be deemed to have satisfied the academic requirements and earned the credits allotted to each
subject/ course if the student secures not less than 35% (18 Marks out of 50) in the semester-end
examination (SEE), and a minimum of 40% (40 marks out of 100) in the sum total of the CIE (Continuous
Internal Evaluation) and SEE (Semester End Examination) taken together.
Continuous Internal Evaluation:
Three Unit Tests each of 20 Marks (duration 01 hour)
1. First test at the end of 5th week of the semester
2. Second test at the end of the 10th week of the semester
3. Third test at the end of the 15th week of the semester
Two assignments each of 10 Marks
4. First assignment at the end of 4th week of the semester
5. Second assignment at the end of 9th week of the semester
Group discussion/Seminar/quiz any one of three suitably planned to attain the COs and POs for 20
Marks (duration 01 hours)
6. At the end of the 13th week of the semester
The sum of three tests, two assignments, and quiz/seminar/group discussion will be out of 100 marks
and will be scaled down to 50 marks
(to have less stressed CIE, the portion of the syllabus should not be common /repeated for any of the
methods of the CIE. Each method of CIE should have a different syllabus portion of the course).
CIE methods /question paper is designed to attain the different levels of Bloom’s taxonomy as per
the outcome defined for the course.
Semester End Examination:
Theory SEE will be conducted by University as per the scheduled timetable, with common question
papers for the subject (duration 03 hours)
1. The question paper will have ten questions. Each question is set for 20 marks.
2. There will be 2 questions from each module. Each of the two questions under a module (with a
maximum of 3 sub-questions), should have a mix of topics under that module.
The students have to answer 5 full questions, selecting one full question from each module.. Marks scored

19.09.2023
03.10.2022

out of 100 shall be reduced proportionally to 50 marks

Suggested Learning Resources:

Text Books:
Multimedia Communications- Fred Halsall, Pearson Education, 2001, ISBN -978813170994
Reference Books:
1. Multimedia: Computing, Communications and Applications- Raif Steinmetz, Klara Nahrstedt,
Pearson Education, 2002, ISBN-978817758
2. Fundamentals of Multimedia – Ze-Nian Li, Mark S Drew, and Jiangchuan Liu.

Activity Based Learning (Suggested Activities in Class)/ Practical Based learning

 Implementation of compression algorithms using MATLAB/ any open source tools (Python,
Scilab, etc.)

19.09.2023