CHAPTER 1

Computer
Systems
Architecture

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Computer Organization and Architecture: Themes and Variations, 1st Edition Clements

Structure of the Book (5 Parts)

Part I The Beginning
introduces the concepts, history and underlying technology of digital computers.
1. Computer Systems Architecture
2. Computer Arithmetic and Digital Logic

Part II Instruction Set Architectures (ISAs)

looks at the programming model of a computer and
introduces the register model of a computer, its instruction types, and the
addressing modes of a typical microprocessor.
3. Architecture and Organization
4. Instruction Set Architectures - Breadth and Depth
5. Computer Architecture and Multimedia

Part III Organization and Efficiency

describes how we measure the performance of computers.
6. Performance - Meaning and Metrics
7. Processor Control
2
8. Beyond RISC: Superscalar, VLIW, and Itanium

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Structure of the Book

Part IV The System
covers the other parts of a computer required to convert the microprocessor chip
into a complete system; for example, peripheral subsystems and the wide range
of memory systems, storage devices, and buses available to the computer
systems’ designer.
9. Cache Memory and Virtual Memory
10. Main Memory
11. Secondary Storage
12. Input/output

Part V Processor-Level Parallelism

goes beyond the single-processor computer and introduces the notion of
computers with multiple processors.
13. Processor-Level Parallelism

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Computer Organization and Architecture: Themes and Variations, 1st Edition Clements

Computer Architecture
 Computer architecture is a set of rules that describe the functionality
of a computer system
o Characterized by its instruction set architecture (ISA)
 An ISA is concerned with the computer’s register set, instruction set, and
addressing modes
 An ISA defines the model of a computer from the programmer viewpoint
 The computer’s assembly language embodies its ISA
 An ISA is an abstract entity because it does not consider
the specific design or implementation of a computer

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Computer Organization and Architecture: Themes and Variations, 1st Edition Clements

Computer Organization
 Computer organization is concerned with the implementation of an ISA
 Any given ISA can have many different organizations
• Examples
 In theory, architecture and organization are orthogonal;
that is, they are entirely independent
 Computer manufacturers regularly modify the organization
of a processor while keeping its ISA essentially constant
 Today, a computer’s organization is often referred to as its microarchitecture
 You could say that
• architecture tells you what a computer does and
• organization tells you how it does it
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Computer Organization and Architecture: Themes and Variations, 1st Edition Clements

Computer Structure
 Figure 1.1 describes the structure of a computer.
 The term computer describes the entire system.
 The CPU is the Central Processing Unit that reads instructions and executes them.
 The CPU is often synonymous with microprocessor.
 Modern microprocessors usually include cache (high-speed) memory on-chip.
 A key component of computers is the bus (or family of busses) that moves
information around the computer between different functional units (data highway).
Static RAM (faster and
more expensive than DRAM)

Dynamic
RAM

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Computer Organization and Architecture: Themes and Variations, 1st Edition Clements

Processor Register
 A processor register is a memory element that holds a single unit data
(a word of data).
 A processor register is specified in terms of the number of bits it holds,
which is typically, 8, 16, 32, or 64.
o Currently, most of computers either have 32-bit or 64-bit-wide registers.
 Each processor has a specified number or registers.

 There is no fundamental difference between

o a register and
o a word in memory.
 The practical difference is that registers are located within the CPU
o can be accessed more rapidly than other memories.
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Computer Organization and Architecture: Themes and Variations, 1st Edition Clements

Stored Program Computer

 Figure 1.3 emphasizes the nature of the stored program computer.
o The CPU reads instructions from memory and then
o carries out operations on input data and data in memory
o Data and instructions co-exist in the same memory system

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Computer Organization and Architecture: Themes and Variations, 1st Edition Clements

Stored Program Computer

 Figure 1.4 illustrates the operation of a stored program, where the statement Z = X + Y
is read from memory, interpreted and executed to add X and Y to create Z.
 A clock (a stream of pulses) sequences all operations in a computer.
 All events in a computer are triggered by clock pulses.

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Computer Organization and Architecture: Themes and Variations, 1st Edition Clements

Stored Program Computer How many

memory access
 LOAD moves data from memory to a register and
do we need to
 STORE moves data from a register to memory.
execute this
 Z = X + Y performs a simple addition operation on data. program?
 Memory is a bottleneck because
o instructions must flow from it (5 times in this example).
o Data must flow from it to take part in operations (2 times in this example) and
o Data must flow back to store the result (1 time in this example).
Should be
ADD
Not
Z = X + Y

ADD

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Computer Organization and Architecture: Themes and Variations, 1st Edition Clements

The Clock
 Most digital electronic circuits have a clock that generates a continuous stream of
regularly spaced electrical pulses.
 It’s called a clock because the pulses are used to time or sequence all events within
the computer; for example, a processor might start executing a new instruction each
time a clock pulse arrives.
 A clock is defined in terms of its repetition rate i.e., frequency.
 Typical clock frequencies in computers range from 1 MHz to about 4.5 GHz.
 Clocks are also defined in terms of the width of a clock pulse, which is the
reciprocal of its frequency; that is f = 1/T;
for example, a 1 MHz clock has a duration of 1 µs (i.e., 10-6s),
and a 1 GHz clock has a duration of 1 ns (i.e., 10-9s).
 A 5 GHz clock has a period of 0.2 ns or simply 200 ps (picoseconds)—1 ps = 10-12 s

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Computer Organization and Architecture: Themes and Variations, 1st Edition Clements

Introducing the Computer by Solving a Problem

 Before introducing the computer, itself, let us look at what is needed to solve a simple
problem.
 We want to find the longest sequence of repeated digits in a stream of digits.
 In figure 1.7 the longest run of repeated digits is four consecutive sixes.
 How can we automate this?
What do we need to do?

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Computer Organization and Architecture: Themes and Variations, 1st Edition Clements

Introducing the Computer by Solving a Problem

 We are going to solve this problem sequentially by examining one digit at a time.
 One way of solving this problem is to note that we are always in one of two states:
o in a repeated digits sequence, or
o at the start of a new sequence.
 Figure 1.8 demonstrates how we can illustrate this with a state diagram.

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Computer Organization and Architecture: Themes and Variations, 1st Edition Clements

State Diagram
 Each circle represents a possible state
 There are two states: In a Run and Not in a Run
 A state change takes place each time we examine a new digit
 A state transition can
o take you from the current state to a new state or
o keep you in the current state.

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Computer Organization and Architecture: Themes and Variations, 1st Edition Clements

State Diagram
 Figure 1.9 shows the state we are in after picking up each digit
 We start at the left hand end

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State Diagram
 Table 1.1 represents the problem in a table form
 The top line gives the position or location of each digit from 1 to 17
 The second line gives the value of each element (i.e., the string itself)
 The third line gives the current run value. This is the same as the previous digit.

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Computer Organization and Architecture: Themes and Variations, 1st Edition Clements

State Diagram
 Table 1.2 is an extension of table 1.1
 We have added a new row at the bottom: the length of the current run

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Computer Organization and Architecture: Themes and Variations, 1st Edition Clements

State Diagram
 Table 1.3 adds a new bottom line, the length of the longest run found so far
 We can now look at how we would solve the problem mechanically.

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Computer Organization and Architecture: Themes and Variations, 1st Edition Clements

The Data
 We now invent some names for the variables in Table 1.3
i The current position in the string
New_Digit The value of the current digit just read from the string of digits
Current_Run_Value The value of the elements in the current run
Current_Run_length The length of the current run
Max_Run The length of the longest run we’ve found so far

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Computer Organization and Architecture: Themes and Variations, 1st Edition Clements

The Algorithm in Pseudo-code

 We can now look at how we would solve the problem.

1. Read the first digit in the string and call it New_Digit

2. Set the Current_Run_Value to New_Digit
3. Set the Current_Run_Length to 1
4. Set the Max_Run to 1
5. REPEAT
6. Read the next digit in the sequence (i.e., read a New_Digit)
7. IF its value is the same as Current_Run_Value
8. THEN Current_Run_Length = Current_Run_Length + 1
9. ELSE {Current_Run_Length = 1
10. Current_Run_Value = New_Digit}
11. IF Current_Run_Length > Max_Run
12. THEN Max_Run = Current_Run_Length
13. UNTIL The last digit is read
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Computer Organization and Architecture: Themes and Variations, 1st Edition Clements

The Algorithm in Pseudo-code

 Figure 1.10 illustrates the use of the IF…THEN…ELSE construct where we test
whether we are in a run or not to either increment the run length or reset it to 1.

Before writing a program, you

must think of the solution 21
using pseudocode or draw a
flowchart for the solution.
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Computer Organization and Architecture: Themes and Variations, 1st Edition Clements

Program and Data

 Figure 1.11 provides a table that
includes
o the operations,
o the variables, and
o the string of digits to be tested.
 This table can be modelled as
a memory array.
 The line-number 0 to 37
corresponds to an address
 The contents of each location
represent either
o A program instruction or
o data.
 Note that real computer instructions
are not exactly like these.
But they are very similar.
 From the bit pattern point of view,
there is no way to differentiate
between encoded data and 22
encoded program instruction.
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Computer Organization and Architecture: Themes and Variations, 1st Edition Clements

The Stored Program Concept

 A key component of a computer is the memory that holds
the program (instructions) and data.
 Figure 1.12 illustrates the elements of a computer’s memory system.

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Computer Organization and Architecture: Themes and Variations, 1st Edition Clements

The Stored Program Concept

 The following pseudo-code expresses the fundamental action of a stored
program machine.

Stored_program_machine
Point to the first instruction in memory
REPEAT
1. Read the instruction at the memory location pointed at
2. Point to the next instruction
3. Decode the instruction just read from memory
4. Execute the instruction
FOREVER
End

 This pseudo-code sequence tells us that a memory reference (i.e., a

memory read) is required to fetch each instruction from memory.

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Computer Organization and Architecture: Themes and Variations, 1st Edition Clements

The Stored Program Concept

 We can expand the action Execute the instruction to give

Execute the instruction

IF the instruction requires data

THEN fetch the data from memory
END_IF

Perform the operation defined by the instruction

IF the instruction requires data to be stored in memory

THEN store the data in memory
END_IF

End

 As you see, Execute the instruction may require

a memory read and/or a memory write
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Computer Organization and Architecture: Themes and Variations, 1st Edition Clements

The Stored Program Concept

 We can also express this sequence of actions in C or Java as follows:
In the book, the post
InstructionPointer = 0; increment is missing
do
{ instruction = memory[InstructionPointer++];
/* read the instruction */
decode(instruction); /* decode the instruction */
fetch(operands); /* fetch data required */
execute(); /* execute the instruction */
store(results); /* store the result */
} while (instruction != stop);

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Computer Organization and Architecture: Themes and Variations, 1st Edition Clements

Terms definition
Constant – a value that doesn’t change during the execution of a program.
For example, if c = 2πr, then both ‘2’ and ‘π’ are constants.
Variable – a value that can change during the execution of a program.
In the previous example, both c and r are variables.
Symbolic name – we often refer to a variable or a constant by a name that
makes it easier for us to remember.
For example, we give the irrational number 3.1415926 the symbolic name π.
When a program is compiled, symbolic names are replaced by actual values.
Address – information in a computer is stored in memory locations and each
location has a unique address. Think of computer memory as if it is an array
and the index of this array is the address of the memory locations.
Rather than trying to remember actual address locations in memory, we give
addresses symbolic names; in this case the address may be called r.
Value and Location – When we write c = 2πr, what is r? We (humans) see r
as the symbolic name for the value of the radius, say 5. But the computer sees
r as the symbolic address 1234 which has to be read to provide the value. If
we write r = r + 1, do we mean r = 5 + 1 = 6 or do we mean r = 1234 + 1 =
1235?
It is very important to distinguish between an address and its contents.
This factor becomes significant when we introduce pointers.
Pointer – A pointer is a variable whose value is an address. If you modify the
value of a pointer, it points to a different value.
In conventional arithmetic we write xi where i is really a pointer; we just 27
call it an index. If you change the pointer (index) we can step through
the elements of a table, array or matrix, i.e., x1, x2, x3, x4.
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Computer Organization and Architecture: Themes and Variations, 1st Edition Clements

Register Transfer Language (RTL) Notation

 In RTL notation, square brackets indicate the contents of a memory location.
o For example, The expression [15] = Max_Run means
“the content of memory location 15 is equal to the value of Max_Run ”,
I.e., it is a sort of initialization not an assignment.
 The backward arrow symbol, , indicates a data transfer.
o For example, [15]  [15] + 1 means
“the content of memory location 15 is increased by 1”
and
“the result is put in memory location 15”.
 Consider:
a. [20] = 6
b. [20]  6
c. [20]  [6]
(a) states that the content of memory location 20 is equal to the number 6.
(b) states that the number 6 is put into memory location 20.
(c) states that the contents of memory location 6 is copied into 28
memory location 20.

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Computer Organization and Architecture: Themes and Variations, 1st Edition Clements

Three Address Instructions

 Consider the three-address format:
o Operation Address1, Address2, Address3
where Operation specifies the action of the instruction, whereas
Address1, Address2, and Address3, are locations of the three operands
in memory.
o We use bold font to indicate the address that is the destination of data.
 In this example, the operands are the addresses of data and not the data itself.
 ADD P, Q, R, is a three-operand instruction
o P, Q, and R are the symbolic names of the addresses of three memory locations.
 The three-operand format can be expressed in RTL notation as:
o [Address1]  [Address2] Operation [Address3]
 The contents of the memory locations specified by Address2 and Address3 are
operated on by the operation (e.g., add, subtract, …), and the result is placed in the
memory location specified by Address1.
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Three Address Instructions

 Although memory addresses are numeric (in this case we use binary numbers 000 to
111), we normally use symbolic names because they are easier for us to remember.
 If you write P in a program, it is automatically translated to address 101.

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Computer Organization and Architecture: Themes and Variations, 1st Edition Clements

Three Address Instructions

 Figure 1.14 shows a hypothetical computer that has an instruction with three
addresses; for example, ADD P, Q, R which implements [P]  [Q] + [R].
Here P, Q, and R are the symbolic names of their locations in memory.
 The purpose of this figure is to show the flow of information when an instruction is
executed and to demonstrate the possible structure of an instruction.

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Computer Organization and Architecture: Themes and Variations, 1st Edition Clements

Two Address Instructions

 Some computers implement a two-address instruction format of the form
Operation Address1, Address2
o where Address2 is a source operand and
o Address1 is both a source and a destination operand.
 This operand is accessed, operated on, and the result placed in the
same location.
o The definition of ADD P,Q, is [P]  [P] + [Q]
 A two-address instruction destroys one of the operands;
that is, source operand P is replaced (overwritten) by the result.
 Practical computers do not generally allow you to use three or two
main memory addresses in the same instruction.
o Computers like the Core i7 processors specify one address in memory
and a second address is a register.
 A register is a single storage element in the computer with a name
like r0, r1, r2 … or r31 and is used to hold temporary data during
calculations.
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 A register behaves like a memory location except that it is located
within the CPU.
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Computer Organization and Architecture: Themes and Variations, 1st Edition Clements

Memory Hierarchy
 An important characteristic of modern computers is the wide range of technologies
used to implement computers.
 Figure 1.16 illustrates memory hierarchy that covers the memory system of a typical
computer.
 At the top are small amounts of on-chip register memory.
At the bottom are the large quantities of storage provides by hard disks.

This ratio is based FYI: 1:20,000,000 is

on number of units, like the ratio between
not based on 1 second to 231.5
number of bytes. days, i.e., more than
7.5 months.
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The Bus
 Buses link together two or more functional parts of a computer and allow the
exchange of data;
o for example, the bus between the CPU and its graphics card.
 Buses also link computers to external peripherals;
o for example, the USB bus that connects a printer to a computer.
 Figure 1.17 illustrates the structure of a hypothetical system without a bus. Imagine
that the blue circles are processing units that must communicate with each other.
 In this example some units communicate directly with only one other unit, whereas
other units must communicate with several devices.

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The Bus
 Figure 1.18 illustrates the structure of a system with a bus.
 Functional units may
 request the bus,
 use it to communicate with other units and then
 relinquish the bus.
 Internal buses (within the CPU or on the motherboard) and
external buses (USB, FireWire) are vital components of the computer system and
contribute to its overall performance.

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The Bus
 Figure 1.19 illustrates the structure of a system with two buses.
 Multiple buses permit parallel operation because transactions on each bus can take
place simultaneously.
 Each bus may be optimized for its specific application (e.g., a high-speed bus for
graphics and a lower speed bus for peripherals).

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Bus Terminology
Width The width of a bus is defined as the number of parallel data paths.
A 64-bit bus can carry 64-bits (8 bytes) of data at a time.
However, the same term can also be used to indicate the total
number of wires (connections) that make up a bus. For example, a
bus may have 50 information paths of which 32 of them carry data
(the rest may be paths for control signals or even power lines).

Bandwidth The bandwidth of a bus is a measure of the rate at which

information can be transported across the bus. The bandwidth is
expressed in either bytes per second or bits per second.
Increasing the width of a bus while keeping the data rate per wire
constant increases the bandwidth.

Latency Latency is the waiting period between a data transfer request and
the actual data transmission completed.
Typically, a bus’s latency includes the time taken to arbitrate
for the bus before transmission can take place. 37

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