UNIT Ill Memory Management: Swapping, contiguous memory allocation, segmentation, paging, structure of the page table. Virtual memory: demand paging, page-replecement, Allocation of frames, Thrashing, Memory-Mapped Files, Allocating Kernel Memory, Examples Memory Management: In computer each process has a separate memory space. Separate per-process memory space protects the processes from each other and is fundamental to having multiple processes loaded in memory for concurrent execution. To separate memory spaces, we need the ability to determine the range of legal addresses that the process may access and ‘to ensure that the process can access only these legal addresses. We can provide this protection by using two registers, usually a base and a Limit, as illustrated in Figure 8.1.The base register holds the smallest legal physical memory address; the limit register specifies, the size of the range. For example, if the base register holds300040 and the limit register is 120900, then the program can legally access all addresses from 300040 through 420939 (inclusive) ° ‘operating ‘stern 256009 process ‘so0n40 300040 base 420040 peso) limit ‘880000 1024000 ‘A.base and a limit register define a logical address space, Memory management is the functionality of an operating system which handles or manages primary memory and moves processes back and forth between main memory and disk during execution. Memory management keeps track of each and every memory location, regardless of either it is allocated to some process or it is free. It checks how much memory is to be allocated to processes. It decides which process will get memory at what time. It tracks whenever some memory gets freed or unallocated and correspondingly it updates the status. Process Address Space: The operating system takes care of mapping the logical addresses to physicaladdresses at the time af memory allocation to the program. Logical and Physical Addresses + Logical address: generated bya process running on the CPU, also called a virtual address = Physical address: seen by the memory unit + Memory-Management Unit (MMU): hardware device that maps logical addresses to physical addresses ‘aeaion This simple MMU adds Ene the value stored in a tegeat piyseat relocation register to the [eau] LVL 8 | enone logical addresses that “ ves arrive from the CPU. nu LOGICAL ADDRESS VERSUS PHYSICAL ADDRESS Virtual and physical addresses are the sme in compile-time and load-time addressbinding schemes, Virtual and physical addresses differ in execution-time address-binding scheme. The set of all logical addresses generated by a program is referred to asa logical address space. The set of all physical addresses corresponding to these logical addresses is referred to as a physical address space. The runtime mapping from virtual to physical address is done by the memorymanagement unit (MMU) which is a hardware device. MMU uses following mechanism to convert virtual address to physical address. * The value in the base register is added to every address generated by a user process, Which is treated as offset at the time it is sent to memory. For example, if the base register Value is 10000, then an attempt by the user to use address location 100 will be dynamically Reallocated to location 10100 Swapping: Swapping is a mechanism in which a process can be swapped temporarily out of main memory (or move) to secondary storage (disk) and make that memory available to other processes. At some later time, the system swaps back the process from the secondary storage to main memory. Though performance is usually affected by swapping process but it helps in running multiple and big processes in parallel and that's the reason Swapping is also known as a technique for memory compaction. operating ‘system user space backing store ‘main memory Figure 8.5 Swapping of two processes using a disk as a backing store.Secondary Memory Main Memory cm Lee Pr goes for VO watt The total time taken by swapping process includes the time it takes to move the entire process to a secondary disk and then to copy the process back to memory, as well as the time the process takes to regain main memory. Let us assume that the user process is of size 2048KB and on a standard hard disk where swapping will take place has a data transfer rate around 1 MB per second. The actual transfer of the 100K process to or from memory will take 2048KB / 1024KB per second = 2 seconds 2000 milliseconds Now considering in and out time, it will take complete 4000 milliseconds plus other overhead where the process competes to regain main memory. Memory Allocation Main memory usually has two partitions - + Low Memory ~ Operating system resides in this memory. « High Memory - User processes are held in high memory. Operating system uses the following memory allocation mechanism.S.N. Memory Allocation & Description 1 Single-partition allocation In this type of allocation, relocation-register scheme is used to protect user processes from each other, and from changing operating-system code and data. Relocation register contains value of smallest physical address whereas limit register contains range of logical addresses. Each logical address must be Jess than the limit register. 2 Multiple-partition allocation In this type of allocation, main memory is divided into a number of fixed-sized partitions where each partition should contain only one process. When a partition is free, a process is selected from the input queue and is loaded into the free partition. When the process terminates, the partition becomes available for another process. Contiguous Memory Allocation: In contiguous memory allocation each process is contained in a single contiguous block of memory. Memory is divided into several fixed size partitions. Each partition contains exactly one process. When a partition is free, a process is selected from the input queue and loaded into it. The free blocks of memory are known as holes. The set of holes is searched to determine which hole is best to allocate. Memory Protection Memory protection is a phenomenon by which we control memory access rights on a computer. The main aim of itis to prevent a process from accessing memory that has not been allocated to it. Hence prevents a bug within a process from affecting other processes, or the operating system itself, and instead results in a segmentation fault or storage violation exception being sent to the disturbing process, generally Killing of process, Memory Allocation Memory allocation isa process by which computer programs are assigned memory or space. It is of three types: First Fit: The first hole that is big enough is allocated to program. Best Fit: The smallest hole that is big enough is allocated to program. Worst Fit: The largest hole that is big enough is allocated to program.The contiguous memory allocation scheme can be implemented in operating systems with the help of two registers, known as the base and limit registers. When a process is executing in main memory, its base register contains the starting address of the memory location where the process is executing, while the amount of bytes consumed by the process is stored in the limit reaister. A process does not directly refer to the actual address for a corresponding memory location. Instead, it uses a relative address with respect to its base register. All addresses referred by a program are considered as virtual addresses. The CPU generates the logical or virtual address, which is converted into an actual address with the help of the memory management unit (MMU). The base address register is used for address translation by the MMU. Thus, e physical address is calculated as follows: Physical Address = Base register address + Logical address/Virtual address The address of any memory location referenced by a process is checked to ensure that it does not refer to an address of a neighboring process. This processing security is handled by the underlying operating system. One disadvantage of contiguous memory allocation is, that the degree of multiprogramming is reduced due to processes waiting for free memory. Operating System keeps track of available free memory areas. There are three approaches to select a free partition from the set of available blocks. First Fit: It allocates the first free large area whose size is >= program size, Searching may start from either beginning of the list or where previous first-fit search ended. Limitation of this technique is that it may split a free area repeatedly and produce smaller size of blocks that may consider as external fragmentation. os. os. 512K 512K 12K 256K ‘312K 8K 312K 312K 512K 758K (a)equatsize (b)Urequelsize ‘Example of fed size partitioning Best Fit: it allocates the smallest free area with size >= program size. We have to search the entire free list to find out the smallest free hole so it has higher allocation cost. Limitation of this technique is that in long run it too may produce numerous unusable small free areas. It also suffers from higher allocation cost because it has to process entire free list at every allocation Worst Fit (Next Fit):The worst fit technique is a compromise between these two techniques. It remembers the entry of last allocation. It searches the free list starting from the previous allocation for the first free area of size >= program size. The first fit technique is better than best fit. Both first fit and next fit performs better than best fit. Example: A free list contains three free areas of size 200, 170 and 500 bytes respectively (figure a). Processes sends allocation requests for 100, 50 and 400 bytes The first fit technique will allocate 100 and 50 bytes from the first free area leaving a free area of 50 bytes. it allocates 400 bytes from the third free area The best fit technique will allocate 100 and 50 bytes from the second free area leaving a free area of 20 bytes. The next fit technique allocates 100, 50 and 400 bytes from the three free areas. oo - i= i, | 0 ) “ woe «) om 10060, @) mom aoe] core, Segmentation: Segmentation is a memory management technique in which each job is divided into several segments of different sizes, one for each module that contains pieces that perform related functions. Each segment is actually a different logical eddress space of the program. When a process is to be executed, its corresponding segmentation are loaded into non-contiguous memory though every segment is loaded into a contiguous block of available memory. Segmentation memory management works very similar to paging but here segments are of variable-length where as in paging pages are of fixed size. ‘A program segment contains the program's main function, utility functions, data structures, and so on. The operating system maintains a segment map table for every process and a list of free memory blocks along with segment numbers, their size and corresponding memory locations in main memory. For each segment, the table stores thestarting address of the segment and the length of the segment. A reference to a memory location includes a value that identifies a segment and an offset. Process P Segmentation Hardware: Although the programmer can now refer to objects in the program by a two-dimensional address, the actual physical memory is still, of course, a one-dimensional sequence of bytes. Thus, we must define an implementation to map two-dimensional user-defined addresses into one-dimensional physical addresses. This mapping is effected by a segment table. Each entry in the segment table has a segment hase and a segment limit. The segment base contains the starting physical address where the segment resides in memory, and the segment limit specifies the length of the segment. The use of a segment table is illustrated in Figure 8.8. A logical address consists of two parts: a segment number, s, and an offset into that segment, d. The segment number is used as an index to the segment table. The offset d of the logical address must be between O and the segment limit. If it is not, we trap to the operating system (logical addressing attempt beyond end of segment).When an offset is legal, it is added to the segment base to produce the address in physical memory of the desired byte. The segment table is thus essentially an array of base — limit register pairs. We have five segments numbered from 0 through 4. The segments are stored in physical memory as shown. The segment table has a separate entry for each segment, giving the beginning address of the segment in physical memory (or base) and the length of that segment (or limit). For example, segment 2 is 400 bytes long and begins at location 4300. ‘Thus, a reference to byte 53 of segment 2 is mapped onto location 4300 + 53 = 4353. A reference to segment 3, byte 852, is mapped to3200 (the base of segment 3) + 852 = 4052. A reference to byte 1222 of segment0 would result in a trap to the operating system, as this segment is only 1,000bytes long.trap: adtressing eror physical memory Figure 88 Segmentation hardware baeal § Figures.9. Example o! segmentation Paging A computer can address more memory than the amount physically installed on the system. This extra memory is actually called virtual memory and itis a section of a hard that's set up to emulate the computer's RAM. Paging technique plays an important role in implementing virtual memory. Paging is a memory management technique in which process address space is broken into blocks of the same size called pages (size is power of 2, between 512 bytes and 8192 bytes). The size of the process is measured in the number of pages.Similarly, main memory is divided into small fixed-sized blocks of (physical) memory called frames and the size of a frame is kept the same as that of a page to have optimum utilization of the main memory and to avoid external fragmentation. Secendry Menory aot — Seasoorme | | meet Teton | | ped Tonner | [ree | a —, aes = Sewntn0oors | | nee eens | | me? Address Translation Page address is called logical address and represented by page numberand the offset. Logical Address = Page number + page offset Frame address is called physical address and represented by a frame number and the offset. Physical Address = Frame number + page offset A data structure called page map table is used to keep track of the relation between a page of a process to a frame in physical memory. When the system allocates a frame to any page, it translates this logical address into a physical address and create entry into the page table to be used throughout execution of the program. When a process is to be executed, its corresponding pages are loaded into any available memory frames. Suppose you have a program of 8Kb but your memory can accommodate only 5Kb at a given point in time, then the paging concept will come intopicture. When a computer runs out of RAM, the operating system (0S) will move idle or unwanted pages of memory to secondary memory to free up RAM for other processes and brings them back when needed by the program. This process continues during the whole execution of the program where the OS keeps removing idle pages from the main memory and write them onto the secondary memory and bring them back when required by the program Advantages and Disadvantages of Paging Here isa list of advantages and disadvantages of paging - + Paging reduces external fragmentation, but still suffer from internal fragmentation. « Paging is simple to implement and assumed as an efficient memory management technique. + Due to equal size of the pages and frames, swapping becomes very easy. Page table requires extra memory space, so may not be good for a system having small RAM =. Figure 8.10 Paging hardware. treme number ° off tie 1| page 0 2s 2 sz page table 3| page 2 | page 1 . 7| page 3 ‘physical mramory Figure 8.11 Paging model of logical and physical memory.Non-Contiguous memory allocation Paging divides program into fixed size pages. Non-contiguous memory allocation ‘Segmentation divides program into variable sie segments, OS is responsible Compilers responsible. Pagingis faster than segmentation Pagingis closer to Operating System It suffers from internal fragmentation ‘Segmentation is slower than paging ‘Segmentation is closer to User It suffers from external fragmentation ‘There is no external fragmentation ‘There is no external fragmentation Logical address is divided into page number and page | Logical address is divided into segment offset number and segment offset ie vntai is i ‘Segment Table maintains the segment Page table is used to maintain the page information. || age table entry has the frame number and some flag. bits to represent details about pages. Structure of the page table: ‘Segment table entry has the base address ‘of the segment and some protection bits for the segments. ‘The data structure that is used by the virtual memory system in the operating system of a computer in order to store the mapping between physical and logical addresses is commonly known as Page Table. As we had already told you that the logical address that is generated by the CPU is translated into the physical address with the helo of the page table. © Thus page table mainly provides the corresponding frame number (base address of the frame) where that page is stored in the main memory,Frame Number ° 1 1 2 2 3 Logical Memory 4 3 Page Table 4 Physical Memory ‘The above diagram shows the paging model of Physical and logical memory. Characteristics of the Page Table Some of the characteristics of the Page Table are as follows: © Itis stored in the main memory. * Generally; the Number of entries in the page table = the Number of Pages in which the process is divided. ‘* TBR means page table base register and it is basically used to hold the base address for the page table of the current process. © Each process has its own independent page table. Techniques used for Structuring the Page Table Some of the common techniques that are used for structuring the Page table are as follows: 1. Hierarchical Paging 2, Hashed Page Tables 3. Inverted Page Tables Let us cover these techniques one by one; Hierarchical Paging Another name for Hierarchical Paging is multilevel paging. © There might bea case where the page table is too big to fit in a contiguous space, so we may have a hierarchy with several levels. ‘© In this type of Paging the logical address space is broke up into Multiple pagetables. © Hierarchical Paging is one of the simplest techniques and for this purpose 2 two- level page table and three-level page table can be used. Two Level Page Table Consider a system having 32-bit logical address space and a page size of 1 KBand itis further divided into: ‘* Page Number consisting of 22 bits. © Page Offset consisting of 10 bits. As we page the Page table, the page number is further divided into ‘* Page Number consisting of 12 bits. © Page Offset consisting of 10 bits. Thus the Logical address is as follows: Page Number Page Offset PA P2 d 2 10 10 In the above diagram, P1 is an index into the Outer Page table. P2 indicates the displacement within the page of the Inner page Table. As address translation works from outer page table inward so is known as forward-mapped Page Table. Below given figure below shows the Address Translation scheme for a two-level page table Logical Address p1|p2] a Pt 1 Sar P2t Outer Page table d Page of page table Three Level Page Table For a system with 64-bit logical address space, a two-level paging scheme is not appropriate. Let us suppose that the page size, in this case, is 4KB.If in this case, we will use the two-page Level scheme then the addresses will Look like this: outer page inner page _ offset pt p2 | d a2 10 2 ‘Thus in order to avoid such a large table, there is a solution and that is to divide the outerpage table, and then it will result in a Three-level page table: And outer page outer page _innerpage _ offset pt p2 p2 d @ 0 0 a Hashed Page Tables This approach is used to handle address spaces that are larger than 32 bits. In this virtual page, the number is hashed into a page table. © This Page table mainly contains a chain of elements hashing to the same elements. Each element mainly consists of : 1. The virtual page number 2. The value of the mapped page frame. 3. A pointer to the next element in the Linked List. Given below figure shows the address translation scheme of the Hashed Page Table: a a The above Figure shows Hashed Page Table The Virtual Page numbers are compared in this chain searching for a match; if the match is found then the corresponding physical frame is extracted In this scheme, a variation for 64-bit address space commonly uses clustered page tables. Clustered Page Tables ‘© These are similar to hashed tables but here each entry refers to several pages (that is 16) rather than 1. ‘Mainly used for sparse address spaces where memory references are non- contiguous and scattered Inverted Page Tables The Inverted Page table basically combines A page table and A frame table into a single data structure.© There is one entry for each virtual page number and a real page of memory ‘© And the entry mainly consists of the virtual address of the page stored in that real memory location along with the information about the process that owns the page ‘* Though this technique decreases the memory that is needed to store each page table; but it also increases the time that is needed to search the table whenever 2 page reference occurs. Given below figure shows the address translation scheme of the Inverted Page Table: Physical Address Page Table In this, we need to keep the track of process id of each entry, because many processes may have the same logical addresses. Also, many entries can map into the same index in the page table after going through the hash function. Thus chaining is used in order to handle this, Virtual memory: A computer can address more memory than the amount physically installed on the system. This extra memory is actually called virtual memory and it is a section of a hard disk that's set up to emulate the computer's RAM. The main visible advantage of this scheme is that programs can be larger than physical memory, Virtual memory serves two purposes. First, it allows us to extend the use of physical memory by using disk. Second, it allows us to have memory protection, because each virtual address is translated to a physical address. Following are the situations, when entire program is not required to be loaded fully in main memory. > User written error handling routines are used only when an error occurred in the data or computation. > Certain options and features of a program may be used rarely. Many tables are assigned a fixed amount of address space even though only a small amount of the table is actually used. > The ability to execute 2 program that is only partially in memory would counter many> Less number of I/O would be needed to load or swap each user program into memory > A program would no longer be constrained by the amount of physical memory that is available. > Each user program could take less physical memory, more programs could be run the same time, with a corresponding increase in CPU utilization and throughput. Madern microprocessors intended for general-purpose use, a memory management unit, or MMU, is built into the hardware. The MMU's job is to translate virtual addresses into physical addresses. A basic example is given below — Virtual memory is commonly implemented by demand paging. It can also be implemented in a segmentation system. Demand segmentation can also be used to provide virtual memory Demand paging: A demand paging system is quite similar to a paging system with swapping where processes reside in secondary memory and pages are loaded only on demand, not in advance. When a context switch occurs, the operating system does not copy any of the old program's pages out to the disk or any of the new program's pages into the main memory Instead, it just begins executing the new program after Loading the first page and fetches that program's pages as they are referenced.Secondary Memory Main Menon recess spin iB a « 8 , L € c ™ 2 ° ” t E ° ° rocess2 swapout a * 7 a € é . 4 # 7 1 t a 7 1 7 go oa regan . - Howe a oom Bees oven Large virtual memory. > More efficient use of memory. > There is no limit on degree of multiprogramming, Disadvantages Number of tables and the amount of processor overhead for handling page interrupts aregreater than in the case of the simple paged management techniques. Page Replacement Algorithms Page replacement algorithms are the techniques using which an Operating System decides which memory pages to swap out, write to disk when a page of memory needs to be allocated. Paging happens whenever a page fault occurs and a free page cannot be used for allocation purpose accounting to reason that pages are not available or the number of free pages is lower than required pages. When the page that was selected for replacement and was paged out, is referenced again, it has to read in from disk, and this requires for I/O completion. This process determines the quality of the page replacement algorithm: the lesser the time waiting for page-ins, the better is the algorithm. A page replacement algorithm looks at the limited information about accessing the pages provided by hardware, and tries to select which pages should be replaced to minimize the total number of page misses, while balancing it with the costs of primary storage and processor time of the algorithm itself. There are many different page replacement algorithms We evaluate an algorithm by running it on a particular string of memory reference and computing the number of page faults, Reference String The string of memory references is called reference string. Reference strings are generated artificially or by tracing a given system and recording the address of each memory reference. The latter choice produces a large number of data, where we note two things. For a given page size, we need to consider only the page number, not the entire address. If we have a reference to a page p, then any immediately following references to page p will never cause a page fault. Page p will be in memory after the first reference; the immediately following references will not fault. For example, consider the following sequence of addresses - 125,215,600, 1254,76,96 If page size is 100, then the reference string is 1,2,6,12,0,0 First In First Out (FIFO) algorithm Oldest page in main memory is the one which will be selected for replacement. Easy to implement, keep a list, replace pages from the tail and add new pages at the head. Reference String :0, 2, 1, 6,4,0, 1, 0, 3,1, 2,1 ° a a 4 a 2 2| 4 2| 25 fo} cafe] 2, fo] 22, [oe 2 1 2 2 2 2 6 6 6 6 a a Fault Rate =9/12 = 0.75 Optimal Page algorithm An optimal page-replacement algorithm has the lowest page fault rate of all algorithms.An optimal page-replacement algorithm exists, and has been called OPT or MIN. Replace the page that will not be used for the longest period of time. Use the time when a page is to be used. Reference String: 0, 2, 1. 6. 4,0,1,0,3,1,2,1 Misses rx x x x ° ° 3 3 2 2 2 2 2 2 6 4 4 Fault Rate= 6/12 =050 Least Recently Used (LRU) algorithm Page which has not been used for the longest time in main memory is the one which will be selected for replacement. Easy to implement, keep a List, replace pages by looking back Referencetring: 0, 2, 1, 6, 4, 0,1,0,3,2,2,1 Misses IKEKK KK Ox x ° 4 4 2 o ° ° — 2 2 6 6 Foult Rate = 8/12 =0.67 into time. What is a Page Fault? If the referred page is not present in the main memory then there will be a miss and the concept is called Page miss or page fault. The CPU has to access the missed page from the secondary memory. If the number of page fault is very high then the effective access time of the system will become very high. What is Thrashing? IF the number of page faults is equal to the number of referred pages or the number of page faults are so high so that the CPU remains busy in just reading the pages from the secondary memory then the effective access time will be the time taken by the CPU to read one word from the secondary memory and it will be so high. The concept is called thrashing. If the page fault rate is PF %, the time taken in getting a page from the secondarymemory and again restarting is S (service time) and the memory access time is ma then the effective access time can be given as; EAT = PF XS + (1 - PF) X (ma) Thrashing A process that is spending more time paging than executing is said to be thrashing. In other words it means, that the process doesn’t have enough frames to hold all the pages for its execution, so it is swapping pages in and out very frequently to keep executing. Sometimes, the pages which will be required in the near future have to be swapped out. Initially when the CPU utilization is low, the process scheduling mechanism, to increase the level of multiprogramming loads multiple processes into the memory at the same time, allocating a limited amount of frames to each process. As the memory fills up, process starts to spend a lot of time for the required pages to be swapped in, again leading to low CPU utilization because most of the processes are waiting for pages. Hence the scheduler loads more processes to increase CPU utilization, as this continues at a point of time the complete system comes to a stop. A (CPU Utitestion To prevent thrashing we must provide processes with as many frames as they really need "right now" Memory-Mapped Files: We can use standard system calls like read(), seek(), open(), and so on to perform a sequential read of a file present on the disk. Thus, to access a file from the disk we need system calls and disk access. Memory mapping is a technique that allows a part of the virtual address space to be associated with a file logically. This technique of memory mapping leads to a significant increase in performance. Basic Mechanism of Memory Mapping ‘© The Operating System uses virtual memory for memory mapping a file. It is performed by mapping a disk block to @ page present in the physical memory. initially, the file is accessed through demand paging. If a process references an address that does not exist in the physical memory, then page fault occurs and the Operating System takes charge of bringing the missing page into the physical memory. © Apage-sized portion of the file is read from the file system into a physical page. ‘© Manipulating the files through the use of memory rather than incurring the overhead of using the read0 and write() system calls not only simplifies but alsospeeds up file access and usage. ‘* Multiple processes may be allowed to mapa single file simultaneously to allow sharing of data. © If any of the processes write data in the virtual memory, then the modified data will be visible to all the processes that map the same section of the file. The memory mapping system calls support copy-on-write functionality which allows processes to share a file in read-only mode but the processes can have their ‘own copies of data that they have modified. The sharing of memory is depicted with the help of a diagram shown below. Physical Memory Process 1 virtual memory virtual memory Disk file ‘Types of Memory Mapped Files Basically, there are two types of memory mapped files: © Persisted: Persisted files are connected with a source file on a disk. After completing the final process, the data is saved to the source file on disc. Working with very big source files is appropriate with these type of memory-mapped files. © Non-persisted: Non-persisted files are not connected to any disk-based files. Thedata is lost when the last process with the file completes its required task. The shared memory that these files enable for inter-process communications or IPC. Advantages of Memory Mapped Files ‘© Itincreases the 1/0 performance especially when it is used on large files. ‘* Accessing memory mapped file is faster than using direct system calls like read) and write(). © Another advantage is lazy loading where small amount of RAM is used for a very large file. ‘© Shared memory is often implemented by memory mapping files. Thus, it supports data sharing Disadvantages of Memory Mapped Files ‘© In some cases, memory mapped file I/O may be substantially slower as compared. to standard file 1/0. Only hardware architecture that has MMU (Memory Management Unit) supports memory mapped files. ‘* In memory mapped files , expanding the size of a file is not easy. Allocating Kernel Memot Allocating kernel memory is a critical task in operating system design, as the kernel needs to manage memory efficiently and effectively to ensure optimal system performance. Two common methods for allocating kernel memory are the buddy system and the slab system. 1. Buddy system — Buddy allocation system is an algorithm in which a larger memory block is divided into small parts to satisfy the request. This algorithm is used to give best fit. The two smaller parts of block are of equal size and called as buddies. In the same manner one of the two buddies will further divide into smaller parts until the requests fulfilled. Benefit of this technique is that the two buddies can combine to form the block of larger size according to the memory request. Example - If the request of 25Kb is made then block of size 32Kb is allocated. y Y [= c= =2. Slab Allocation — A second strategy for allocating kernel memory is known as slab allocation. It eliminates fragmentation caused by allocations and deallocations. This method is used to retain allocated memory that contains a data object of a certain type for reuse upon subsequent allocations of objects of the same type. In slab allocation memory chunks suitable to fit data objects of certain type or size are preallocated. Cache does not free the space immediately after use although it keeps track of data which are required frequently so that whenever request is made the data will reach very fast. Two terms required are: © Slab - A slab is made up of one or more physically contiguous pages. The slab is the actual container of data associated with objects of the specific kind of the containing cache. © Cache - Cache represents a small amount of very fast memory. A cache consists of one or more slabs. There is a single cache for each unique kernel data structure. kemel objects Gis Slabs kb | objects a" physical — Eontigious pases Fy kp objects | Example— © Aseparate cache for a data structure representing processes descriptors © Separate cache for file objects © Separate cache for semaphores etc