Bus Arbitration
Bus Arbitration
Introduction:
In a computer system, multiple devices, such as the CPU, memory, and I/O controllers, are
connected to a common communication pathway, known as a bus. In order to transfer data
between these devices, they need to have access to the bus. Bus arbitration is the process of
resolving conflicts that arise when multiple devices attempt to access the bus at the same
time.
When multiple devices try to use the bus simultaneously, it can lead to data corruption and
system instability. To prevent this, a bus arbitration mechanism is used to ensure that only
one device has access to the bus at any given time.
There are several types of bus arbitration methods, including centralized, decentralized, and
distributed arbitration. In centralized arbitration, a single device, known as the bus controller,
is responsible for managing access to the bus. In decentralized arbitration, each device has
its own priority level, and the device with the highest priority is given access to the bus. In
distributed arbitration, devices compete for access to the bus by sending a request signal and
waiting for a grant signal.
Bus Arbitration refers to the process by which the current bus master accesses and then
leaves the control of the bus and passes it to another bus requesting processor unit. The
controller that has access to a bus at an instance is known as a Bus master.
A conflict may arise if the number of DMA controllers or other controllers or processors try
to access the common bus at the same time, but access can be given to only one of those.
Only one processor or controller can be Bus master at the same point in time. To resolve
these conflicts, the Bus Arbitration procedure is implemented to coordinate the activities of
all devices requesting memory transfers. The selection of the bus master must take into
account the needs of various devices by establishing a priority system for gaining access to
the bus. The Bus Arbiter decides who would become the current bus master.
Applications of bus arbitration in computer organization:
Shared Memory Systems: In shared memory systems, multiple devices need to access the
memory to read or write data. Bus arbitration allows multiple devices to access the memory
without interfering with each other.
Multi-Processor Systems: In multi-processor systems, multiple processors need to
communicate with each other to share data and coordinate processing. Bus arbitration allows
multiple processors to share access to the bus to communicate with each other and with shared
memory.
Input/Output Devices: Input/Output devices such as keyboards, mice, and printers need to
communicate with the processor to exchange data. Bus arbitration allows multiple
input/output devices to share access to the bus to communicate with the processor and
memory.
Real-time Systems: In real-time systems, data needs to be transferred between devices and
memory within a specific time frame to ensure timely processing. Bus arbitration can help to
ensure that data transfer occurs within a specific time frame by managing access to the bus.
Embedded Systems: In embedded systems, multiple devices such as sensors, actuators, and
controllers need to communicate with the processor to control and monitor the system. Bus
arbitration allows multiple devices to share access to the bus to communicate with the
processor and memory.
There are two approaches to bus arbitration:
1. Centralized bus arbitration –
A single bus arbiter performs the required arbitration.
2. Distributed bus arbitration –
All devices participating in the selection of the next bus master.
Methods of Centralized BUS Arbitration:
There are three bus arbitration methods:
(i) Daisy Chaining method: It is a simple and cheaper method where all the bus masters use
the same line for making bus requests. The bus grant signal serially propagates through each
master until it encounters the first one that is requesting access to the bus. This master blocks
the propagation of the bus grant signal, therefore any other requesting module will not receive
the grant signal and hence cannot access the bus.
During any bus cycle, the bus master may be any device – the processor or any DMA
controller unit, connected to the bus.
Advantages:
• Simplicity and Scalability.
• The user can add more devices anywhere along the chain, up to a certain
maximum value.
Disadvantages:
• The value of priority assigned to a device depends on the position of the master
bus.
• Propagation delay arises in this method.
• If one device fails then the entire system will stop working.
(ii) Polling or Rotating Priority method: In this, the controller is used to generate the
address for the master(unique priority), the number of address lines required depends on the
number of masters connected in the system. The controller generates a sequence of master
addresses. When the requesting master recognizes its address, it activates the busy line and
begins to use the bus.
Advantages –
• This method does not favor any particular device and processor.
• The method is also quite simple.
• If one device fails then the entire system will not stop working.
Disadvantages –
• Adding bus masters is difficult as increases the number of address lines of the
circuit.
(iii) Fixed priority or Independent Request method –
In this, each master has a separate pair of bus request and bus grant lines and each pair has a
priority assigned to it.
The built-in priority decoder within the controller selects the highest priority request and
asserts the corresponding bus grant signal.
Advantages –
• This method generates a fast response.
Disadvantages –
• Hardware cost is high as a large no. of control lines is required.