ACADEMIC PLANNER

Department of CSE Cybersecurity

Subject: Computer organization and Architecture(II B.TECH I SEM )

S.NO CONTENT

(1) - Preamble/Introduction
(2) - Prerequisites
(3) - Objectives and Outcomes
(4) - Syllabus
1. Autonomous-R22
2.GATE
3.IES
(5) - List of Expert Details (Local/National/International
with Contact details/Profile link/Blogs/their research Contribution
towards the subject)
(6) - Journals with min 5 ref paper for literature study
(7) - Subject -Lesson plan
(8) - Suggested Books (prescribed and References)
(9) - Websites for self-learning Resources like
www.geeksforgeeks.org, www.schools.com, Coursera,edX, Udemy, Khan Academy,
NPTEL etc along Registration procedures)
(10) - Question Banks
1.JNTUH/Model papers
2.GATE
(11) - Two case study presentations with Project /
Product/ Model /prototypes/ Industrial applications.
(12) - Assignment Question/Innovative Assignments sets.
(13) - List of topics for students Seminars with Guidelines
(14) - STEP/Course material in softcopy
(15) - Expert Lectures with topics & Schedules(if any)
(1)Preamble/Introduction

This course provides the basics of organizational and architectural issues of a digital computer analyze
performance issues in processor and memory design of a digital computer. It also analyses various data
transfer techniques in digital and performance improvement using instruction level parallelism. All students
of computing should acquire some understanding and appreciation of a computer system’s functional
components, their characteristics, their performance, and their interactions.

(2)Prerequisites

1. Fundamentals of “Numbering System” and “Logical Gates”

(3)Objectives and Outcomes

Course Objectives:

 The purpose of the course is to introduce principles of computer organization and the basic
architectural concepts.
 It begins with basic organization, design, and programming of a simple digital computer and
introduces simple register transfer language to specify various computer operations.
 Topics include computer arithmetic, instruction set design, micro programmed control unit,
pipelining and vector processing, memory organization and I/O systems, and multiprocessors

Course Outcomes:

 Understand the basics of instructions sets and their impact on processor design.
 Demonstrate an understanding of the design of the functional units of a digital computer
system.
 Evaluate cost performance and design trade-offs in designing and constructing a computer
processor including memory.
 Design a pipeline for consistent execution of instructions with minimum hazards.
 Recognize and manipulate representations of numbers stored in digital computers

(4)Syllabus

1.AUTONOMOUS-R22

Computer Organization and Architecture

B.Tech IIYear I Sem 2022-2023 (R22)

Course Code: CS603PC

UNIT - I

Digital Computers: Introduction, Block diagram of Digital Computer, Definition of Computer Organization,
Computer Design and Computer Architecture.

Register Transfer Language and Micro operations: Register Transfer language, Register Transfer, Bus
and memory transfers, Arithmetic Micro operations, logic micro operations, shift micro operations,
Arithmetic logic shift unit.
Basic Computer Organization and Design: Instruction codes, Computer Registers Computer instructions,
Timing and Control, Instruction cycle, Memory Reference Instructions, Input – Output and Interrupt.

UNIT - II

Microprogrammed Control: Control memory, Address sequencing, micro program example, design of
control unit. Central Processing Unit: General Register Organization, Instruction Formats, Addressing
modes, Data Transfer and Manipulation, Program Control.

UNIT – III

Data Representation: Data types, Complements, Fixed Point Representation, Floating Point Representation.
Computer Arithmetic: Addition and subtraction, multiplication Algorithms, Division Algorithms, Floating –
point Arithmetic operations. Decimal Arithmetic unit, Decimal Arithmetic operations.

UNIT – IV

Input-Output Organization: Input-Output Interface, Asynchronous data transfer, Modes of Transfer,

Priority Interrupt Direct memory Access. Memory Organization: Memory Hierarchy, Main Memory,
Auxiliary memory, Associate Memory, Cache Memory.

UNIT - V

Reduced Instruction Set Computer: CISC Characteristics, RISC Characteristics. Pipeline and Vector
Processing: Parallel Processing, Pipelining, Arithmetic Pipeline, Instruction Pipeline, RISC Pipeline, Vector
Processing, Array Processor. Multi Processors: Characteristics of Multiprocessors, Interconnection
Structures, Interprocessor arbitration, Inter-processor communication and synchronization, Cache Coherence.

2.GATE

 Functional units,
 Register Transfer Language,
 Instruction cycle,
 Address sequencing,
 Addressing modes,
 Instruction Formats,
 Data types,
 Data Representation,
 Computer Arithmetic, Input-Output Organization,
 Memory Organization, RISC, pipelining and vector processing

3.IES

Not Applicable

(5) List of Expert Details

The Expert Details which have been mentioned below are only a few of the eminentones known
Internationally, Nationally and Locally. There are a few others known as well.
International:

1. Mr. Tor M.Aamodt, Associate professor,Department of Electrical and Computer

Engineering, University of British Columbia , Canada. email:[email protected], tel
no: +1.604.827.4116
2. Mr. Jaume Abella Ferrer,Senior Research Scientist,Barcelona Supercomputing Center
(BSC),Barcelona – Catalunya, Spain, phone: +34 93 413 71 72
3. A K Ray Ph.D.(IIT Kharagpur) Professor, Electronics & Electrical Communication Engineering. A K
Ray joined the Institute in 1980 ...

National:
1. Mr. Ajai Jain (ajain) ,Professor., IIT , kanpur. Tel: +91 (512) 259-7642

2. Kamalika Datta, Associate Professor, JIS University, Kolkata, India, jisuniversity.ac.in

3. Mr. Shirshendu Das, a research scholar in Indian Institute of Technology Guwahati,
Ph :+919678335987,Email : [email protected] , [email protected]

Local:
1. Dr Aravind
Professor
Hyderabad Institute of Technology and Management
Mobile: 7019933070
2. Dr .D.Baswaraj
Professor
Vasavi College Of Engineering, Hyderabad
Mobile: 9849115882
[email protected]

(6) Journals with min 5 ref paper for literature study

1. TITLE: Design and implementation of Efficient Direct Memory Access (DMA) Controller in
Multiprocessor SoC
AUTHORS: Yasha Jyothi M Shirur; Kritika M Sharma; Aishwarya A

LINK: https://ieeexplore.ieee.org/abstract/document/8903991

2. TITLE: Pipelining to Reduce the Power

AUTHORS: David Chinnery, Kurt Keutzer
LINK: https://link.springer.com/chapter/10.1007/978-0-387-68953-1_3

3. TITLE: Advanced Computer Architecture and Parallel Processing (Wiley Series on Parallel and
Distributed Computing

AUTHORS: Hesham El-Rewini, Mostafa Abd-El-Barr

LINK: https://dl.acm.org/doi/10.5555/1044920

4. TITLE: Computer Architecture

AUTHORS:: Paul J. Fortier, Howard E. Michel
LINK: https://www.sciencedirect.com/topics/computer-science/computer-architecture

5. TITLE: Computer Arithmetic

AUTHORS:: D.P. Agrawal; T.R.N. Rao

LINK: https://ieeexplore.ieee.org/document/1676232

(7) Subject -Lesson plan

S. No Topics/Sub topics covered Lecture Text Book/ ICT Tools
No Reference
Book

UNIT I

1 Introduction, Block diagram of Digital L1 T1, R1,R2 M2(PPT)

Computer

2 Definition of Computer Organization, L2 T1, R1 M1

Computer Design, Computer
Architecture
3 Register Transfer Language , Register L3 T1,R2 M1
Transfer
4 Bus and Memory transfers L4 T1,R1 M1

5 Arithmetic Micro operations, Logic L5-L7 T1 M2(PPT)

Micro Operations, Shift Micro
Operations
6 Arithmetic Logic Shift Unit L8 T1 M2(PPT)

7 Instruction codes, Computer Registers L9 T1,R2 M1

8 Computer instructions. L10 T1 M1

9 Timing and Control, Instruction cycle L11,L12 T1, R3 M2(PPT)

10 Memory Reference Instructions L13 T1 M2(PPT)

11 Input- Output and Interrupt L14 T1 M1

UNIT II
12 Design of control unit. L15 T1,R1,R2 M2(PPT)

13 General Register Organization L16 T1 M2(PPT)

14 Instruction Formats L17 T1 M1

15 Addressing modes L18,L19 T1,R2 M2(PPT)

16 Data Transfer and Manipulation L20,L21 T1 M1

17 Program Control L22 T1 M1

UNIT III

18 Data types, Complements L23 T1 M1

19 Fixed Point Representation, Floating L24,L25 T1,R2 M1

PointRepresentation.
20 Addition and subtraction L26,L27 T1 M1

21 multiplication Algorithms, Division L28,L29 T1 M2(PPT)

Algorithms
22 Floating – point Arithmetic operations L30, L31 T1,R3 M1

UNIT IV

23 Input-Output Interface L32 T1 M1

24 Asynchronous data transfer L33 T1 M1

25 Modes of Transfer L32,L33 T1,R2 M2(PPT)

26 Priority Interrupt Direct memory Access. L34-L36 T1,R3 M2(PPT)

27 Memory Hierarchy, Main Memory L37 T1 M2(PPT)

28 Auxiliary memory, Associate Memory L38-L39 T1 M1

29 Cache Memory. L40 T1 M1

UNIT V

30 CISC Characteristics, RISC L41-L42 T1 M2(PPT)

Characteristics.
31 Parallel Processing, Pipelining L43 T1 M2(PPT)

32 Pipelining, Arithmetic Pipeline L44 T1 M1

33 InstructionPipeline, RISC Pipeline L45,L46 T1 M2(PPT)

34 Vector Processing, Array Processor L47,L48 T1 M2(PPT)

35 Interconnection Structures L49,L50 T1 M2(PPT)

36 Interprocessorarbitration L51 T1 M2(PPT)

37 Interprocessor communication and L52 T1 M2(PPT)

synchronization
)38 Cache Coherence L53,54 T1 M2(PPT)

(8) Suggested Books (prescribed and References)

TEXT BOOKS:

T1: Computer System Architecture – M. Moris Mano, Third Edition, Pearson/PHI.

REFERENCE BOOKS:

R1:Computer Organization – Carl Hamacher, ZvonksVranesic, SafeaZaky, Vth Edition, McGraw Hill.

R2:Computer Organization and Architecture – William Stallings Sixth Edition, Pearson/PHI

R3:Structured Computer Organization – Andrew S. Tanenbaum, 4th Edition, PHI/Pearson
(9) Websites for self-learning Resources like
 https://nptel.ac.in/courses/106/105/106105163/
 https://www.coursera.org/learn/comparch
 https://www.javatpoint.com/computer-organization-and-architecture-tutorial
 https://www.geeksforgeeks.org/computer-organization-and-architecture-tutorials/
 https://www.tutorialspoint.com/differences-between-computer-architecture-and-computer-
organization
(10) Question Bank
1.JNTUH/Model papers

1. Draw the bus system for four registers and explain.

2. Convert the following numbers with the indicated bases to decimal: (213201)4, (4310)5, and (1698)11.
3. What do you understand by Instruction format? How many of its type and how that can be applicable to
solve an arithmetic expression X=(A+B)*(C-D). (
4. An 8-bit register contains the binary value 1001011101. What is the register value after an Arithmetic
Shift Right? Starting from the initial number 10011100, determine the register value after arithmetic
Shift Left, and state whether there is an overflow occur, if yes how it is determine.
5. Draw and explain the functioning of Arithmetic circuits, Logic circuits and Shift micro-operations.
6. What do understand by Instruction cycle? Draw and explain the flowchart for an instruction to execute.
7. Find the solutions of below bases in dotted lines:
8. Draw and explain the functioning of Arithmetic circuits, Logic circuits and Shift micro-operations.
9. What do understand by Instruction cycle? Draw and explain the flowchart for an instruction to execute.
10. Define the addressing mode and briefly describe all the addressing mode techniques.
11. Draw the bus system for four registers and explain.
12. Convert the following numbers with the indicated bases to decimal: (213201) 4, (4310)5, and (1698)11.
(CO2)
13. What do you understand by Instruction format? How many of its type and how that can be applicable to
solve an arithmetic expression X=(A+B)*(C-D).
14. An 8-bit register contains the binary value 1001011101. What is the register value after an Arithmetic
Shift Right? Starting from the initial number 10011100, determine the register value after arithmetic
Shift Left, and state whether there is an overflow occur, if yes how it is determine.
15. There exists three 4-bit registers (A,B, and C) and 4-bit data lines (say D). Design a circuit to transfer
data from any register to any other register including data lines and vice versa.
16. (a) Explain how Flynn classified the processors into different streams by giving an example for each
stream.
(b) Explain tightly coupled and loosely coupled systems with suitable examples
17. Draw the general block diagram of a micro sequencer. Explain clearly the inputs and outputs of the
same along with their functioning.
18. a) Draw a flowchart to explain how addition and subtraction of two fixed point numbers can be done.
Also, draw a circuit using full adders for the same.
(b) Explain Booths algorithm with its theoretical basis.
19. What are the different types of Mapping Techniques used in the usage of Cache Memory? Explain
20. (a) Differentiate I/O Bus and memory Bus.
(b) What are major functional differences between memory mapped I/O and Isolated I/O.

(11) Two case study presentations with Project /

Product/ Model /prototypes/ Industrial applications.

CASE STUDY:

1. A case study on Instruction Cycle: A role play on instruction cycle can be done with the help of
students. There are four phases in the instruction cycle,

 Fetch instruction from memory.

 Decode the instruction.
 Read the effective address from memory.

 Execute the instruction

2. A case study on Assembling and dissembling of a computer

Assembling: Grouping the all parts into the C.P.U is known as assembling

Dissembling: Removing the all parts from the C.P.U is known as disassembling

Steps for assembling the system:

1. Take the case/cabinet and fit the SMPS with the help of the screw drivers.
2. And then place the mother board in the cabinet and fit screws carefully.
3. Connect the hard disk and CD-ROM into the cabinet with help of screw drivers.
4. Connect the power connections to all parts of the computer like motherboard, hard disk and
CD_ROM
5. Insert the IDE cables from mother board to hard disk and CD-ROM
6. Insert the RAM into RAM slots. First we have to check whether RAM is SD (or) DDR.
7. Insert the expansion cards like NIC, network cards, etc...into the PCI slots.
8. Connections of all front panel connectors like power, reset, HDD etc.,
9. Finally check out the connections once and close the cabinet door. at last connect all the power
connectors.

Steps for disassembling the system:

1. First we have to remove the power connections.

2. Check out the power connections once and open the cabinet/case door.
3. Then disassemble the expansion cards like graphic cards, network cards, etc… into the PCI slots.
4. Remove the RAM and Check the grounding in the plug to make sure that earthing is done properly.
5. Then disconnect the power connections to all parts of computer like mother board, hard disk and
CD-ROM
JATIN JAWALE SE CMPN 1 BATCH C2 ROLL NO.28

Internal architectureA Case study on Arithmetic and Logic UnitzzzzzzThe arithmetic logic Unit (ALU) is a
digital circuit used to perform arithmetic and logic operations. It represents the fundamental building block
of the central processing unit (CPU). Modern CPUs contain very powerful and complex ALUs, which is load
data from input registers. A register is a small amount of storage available as part of a CPU. The control unit
tells theALU what operation to perform on that data between these registers, the ALU, and memor
(12) Assignment Question/Innovative Assignments sets.
Assignment Questions

SET I

1. Explain block diagram of digital computer?

2. Explain instruction codes for stored program organization

3. List out register Reference instructions?

4. Draw and explain flow chart of basic computer

SET II

1. Explain Basic computer instructions with examples

2. Draw and explain Block diagram of control unit of basic computer?

3. List out memory reference instructions?

SET III

1. Draw the flow chart of instruction cycle and explain steps involved in instruction cycle?

2. Explain memory reference instructions with flow chart?

3. Explain interrupt cycle with flow chart?

4. Explain Program counter?

SET IV

1. Explain micro programmed control unit?

2. How to select address of next instruction explain with flow chart?

3. Explain Basic computer instruction format?

4. List out register Reference instructions?

Innovative Assignments

1. Explain the Logic gates with examples.

2. Explain the functioning of 4x4 Multiplexer
3. Explain the Functioning of Decoder and Encoder Circuits.
4. Explain the architecture of 8086 Microprocessor.
5. Explain the Register Organization of 8086 Microprocessor.

(13) List of topics for students Seminars with Guidelines.

 Design of Control Unit
 Bus Structure
 Direct Memory Access
 Modes of Transfer
(14) STEP/Course material in softcopy.

(15) Expert Lectures with topics &Schedules

(if any)