FPGA vs CPU vs GPU vs Microcontroller

CPU FPGA GPU ASIC

Overview Traditional sequential Flexible collection of logic Originally designed for Custom integrated circuit
processor for general- elements and IP blocks graphics; now used in a wide optimized for the end
purpose applications that can be configured and range of computationally application
changed in the field intensive applications
Processing Single- and multi-core Configured for application; Thousands of identical Application-specific: may
MCUs and MPUs, plus SoCs include hard or soft IP processor cores include third-party IP cores
specialized blocks: FPU, etc. cores (e.g., Arm)
Programming OSes, APIs run huge range Traditionally HDL (Verilog, OpenCL & Nvidia’s CUDA Application-specific:
of high-level languages; VHDL); newer systems API allow general-purpose TensorFlow open-source
assembly language include C/C++ via openCL programming (e.g., C, C++, framework for Google’s
& SDAccel Python, Java, Fortran) TPU; CPU manufacturers
(e.g., Intel) include tools with
new ASIC releases
Peripherals Wide choice of analog and SoCs include many Very limited; e.g., only cache Tailored to application: may
digital peripherals in MCUs; transceiver blocks, memory include industry-standard
MPUs include digital bus configurable I/O banks functions (USB, Ethernet, etc.)
interfaces
Strengths Versatility, multitasking, Configurable for specific Massive processing power Custom-designed for
ease of programming application; configuration can for target applications— application with optimum
be changed after installation; video processing, image combination of performance
high performance per watt; analysis, signal processing and power consumption
accommodates massively
parallel operation; wide choice
of features: DSPs, CPUs
Weaknesses OS capability adds high Relatively difficult to High power consumption, not Longest development
overhead; optimized for program; second-longest suited to some algorithms; time; high cost; cannot
sequential processing with development time; poor problems must be reformu- be changed without
limited parallelism performance for sequential lated to take advantage of redesigning the silicon
operations; not good for parallelism, but API frame-
floating-point operations works provide abstraction

It’s also worth considering how these choices stack up in some common applications. As shown in the table, designers can often use any or all of
the options either alone or, more likely, in combination.

Applications CPU FPGA GPU ASIC Comments

Vision & image processing ✓ ✓ ✓ FPGA may give way to ASIC in high-volume applications
AI training ✓ GPU parallelism well-suited for processing terabyte data sets in reasonable time
Everyone wants in! FPGAs perhaps leading; high-end CPUs (e.g., Intel’s Xeon) and
AI inference ✓ ✓ ✓ ✓
GPUs (e.g., Nvidia’s T4) address this market
Microsoft’s Bing uses FPGAs; Google uses TPU ASIC; CPU needed for
High-speed Search ✓ ✓ ✓ ✓
coordination & control
Many motor-control MCUs and ASICs available; FPGAs offer a quick-turn ASIC
Industrial motor control (✓) ✓ ✓
alternative
Supercomputer HPC ✓ ✓ Majority of TOP500 supercomputers uses some combination of CPUs and GPUs
General-purpose CPU most versatile, flexible option; GPUs beginning to perform some tasks
✓ (✓)
computing
CPUs ( -> MCU) dominant in low-cost, space-constrained, low-power, mobile
Embedded control ✓ ✓ ✓
applications
FPGAs best choice for low-volume, high-end applications; also pre-silicon
Prototyping, low-volume ✓
validation, post-silicon validation and firmware development

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