+ 2

William Stallings + Chapter 9.1

Computer Organization Instruction Sets: Addressing
and Architecture Modes and Formats
10th Edition

Addressing Modes 3 4

Immediate

Direct

Indirect

Register

Register indirect

Displacement

Stack
5
+ Immediate Addressing 6

Table 13.1
Basic Addressing Modes  Simplest form of addressing

 Operand = A

 This mode can be used to define and use constants or set initial
values of variables
 Typically the number will be stored in twos complement form
 The leftmost bit of the operand field is used as a sign bit

 Advantage:
 No memory reference other than the instruction fetch is required to
obtain the operand, thus saving one memory or cache cycle in the
instruction cycle

 Disadvantage:
 The size of the number is restricted to the size of the address field, which,
in most instruction sets, is small compared with the word length

Direct Addressing 7
+ 8

Indirect Addressing
Address field
contains the
effective address of  Reference to the address of a word in memory which contains a
the operand full-length address of the operand
Effective address
(EA) = address field
 EA = (A)
(A)  Parentheses are to be interpreted as meaning contents of

 Advantage:
Was common in  For a word length of N an address space of 2N is now available
earlier generations
of computers
 Disadvantage:
 Instruction execution requires two memory references to fetch the operand
 One to get its address and a second to get its value
Requires only one
memory reference
and no special  A rarely used variant of indirect addressing is multilevel or cascaded
calculation indirect addressing
 EA = ( . . . (A) . . . )
Limitation is that it
provides only a  Disadvantage is that three or more memory references could be required
limited address to fetch an operand
space
Register Addressing
9
+ 10

Register Indirect Addressing

Address field  Analogous to indirect addressing

refers to a
register rather EA = R  The only difference is whether the address field refers to a
than a main memory location or a register
memory address
 EA = (R)

 Address space limitation of the address field is overcome by

Advantages: Disadvantage: having that field refer to a word-length location containing an
• Only a small • The address space address
address field is is very limited
needed in the
instruction
• No time-consuming
 Uses one less memory reference than indirect addressing
memory references
are required

+ 11
Relative Addressing
12

Displacement Addressing

 Combines the capabilities of direct addressing and register The implicitly referenced register is the program counter (PC)
indirect addressing

 EA = A + (R) • The next instruction address is added to the address field to produce the EA
• Typically the address field is treated as a twos complement number for this
 Requires that the instruction have two address fields, at least one operation
of which is explicit • Thus the effective address is a displacement relative to the address of the
 The value contained in one address field (value = A) is used directly instruction
 The other address field refers to a register whose contents are added
to A to produce the effective address
Exploits the concept of locality
 Most common uses:
 Relative addressing
 Base-register addressing Saves address bits in the instruction if most memory references
 Indexing are relatively near to the instruction being executed
+ 13
Indexing
14

Base-Register Addressing
 The address field references a main memory address and the referenced
register contains a positive displacement from that address

 The method of calculating the EA is the same as for base-register addressing

 The referenced register contains a main memory address and
the address field contains a displacement from that address  An important use is to provide an efficient mechanism for performing
iterative operations
 The register reference may be explicit or implicit
 Autoindexing
 Exploits the locality of memory references  Automatically increment or decrement the index register after each reference to it
 EA = A + (R)
 Convenient means of implementing segmentation  (R)  (R) + 1

 Postindexing
 In some implementations a single segment base register is  Indexing is performed after the indirection
employed and is used implicitly  EA = (A) + (R)

 In others the programmer may choose a register to hold the  Preindexing

base address of a segment and the instruction must reference it  Indexing is performed before the indirection
explicitly  EA = (A + (R))

+ 15 16

Stack Addressing

 A stack is a linear array of locations

 Sometimes referred to as a pushdown list or last-in-first-out queue

 A stack is a reserved block of locations

 Items are appended to the top of the stack so that the block is partially filled

 Associated with the stack is a pointer whose value is the address of the top of
the stack
 The stack pointer is maintained in a register
 Thus references to stack locations in memory are in fact register indirect addresses

 Is a form of implied addressing

 The machine instructions need not include a memory

reference but implicitly operate on the top of the stack
Table 13.2 17 18

x86 Addressing Modes

+ ARM Data Processing Instruction Addressing 19 20

and Branch Instructions

 Data processing instructions

 Use either register addressing or a mixture of register and
immediate addressing
 For register addressing the value in one of the register operands
may be scaled using one of the five shift operators

 Branch instructions
 The only form of addressing for branch instructions is immediate
 Instruction contains 24 bit value
 Shifted 2 bits left so that the address is on a word boundary
 Effective range ± 32MB from from the program counter
Instruction Formats 21
+ 22

Instruction Length
 Most basic design issue

 Affects, and is affected by:

Must include
Define the Memory size
an opcode For most 
layout of the Memory organization
and, implicitly instruction 
bits of an Bus structure
or explicitly, sets more than 
instruction, in Processor complexity
indicate the one 
terms of its Processor speed
addressing instruction 
constituent
mode for each format is used Should be equal to the memory-transfer length or one should
fields 
operand be a multiple of the other

 Should be a multiple of the character length, which is usually

8 bits, and of the length of fixed-point numbers

Allocation of Bits
23 24

Number of Register
Number of
addressing versus
operands
modes memory

Number of Address Address

register sets range granularity
25
+ 26

Variable-Length Instructions

 Variations can be provided efficiently and compactly

 Increases the complexity of the processor

 Does not remove the desirability of making all of the

instruction lengths integrally related to word length
 Because the processor does not know the length of the next
instruction to be fetched a typical strategy is to fetch a number of
bytes or words equal to at least the longest possible instruction
 Sometimes multiple instructions are fetched

27 28
29 30

31 32
+ 33 34

Thumb-2 Instruction Set

 The only instruction set available on the Cortex-M microcontroller

products

 Is a major enhancement to the Thumb instruction set architecture (ISA)

 Introduces 32-bit instructions that can be intermixed freely with the older 16-
bit Thumb instructions
 Most 32-bit Thumb instructions are unconditional, whereas almost all ARM
instructions can be conditional
 Introduces a new If-Then (IT) instruction that delivers much of the functionality
of the condition field in ARM instructions

 Delivers overall code density comparable with Thumb, together with the
performance levels associated with the ARM ISA

 Before Thumb-2 developers had to choose between Thumb for size and
ARM for performance

35
+ Summary Instruction Sets:
36

Addressing Modes
and Formats
Chapter 13
 x86 addressing modes
 Addressing modes
 ARM addressing modes
 Immediate addressing
 Direct addressing  Instruction formats
 Indirect addressing  Instruction length
 Register addressing  Allocation of bits
 Register indirect addressing  Variable-length instructions
 Displacement addressing
 X86 instruction formats
 Stack addressing
 ARM instruction formats
 Assembly language