Arsi University

College of Business and Economics

Department of Computer science

Course Name: Microprocessor and assembly Language

Programming

Academic Year: 2017 EC

Introduction to Microprocessor
• A Microprocessor is an important part of a computer
architecture without which you will not be able to perform
anything on your computer.
• It is a programmable device that takes in input performs
some arithmetic and logical operations over it and produces
the desired output.
• In simple words, a Microprocessor is a digital device on a
chip that can fetch instructions from memory, decode and
execute them and give results.
• At present there are many types and sizes of computers
available. These computers are designed and constructed
based on digital and integrated circuit (IC) fabrication
technology. A digital computer is a machine that can be
used to solve problems for people and carrying out the
tasks by following the instructions given to it. A sequence
of instructions describing how to perform a certain task or
job is called a program. There are two basic components of
computer system architecture:
Computer System Architecture

Hardware Computer Computer Software

✓ Memory Unit ✓ Control Unit ✓ System S/W ✓ Application S/W

✓ Input/Output Unit ✓ Arithmetic/Logic Unit
• Computer Hardware is
equipment involved in the CPU
function of a computer. Control Unit
Input Output
• Computer hardware consists of Devices Devices
the components that can be
Arithmetic/Logic
physically handled. Unit
• The function of these
components is typically divided
into four main categories, these
are: Central Processing Unit Memory Unit
(CPU), Memory Unit, I/O Unit
and System Interconnection
(Buses) that provide the
communication among the CPU,
main memory, and I/O.
General Architecture of Digital Computer
1.CPU: The microprocessor that makes up your personal computer's central processing
unit, or CPU, is the ultimate computer brain. All the other components like RAM, disk
drives, the monitor-exist only to bridge the gap between you and the processor. They
take your data and turn it over to the processor to manipulate; then they display the
results. A CPU consists of several units, including the Arithmetic and Logic Unit
(ALU), local storage for intermediate results (registers), a control unit, and possibly a
cache to speed access to memory.
• ALU (Arithmetic /Logic Unit): is that part of the computer that actually performs
arithmetic and logical operations on data. All of the other elements of the computer
system-control unit, registers, memory, I/O- are there mainly to bring data into the
ALU for it to process and then to take the results back out.
• Registers: are temporary storage areas a computer uses to hold data or instructions
during processing or after it.
• Control Unit: provides the necessary timing and control signals to all the operations in
the computer. It controls the flow of data between the computer and its peripherals, or
inside the computer itself.
2. Memory Unit: The computer memory is a temporary storage area. It holds the
data and instructions that the Central Processing Unit (CPU) needs. Before a
program can be run, the program is loaded from some storage medium into the
memory. This allows the CPU direct access to the program. Memory is like the
page of a notebook with space for a fixed number of binary numbers on each
line.
The memory unit usually described by its size which represents the number of
locations in the memory and its word-length which specify the capacity in bits
for each location in the memory. The information stored in the memory as binary
code in groups of bits called word.
The binary is two logic levels either 0 or 1:
• Bit: is binary digit (1) or (0),
• Byte: is a group of eight bits, and
• Word: is a group of sixteen bits.
Memory categories: ROM and RAM
Read Only Memory (ROM): is a class of storage medium used in
computers and other electronic devices. Data stored in ROM cannot
be modified, or can be modified only slowly or with difficulty. ROM
memories have gradually evolved from fixed read-only memories to
memories than can be programmed and then re-programmed. There
are many type of Re-Programed memory:
➢ROM (Read Only Memory).
➢PROM (Programmable Read Only Memory).
➢EPROM (Erasable Programmable Read Only Memory).
➢EEPROM (Electrically Erasable Programmable Read Only
Memory).
• Random Access Memory (RAM): is the memory that the computer
uses to temporarily store the information as it is being processed.
• RAM is volatile memory, which means that the information
temporarily stored in the module is erased when you restart or shut
down your computer. Because the information is stored electrically
on transistors.
Random Access Memory Read Only Memory
✓ Temporary storage. ✓ Permanent storage.
✓ Store data in MBs. ✓ Store data in GBs.
✓ Volatile. ✓ Non- Volatile.
✓ Used in normal operation. ✓ Used for start-up process of Computer.
✓ Writing data is faster ✓ Writing data is slower
3. Input / Output Unit (IOU): The input unit contains the hardware
devices those are used to enter the data in to computer system,
Keyboard and mouse are most common devices. The output contain
the hardware devices those are used to output the data from the
computer system, Monitor and printer are most common output
devices. Nowadays so many other I/O devices are used as shown below.
8085 Microprocessor Architecture
The microprocessor has
become more essential part
of many gadgets.
The evolution of
microprocessors was divided
into five generations such as
first, second, third, fourth
and fifth generation.
• Classification of Microprocessors: Based on their specification,
application and architecture microprocessors are classified. Based on size
of data bus:
➢ 4-bit microprocessor
➢8-bit microprocessor
➢16-bit microprocessor
➢32-bit microprocessor
• Intel 8085, an 8-bit N-channel metal-oxide semiconductor (NMOS)
microprocessor is available in the form of 40 Pin dual in line IC package.
It is fabricated on a single LSI chip. It operates on +5 V d.c. supply. The
maximum clock speed used in this microprocessor is about 3 MHZ while
minimum frequency is 500kHz. General Purpose 8-bit microprocessor is
capable of addressing up to 64 K bytes (i.e. 216=65536 bytes) of memory.
8085 Microprocessor can fetch instructions from a memory, decode and
execute them i.e. performs certain arithmetic and logical operations,
accept data from input device, and send results to output devices.
✓Year of product 1976. ✓ External Data bus 8 bit.
✓ Data type 8 bit.
✓No. of transistor 6500. ✓ Address bus 16 bit.
✓Internal Data bus 8 bit. ✓ Physical Memory 64 Kbyte
Microprocessor 8085 consists of two main blocks: the Bus Interface Unit (BIU) and
the Execution Unit (EU). All the components of the 8086 microprocessor are present within
these two blocks.
1.1. Bus Interface Unit (BIU)
The Instruction Queue contains the set of instruction which is to be executed. Instruction
queue.
• 1.2. Segment Registers
• Each Segment register can work with 16 bits of binary data. There are 4 types of segment
registers:
i. CS: Code Segment Register
ii.DS: Data Segment Register
iii.SS: Stack Segment Register
iv.ES: Extra Segment Register
• 1.3. Instruction Pointer
• The Instruction pointer contains the address of the next instruction that is to be executed.
BIU
EU

Internal Architecture of 8085

The 8085 Bus Structure
8085 Microprocessor Architecture
• In a computer system ALU and Control Unit are combined in one unit
called Central Processing Unit (CPU). The CPU is analogous to the human
brain as all the decisions as per the instructions are made by this unit. All
other parts are also controlled by this unit. A microprocessor is an
integrated circuit designed for use as Central Processing Unit of a computer.
The CPU is the primary and central player in communicating with devices
such as memory, input and output. However, the timing of communication
process is controlled by the group of circuits called control unit.
The main functional components of 8085 microprocessor are as given below:
• Register Section.
• Arithmetic and Logic Unit.
• Timing and Control Section.
• Interrupt Control.
• Serial Input / Output Control.
8085 Microprocessor Architecture
The 8085 microprocessor contains eight addressable 8-bit registers namely:

1. A (Accumulator) register
2. F Flag register (Flag flip-flops)
3. B register
4. C register
5. D register
6. E register
7. H register
8. L register
8085 Microprocessor Architecture
• Registers B, C, D, E, H and L registers are 8-bit general purpose registers.
These registers can either be used as single register store 8-bit data for
processing or a combination of two registers as 16 bit register pair. The
valid register pairs are B-C, D-E or H-L register pairs. The higher order
byte of 16 bit data is stored in first register (B in B-C register pair), and low
order byte in the second register (C in B C register pair).
• The H-L register pair can also be used for register indirect addressing and
data pointer. The large number of general purpose registers gives more
flexibility and ease in the programming. However, the general purpose
registers are limited as registers occupy more space on the silicon chip.
• Beside these general purpose registers, the 8085 has two 8-bit registers
Accumulator (A) and Flag (F) as special purpose registers and two 16 bit
registers namely Program counter (PC) and stack pointer (SP).
8085 Microprocessor Architecture …
➢Accumulator (A) is an 8 bit register which stores the results of
arithmetical and logical operations. It is also used to receive data from
input port to microprocessor and to send data to output port from
microprocessor. It is referred as register A in the program.
➢Flag Register (F) is also an 8 bit register which indicate status of the
accumulator after any arithmetical or logical operation. Out of 8 bits,
five are defined as flags. These flags are given below.
8085 Microprocessor Architecture …

➢ Sign Flag (S): It indicates the sign of the number. If the number is negative
then sign flag is set (changed to 1) and if positive then reset (changed to 0).
➢ Zero Flag (Z): If after any arithmetical or logical operation, all the bits in
accumulator are zero then zero flag is set otherwise reset.
➢ Auxiliary Carry Flag (AC): If carry is generated from D3 to D4 in the
accumulator after any operation then auxiliary carry flag is set otherwise reset.
This flag is used internally by microprocessor for BCD operations and cannot be
used by the programmer.
➢ Parity Flag (P): If after any arithmetical or logical operation number of 1’s in
accumulator are even, then parity flag is set, otherwise reset.
➢ Carry Flag (CY): The size of accumulator is 8 bit. If after any operation 9th bit
is generated then carry flag is set, otherwise reset.
8085 Microprocessor Architecture …
➢Program counter: is a 16 bit register which is also known as memory pointer. It
stores the address of the next byte of the program to be executed. The
microprocessor takes the address from program counter and executes
instruction at that address. Each time the address in program counter is
incremented by one.
➢Stack Pointer (SP): It is a 16 bit register which contains the memory address of
top of the stack. Stack is a part of memory which is used to store data
temporarily, especially while the execution of subroutines or functions.
8085 Microprocessor Architecture …
• Arithmetic and Logic Unit (ALU)
The arithmetic and logical unit (ALU) basically consists of
accumulator (A), flag register (F) and a temporary register (which is
inaccessible by the programmer or user). This unit carries out the
arithmetic and logic calculations of the data stored in general
purpose registers or in memory locations. The arithmetic operations
are ADD, SUB, compare, increments, decrements and complements
etc.; while logical operations are AND, OR, XOR and Rotate. The
result of these operations could be placed in the accumulator or
elsewhere through the internal bus. Arithmetic operations are usually
carried out in 2’s complement and for these operations the ALU
receives the control signals from the timing and control unit.
8085 Microprocessor Architecture …
• Timing and Control Unit
This unit is responsible to synchronize Microprocessor operation as
per the clock pulse and to generate the control signals which are
necessary for smooth communication between Microprocessor and
peripherals devices. The RD bar and WR bar signals are synchronous
pulses which indicates whether data is available on the data bus or
not. The control unit is responsible to control the flow of data
between microprocessor, memory and peripheral devices.
8085 Microprocessor Architecture …
Table (1): Pins Description of 8085 μp
Table (1): Pins Description of 8085 μp
Table (1): Pins Description of 8085 μp
Table (1): Pins Description of 8085 μp
Chapter 3: Addressing Modes
What is Addressing Mode?
• Addressing mode specify how an instruction identifies the data, or
operands. It operates on in assembly language. This field indicates
whether the operand is a direct value, a memory address, or stored
in a register. Addressing modes are important during instruction
execution, as they define the form of an operand and the way data
is accessed, making sure proper data handling at the machine level.
Types of Addressing Modes
a. Data Addressing
b. Register Addressing
c. Immediate Addressing
d. Direct Addressing
e. Register indirect Addressing
• Immediate Addressing: In this type of addressing, the operand given in
the instruction a byte or word transfers to the destination register or
memory location.
Example:
MVI A,9AH
MVI AX, 0500H
✓ The operand is part of instruction
✓ The operand is stored in the register mentioned in the instruction.
• Memory direct Addressing: In this addressing moves a byte or word
between register or memory location.
Example:
LDA 856H; instruction used to load the content of memory address
8560H in accumulator.
Register Direct Addressing:
✓ Register direct addressing transfer a copy of a byte or word between
source register to destination register. Both operands in this particular
addressing mode are registers
Example:
MOV B,C; it copies the content of register C to register B and store in B
MOV BX, CX; it copies the content of register CX to register BX and store
in BX.
✓ Register Indirect Addressing: In this addressing transfer a byte or word
between register and memory location.
Example:
MOV AX,M; data in the memory location pointed to by the contents of HL
pair. The data is moved to accumulator.
MOV CX, [BX]; data transfer a byte b/n register and memory location
MOV AX,[SI];
Direct Addressing Mode
✓indicates that the value is immediately fixed and immutably entered into the
instruction.
✓ is the most straightforward of all the addressing techniques.
Examples:
MOV AX, [5000H]

• The square brackets around the 5000H imply the contents of the memory
location. When it is executed, this instruction will copy the contents of the
memory location into the AX register.
• Register Indirect Addressing Mode
• The base register, source index, or destination index (BX, SI, or DI register,
respectively) contains the offset address of the data. Either DS or ES are the
Lesson: outlines
❖Data movement instruction
✓Push/POP
✓Load effective Address
✓String Data Transfer
❖Arithmetic and Logical Instructions
✓Arithmetic instructions
✓Basic Logic instructions
✓Shift and rotate
✓String compression
Instruction Set of 8086
• An instruction is a binary pattern designed inside a microprocessor to
perform a specific function.
• The entire group of instructions that a microprocessor supports is called
Instruction Set.
• 8086 has more than 20,000instructions.
Classification of Instruction Set
✓ Data Transfer Instructions
✓ Arithmetic Instructions
✓ Logical Instructions
✓ Control Transfer Instructions
✓ String Manipulation Instructions
✓ Processor Control Instructions
Data Movement Instructions
✓Are used to transfer data from source to destination.
✓The operand can be a constant, memory location, register or I/O port
address.
MOV Des, Src:
✓Src operand can be register, memory location or immediate operand.
✓Des can be register or memory operand.
✓Both Src and Des cannot be memory location at the same time.
E.g.:
MOV CX, 037A H; The content of CX is changed with 037A hex value.
MOV AL, BL; The content of AL is changed with content of BL
MOV BX, [0301 H]; The content of BX is changed with content location
[0301H]
Data movement
PUSH Operand:
• It pushes the operand into top of stack.
Example: PUSH BX
POP Destiny:
• It pops the operand from top of stack to Des.
• Destiny can be a general purpose register, segment register (except
CS) or memory location.
Example : POP AX
XCHG Des, Src:
• This instruction exchanges Src with Des.
• It cannot exchange two memory locations directly.
• Example: XCHG DX, AX
IN Accumulator, Port Address:
• It transfers the operand from specified port to accumulator register.
E.g.: IN AX, 0028 H
OUT Port Address, Accumulator:
• It transfers the operand from accumulator to specified port.
E.g.: OUT 0028 H, AX
LEA Register, Src:
• It loads a 16-bit register with the offset address of the data specified
by the Src.
E.g.: LEA BX, [DI]
• This instruction loads the contents of DI (offset) into the BX register.
Arithmetic Instructions
ADD Des, Src:
Arithmetic
• It adds a byte to byte or a word to word. ➢Addition
• It effects AF, CF, OF, PF, SF, ZF flags. ➢Subtraction
E.g.:
ADD AL, 74H ➢Multiplication
ADD DX, AX ➢Division
ADD AX, [BX]
➢Increment
ADC Des, Src:
• It adds the two operands with CF (Des = Des + Src + C). ➢Decrement
• It effects AF, CF, OF, PF, SF, ZF flags.
Example:
ADC AL, 74H
ADC DX, AX
ADC AX, [BX]
Mnemonic Description Mnemonic Description
Divide A by B
ADD A,Rn AA+Rn DIV AB Aquotient
B remainder
ADD A,direct AA+(direct) DEC A AA-1
ADD A, @Ri AA+@Ri DEC Rn RnRn-1
ADDC A, direct AA+(direct)+C SUBB A,Rn AA-Rn-C
ADDC A, #data AA+data+C SUBB A,@Ri AA-@Ri-C
Multiply A by B
ADDC A,Rn AA+Rn+C MUL AB Alow byte (A*B)
B high byte (A*B)
Logical instruction
AND, OR, NOT, XOR, NEG
• AND Des, Src:
• It performs AND operation of Des and Src.
• Src can be immediate number, register or memory location.
• Des can be register or memory location.
• Both operands cannot be memory locations at the same time.
• CF and OF become zero after the operation.
• PF, SF and ZF are updated.
OR Des, Src:
• It performs OR operation of Des and Src.
• Src can be immediate number, register or memory location.
• Des can be register or memory location.
• Both operands cannot be memory locations at the same time.
• CF and OF become zero after the operation.
• PF, SF and ZF are updated.
XOR Des, Src:
• It performs XOR operation of Des and Src.
• Src can be immediate number, register or memory location.
• Des can be register or memory location.
• Both operands cannot be memory locations at the same time.
• CF and OF become zero after the operation.
• PF, SF and ZF are updated.
SHL Des, Count:
• It shift bits of byte or word left, by count.
• It puts zero(s) in LSBs.
• MSB is shifted into carry flag.
• If the number of bits desired to be shifted is 1, then the immediate number 1
can be written in Count.
SHR Des, Count:
• It shift bits of byte or word right, by count.
• It puts zero(s) in MSBs.
• LSB is shifted into carry flag.
• If the number of bits desired to be shifted is 1, then the immediate number 1
can be written in Count.
NB: However, if the number of bits to be shifted is more than 1, then the
count is put in CL register.
ROL Des, Count:
• It rotates bits of byte or word left, by count.
• MSB is transferred to LSB and also to CF.
ROR Des, Count:
• It rotates bits of byte or word right, by count.
• LSB is transferred to MSB and also to CF.
NB:
✓However, if the number of bits to be shifted is more than 1, then the count
is put in CL register.
✓If the number of bits desired to be shifted is 1, then the immediate
number 1 can be written in Count.
Logical ins.
Mnemonic Description Mnemonic Description
Divide A by B
ANL A,Rn AA ANDRn Aquotient
B remainder
ANL A,@Ri AA AND @Ri AA-1
ANL A,direct AA AND @Ri RnRn-1
ANL A, @direct AA AND @direct AA-Rn-C
ANL direct,A (direct)(direct ) AA-@Ri-C
AND A
ANL A, #data Multiply A by B
AA+Rn+C Alow byte (A*B)
B high byte (A*B)
A
N
D

O
R
Chapter 5: Control Transfer Instructions
Lesson Outlines
❖The Jump Group
✓ Unconditional Jump (JMP) ❖ Introduction to Interrupts
✓ Conditional Jumps and Conditional Sets
✓ Interrupt Vectors
❖Controlling the Flow of the Program
✓ Interrupt Instructions
✓ LOOP
✓ Interrupt Control
✓ REPEAT
❖ Machine Control and Miscellaneous Instructions
❖ Procedures
✓ Flag Control Instructions
✓ CALL
✓ RET ✓ WAIT

✓ HLT
Control Transfer Instructions
These instructions cause change in the sequence of the execution of
instruction.
✓This change can be through a condition or sometimes unconditional.
✓The conditions are represented by flags.
CALL Des:
✓This instruction is used to call a subroutine or function or procedure.
✓The address of next instruction after CALL is saved onto stack.
RET:
✓It returns the control from procedure to calling program.
✓Every CALL instruction should have a RET.
Loop Des:
• This is a looping instruction.
• The number of times looping is required is placed in the CX register.
• With each iteration, the contents of CX are decremented.
• ZF is checked whether to loop again or not.
• String in assembly language is just a sequentially stored bytes or words.
• There are very strong set of string instructions in 8086.
• By using these string instructions, the size of the program is considerably
reduced.
CMPS Des, Src:
• It compares the string bytes or words.
SCAS String:
• It scans a string.
• It compares the String with byte in AL or with word in AX.
MOVS / MOVSB / MOVSW:
• It causes moving of byte or word from one string to another.
• In this instruction, the source string is in Data Segment and
destination string is in Extra Segment.
• SI and DI store the offset values for source and destination index.
REP (Repeat):
• This is an instruction prefix.
• It causes the repetition of the instruction until CX becomes zero.
Example: REP MOVSB STR1, STR2
• It copies byte by byte contents.
• REP repeats the operation MOVSB until CX becomes zero.
STC:It sets the carry flag to 1.
CLC: It clears the carry flag to 0.
CMC: It complements the carry flag.
STD: It sets the direction flag to 1.
• If it is set, string bytes are accessed from higher memory address to lower memory address.
CLD:
• It clears the direction flag to 0.
• If it is reset, the string bytes are accessed from lower memory address to higher memory address.
THE JUMP GROUP

JUM
➔Allows programmer to skip program sections and branch to any part of
memory for the next instruction.
➔A conditional jump instruction allows decisions based upon numerical tests.
➔results are held in the flag bits, then tested by conditional jump instructions
•LOOP and conditional LOOP are also forms of the jump instruction.
Unconditional Jump (JMP)
• Three types: short jump, near jump, far jump.
• Short jump is a 2-byte instruction that allows jumps or branches to
memory locations within +127 and –128 bytes.
–> from the address following the jump
3-byte near jump allows a branch or jump within ±32K bytes from the
instruction in the current code segment.
✓5-byte far jump allows a jump to any memory location within the real
memory system.
✓The short and near jumps are often called intrasegment jumps.
✓Far jumps are called intersegment jumps
Unconditional Jump (JMP)
•Three types: short jump, near jump, far jump.
•Short jump is a 2-byte instruction that allows jumps or branches to
memory locations within +127 and –128 bytes.
–from the address following the jump
•3-byte near jump allows a branch or jump within ±32K bytes from the
instruction in the current code segment.
•5-byte far jump allows a jump to any memory location within the real
memory system.
•The short and near jumps are often called intrasegment jumps.
•Far jumps are called intersegment jumps
Short Jump
•Called relative jumpsbecause they can be moved, with related software, to
any location in the current code segment without a change.
–jump address is not stored with the opcode
–a distance, or displacement, follows the opcode
•The short jump displacement is a distance represented by a 1-byte signed
number whose value ranges between +127 and –128.
•Short jump instruction appears in Figure 2
–when the microprocessor executes a
short jump, the displacement is sign-
extended and added to the instruction
pointer (IP/EIP) to generate the jump
address within the current code segment

–The instruction branches to this new

address forthe next instruction in the
program.
Near Jump
•A near jump passes control to an instruction in the current code
segment located within ±32K bytes from the near jump instruction.
–distance is ±2G in 80386 and above when operated in protected
mode
•Near jump is a 3-byte instruction with opcode followed by a signed
16-bit displacement.
–80386 -Pentium 4 displacement is 32 bits and the near jump is 5
bytes long
•Signed displacement adds to the instruction pointer (IP) to generate
the jump address.
–because signed displacement is ±32K, a near jump can jump to any
memory location with inthe current real mode code segment
• The near jump is also relocatable
because it is also a relative jump.
• This feature, along with the relocatable
data segments, Intel microprocessors
ideal for use in a general-purpose
computer system.
• Software can be written and loaded
anywhere in the memory and function
without modification because of the
relative jumps and relocatable data
segments
Far Jump
•Obtains a new segment and offset address to accomplish the jump:
–bytes 2 and 3 of this 5-byte instruction contain the new offset
address
–bytes 4 and 5 contain the new segment address
–in protected mode, the segment address accesses a descriptor with
the base address of the far jump segment
–offset address, either 16 or 32 bits, contains the offset address within
the new code segment
Far Jump
• Obtains a new segment and offset address to
accomplish the jump:
–bytes 2 and 3 of this 5-byte instruction contain the
new offset address
–bytes 4 and 5 contain the new segment address
–in protected mode, the segment address accesses a
descriptor with the base address of the far jump
segment
–offset address, either 16 or 32 bits, contains the offset
address within the new code segment
•The far jump instruction sometimes appears with the FAR PTR
directive.
–another way to obtain a far jump is to define a label as a far label
–a label is far only if it is external to the current code segment or
procedure
Conditional Jumps and Conditional Sets
• Allows a conditional jump to any location within the current code
segment
• Conditional jump instructions test flag bits:
–sign (S), zero (Z), carry (C)
–parity (P), overflow (0)
• If the condition under test is true, a branch to the label associated
with the jump instruction occurs.
–if false, next sequential step in program executes
–for example, a JC will jump if the carry bit is set
• Most conditional jump instructions are straightforward as they
often test one flag bit
• When signed numbers are compared, use the JG, JL, JGE, JLE,
JE, and JNE instructions.
–terms greater than and less than refer to signed numbers
• When unsigned numbers are compared, use the JA, JB, JAB,
JBE, JE, and JNE instructions.
–terms above and below refer to unsigned numbers
CONTROLLING THE FLOW OF THE PROGRAM
• Easier to use assembly language statements .IF, .ELSE, .ELSEIF,
and .ENDIF to control the flow of the program than to use the
correct conditional jump statement.
Reading Assignment
❖INTERFACE (4hr)
❑Memory Interface
✓Memory Devices
✓Memory Pin Connections
❑I/O Interface
✓Introduction to I/O Interface
✓I/O Port Address Decoding
✓The Programmable Peripheral Interface
✓Analog-to-Digital (ADC) and Digital-to-Analog (DAC) Converters
The END
Some Simple Instructions:
MOV dest, src ; dest = src
MOV A,#72H ;A=72H
MOV R4,#62H ;R4=62H
MOV B,0F9H ;B=the content of F9’th byte of RAM
MOV DPTR,#7634H
MOV DPL,#34H
MOV DPH,#76H
MOV P1,A ;mov A to port 1
Note 1: MOV A,#72H ≠ MOV A,72H
After instruction “MOV A,72H ” the content of 72’th byte of RAM will
replace in Accumulator
Note 2: MUl & Div:
MOV A,R3 ≡ MOV A,3 MUL AB ;B|A = A*B
MOV A,#25H
ADD A, Source ;A=A+Source
MOV B,#65H
ADD A,#6 ;A=A+6 MUL AB ;25H*65H=0E99 ;B=0EH, A=99H
ADD A,R6 ;A=A+R6 DIV AB ;A = A/B, B = A mod B
ADD A,6 ;A=A+[6] or A=A+R6 MOV A,#25 MOV
ADD A,0F3H ;A=A+[0F3H] B,#10
DIV AB ;A=2, B=5
Subtraction: SETB bit ; bit=1
SUBB A, Source ;A=A-Source-C CLR bit ; bit=0
SUBB A,#6 ;A=A-6 SETB C ; CY=1
SUBB A,R6 ;A=A+R6 SETB P0.0 ;bit 0 from port 0 =1