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The document discusses various types of computers, including supercomputers, mainframes, and personal computers, highlighting their uses and performance metrics. It outlines key performance improvement strategies, processor performance comparisons, and calculations related to clock cycles and CPI. Additionally, it covers power consumption analysis for different processors and the impact of compiler efficiency on execution times.

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5 views

Hello

The document discusses various types of computers, including supercomputers, mainframes, and personal computers, highlighting their uses and performance metrics. It outlines key performance improvement strategies, processor performance comparisons, and calculations related to clock cycles and CPI. Additionally, it covers power consumption analysis for different processors and the impact of compiler efficiency on execution times.

Uploaded by

ryancantago42
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
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Download as DOCX, PDF, TXT or read online on Scribd
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1.

1
supercomputers, mainframe computers, and personal computers. Supercomputers are highly
powerful, used for complex tasks like climate research and nuclear simulations. Mainframe
computers are large, powerful systems used by organizations for bulk data processing, like
census data and enterprise resource planning. Personal computers are general-purpose
computers used by individuals for various tasks.

1.2: a - Performance via Parallelism,


b - Use Abstraction to Simplify Design, c - Performance via Pipelining,
d - Make the Common Case Fast,
e - Hierarchy of Memories,
f - Dependability via Redundancy,
g - Performance via Prediction.

1.3: Writing in high-level language, Compiling to assembly language, Assembling to machine


code, Linking to create executable.

1.4:
a. 3,932,160 bytes,
b. 0.315 seconds.

1.5
a. Processor P2 has the highest performance expressed in instructions per second with 2.5
MIPS.

b. For processor P1:


- Number of Cycles: 30 billion cycles
- Number of Instructions: 45 billion instructions

For processor P2:


- Number of Cycles: 25 billion cycles
- Number of Instructions: 25 billion instructions

For processor P3:


- Number of Cycles: 40 billion cycles
- Number of Instructions: 88 billion instructions

c. To achieve a 30% reduction in execution time while increasing the CPI by 20%, the required
clock rate would be approximately 5.714 GHz.

1.6
1. Max. clock speed (GHz):
- Average rate of improvement: 5.26% per year
- Number of years to double: Approximately 13.18 years
2. Integer IPC/core:
- Average rate to double: Approximately 6.29 years

3. Cores:
of improvement: 11.11% per year
- Number of years - Average rate of improvement: 11.11% per year
- Number of years to double: Approximately 6.29 years

4. Max. DRAM Bandwidth (GB/s):


- Average rate of improvement: 16.57% per year
- Number of years to double: Approximately 4.24 years

5. SP floating point (Gflop/s):


- Average rate of improvement: 53.99% per year
- Number of years to double: Approximately 1.29 years

6. L3 cache (MiB):
- Average rate of improvement: 22.22% per year
- Number of years to double: Approximately 3.16 years

a) To determine which implementation is faster, we need to calculate the global CPI for each
implementation. The global CPI is the weighted average of the CPIs for each instruction class,
where the weights are the percentages of instructions in each class.

For P1:
Weighted CPI for P1 = (10% * 1) + (20% * 2) + (50% * 3) + (20% * 3) = 2.4

For P2:
Weighted CPI for P2 = (10% * 2) + (20% * 2) + (50% * 2) + (20% * 2) = 2

1.7
The implementation with the lower global CPI is faster, so in this case, P2 with a global CPI of 2
is faster than P1 with a global CPI of 2.4.

b) To find the clock cycles required in both cases, we multiply the dynamic instruction count by
the corresponding global CPI.

For P1:
Clock cycles for P1 = 1.0E6 * 2.4 = 2.4E6 (2.4 million clock cycles)

For P2:
Clock cycles for P2 = 1.0E6 * 2 = 2E6 (2 million clock cycles)
Therefore, P2 requires 2 million clock cycles, while P1 requires 2.4 million clock cycles. Since
P2 requires fewer clock cycles, it is faster than P1.

1.8a) To find the average CPI for each program, we divide the dynamic instruction count by the
clock cycles.

For the program compiled with compiler A:


Average CPI for A = 1.0E9 / (1.1E9) = 0.909

For the program compiled with compiler B:


Average CPI for B = 1.2E9 / (1.5E9) = 0.8

b) If the execution times on the two processors are the same, it means the clock cycles will be
the same. Therefore, the clock rate of the processor running compiler A's code will be the same
as the clock rate of the processor running compiler B's code.

c) To find the speedup of using the new compiler versus using compiler A or B on the original
processor, we divide the execution time with the old compiler by the execution time with the new
compiler.

For compiler A:
Speedup with new compiler = 1.1 / Execution time with new compiler

For compiler B:
Speedup with new compiler = 1.5 / Execution time with new compiler

1.9.1) To find the average capacitive loads for each processor, we need to know the power
consumption and voltage.

For the Pentium 4 Prescott processor:


Average capacitive load = 90 W / (1.25^2 * Clock rate)

For the Core i5 Ivy Bridge processor:


Average capacitive load = 40 W / (0.9^2 * Clock rate)

1.9.2) To find the percentage of the total dissipated power comprised by static power and the
ratio of static power to dynamic power for each technology, we use the given power values.

For the Pentium 4 Prescott processor:


Percentage of total dissipated power comprised by static power = (10 W / (10 W + 90 W)) * 100
Ratio of static power to dynamic power = 10 W / 90 W

For the Core i5 Ivy Bridge processor:


Percentage of total dissipated power comprised by static power = (30 W / (30 W + 40 W)) * 100
Ratio of static power to dynamic power =

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