19th International Microelectronics Olympiad

TEST

The participants shall select one answer out of 5 possible answers in the answer sheet for each question (A, B, C, D, E)

by crossing lines from the top left corner to the bottom right corner and form the bottom left corner to the top right

corner (as it is shown below).

8. A B C D E

In the case of crossing out more than one answer for the same question or making any other notes, the answer to that

question will be scored 0.

8. A B C D E

Student ___________________________________________

University ___________________________________________
1. What will the connection of the capacitor in parallel with the negative feedback R2 resistor in the circuit of the
non-inverting amplifier lead to?
A. Amplification of low frequencies (low boost)
B. Amplification of high frequencies (high boost)
C. Attenuation of high frequencies (low pass)
D. Attenuation of low frequencies (high pass)
E. Amplitude-frequency characteristics will shift to the left

2. How will the connection of RL load resistance at the output of the circuit affect charge and discharge processes of
the integrating circuit capacitor?
A. Will slow down the charging of the capacitor
B. Will accelerate the discharge of the capacitor
C. Will reduce the amplitude of output pulses
D. Will limit the output pulses to a certain level
E. All the answers are correct

3. What logic function is implemented in the figure?

A. OR
B. XOR
C. XNOR
D. MUX
E. AND

4. What circuit is implemented in the figure?

A. D latch
B. SR latch
C. JK flip-flop
D. T flip-flop
E. D flip-flop

5. The circuit is
A. Tri-stage buffer
B. Tri-stage inverter
C. Multiplexer
D. XNOR
E. XOR

6. What are the necessary conditions for this circuit to be able to operate as a
3 input NAND?
A. CLK=0
B. CLK=1
C. CLK=0 and output capacitance is fully discharged
D. CLK=1 and output capacitance is fully charged
E. CLK=1 and output capacitance is fully discharged
7. Which of the following functions is implemented by the multiplexer circuit?

“1”
0 “0”
“0” 1 0
2 y x3 1 y
x3 3
2
x1 0 “1”
x2 1 3

A. y=~x1~x2 +~x1x3 x1 x2
B. y=~x1~x2 +x3
C. y=~x1x2 +x3
D. y=x1~x2 +x3
E. There is no correct answer

8. Determine the value of the following number , represented in single precision format (IEEE 704).

S E (8 bits) F (23 bits)

A. 30
B. -12
C. -28
D. 20
E. There is no correct answer

9. Among the algorithm complexities listed below, point out the ones which are applicable for testing large SRAM
memories with n-bit words when n may be sufficiently large.
A. Algorithms of complexity O(n)
B. Algorithms of complexity O(nlogn)
C. Algorithms of complexity O(n3/2)
D. Algorithms of complexity O(n2)
E. Algorithms of complexity O(n3)

10. In the combinational circuit below, find all the test patterns that detect the stuck-at-0 fault on the line B marked in
red color by using the method of “Truth tables”. Among the listed five variants choose the correct one.
A. There are no solutions
B. All the input patterns detect the marked fault X1 X2 X3
C. (X1,X2,X3)=(110) is the only pattern detecting the fault 0 0 0
D. (110) and (101) are test patterns detecting the fault 0 0 1
E. (010) is the only test pattern detecting the fault 0 1 0
A 0 1 1
X1 S-at-0
C
1 0 0
1 0 1
1 1 0
X2 1 1 1
B X3 E
D
f(x1, x2, x3)=(x1+x2)’+x3
11. What is the differences of Schottky diode from the traditional p-n junction diode?
A. It is based on metal-semiconductor junction
B. Lower voltage drop in case of forward -biased
C. Higher operating frequency
D. Higher switching speed
E. All the answers are correct

12. The width of the depletion region of reverse-biased p-n junction diode:
A. Decreases
B. Increases
C. First increases, then decreases
D. First decreases, then increases
E. Does not depend on the magnitude of the voltage

𝑥 2
13. We have the condition: 𝑓 2 (𝑥) = ∫0 (𝑓 2 (𝑡) + (𝑓 ′ (𝑡)) ) 𝑑𝑡 + 20242
ln 2025
for differentiable function f . If we have f ( 3)  0 , find .
ln 2024

A. 1
B. e
C. 
D. 2023
E. In 2 2020

1 1 1 1
14. We have 𝐴 = 𝑙𝑖𝑚 ∏𝑛𝑘=2 (1 − ) = 𝑙𝑖𝑚 (1 − ) (1 − 2 ) ⋯ (1 − 2 ). Find 8𝐴.
𝑛→∞ 𝑘2 𝑛→∞ 22 3 𝑛
A. 0
B. 2
C. 4
D. 6
E. 8

15. Which crystallographic plane is highlighted in the cubic lattice of a single crystal of silicon?
A. (100)
B. (101)
C. (111)
D. (110)
E. (011)

16. What is the technological method used to prepare A3B5 (GaAs, InP, InAs, GaSb) type semiconductor structures?
A. Diffusion
B. Heteroepitaxial growth
C. Homoepitaxial growth
D. Ion implantation method
E. None of the above

17. Which parameters of a semiconductor solar cell depend on the value of illuminated surface area?
A. Operating voltage
B. Operating current
C. Efficiency coefficient
D. Duty cycle
E. None of the above
18. Which of the following statements about the adjacency matrix for a graph containing m vertices and n edges is
true?
A. Is an m x n order matrix whose diagonal elements are equal to 0
B. Is a square matrix of order m
C. Is a square matrix of order n
D. Is a symmetric matrix of order n
E. Is an m x n order matrix with diagonal elements equal to 1

19. Which of the given answers is correct? Along with the development of microelectronic technology,
A. Delay in interconnects increases
B. Specific resistance of interconnects decreases
C. Permissible temperature of p-n junction decreases
D. Proportion of static power in the total power consumption decreases
E. Thermal gradient across the area of the die decreases

20. Short and long waves of equal intensity are absorbed from the surface inwards. What intensity will be greater at
depth x?
A. It will be the same
B. Shortwave
C. Long wave
D. The waves will be reflected
E. The waves will be deflected

21. What happens to the current of a forward biased diode if the voltage is not enough to overcome the potential
barrier?
A. Will grow
B. Will decrease
C. Will remain the same
D. Will stop
E. Will remain small

22. Which is the main function of provided circuit in the figure?

23. What is mobility dependence from temperature (consider room temperatures) in a MOS transistor?
A. Mobility remains constant
B. Mobility decreases as temperature increases
C. Mobility increases as temperature increases
D. Depends on transistor type
E. There is no direct relationship
24. What will be the output of the following code?
#include<stdio.h>

int main()

int arr[] = {10, 20, 30, 40, 50, 60};

int *p = arr;

*(p++)+=123;

printf("%d , %d", *p, *(++p));

return 0;

A. 20 , 30
B. 133 , 30
C. 133 , 40
D. 133 , 20
E. 143, 30

25. What is the time complexity of the following code?

A. O(nlogn)
B. O(logn)
C. O(2^n)
D. O(n^2)
E. O(n)

26. What will be the output of the following code?

#include <iostream>
A. Compile Error
int main() { B. 11
int* ptr = new int(10); C. Undefined
*ptr++; D. 10
std::cout << *ptr << std::endl; E. 12
delete ptr;
return 0;
}
Answer Sheet

A B C D E A B C D E
1. 14.

A B C D E A B C D E
2. 15.

A B C D E A B C D E
3. 16.

A B C D E A B C D E
4. 17.

A B C D E A B C D E
5. 18.

A B C D E A B C D E
6. 19.

A B C D E A B C D E
7. 20.

A B C D E A B C D E
8. 21.

A B C D E A B C D E
9. 22.

A B C D E A B C D E
10. 23.

A B C D E A B C D E
11. 24.

A B C D E A B C D E
12. 25.

A B C D E A B C D E
13. 26.

Student ___________________________________________

University ___________________________________________