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8251 Programmable Communication Interface

The 8251 USART (Universal Synchronous Asynchronous Receiver Transmitter) is a programmable communication interface that can operate in either serial or parallel I/O mode. It accepts data from the microprocessor in parallel format and converts it to serial data for transmission to I/O devices. It also receives serial data from I/O devices and converts it to parallel format for the CPU. The 8251 has registers for control and status, as well as a data bus buffer, transmitter and receiver sections to handle serial communication with external devices.

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139 views

8251 Programmable Communication Interface

The 8251 USART (Universal Synchronous Asynchronous Receiver Transmitter) is a programmable communication interface that can operate in either serial or parallel I/O mode. It accepts data from the microprocessor in parallel format and converts it to serial data for transmission to I/O devices. It also receives serial data from I/O devices and converts it to parallel format for the CPU. The 8251 has registers for control and status, as well as a data bus buffer, transmitter and receiver sections to handle serial communication with external devices.

Uploaded by

sukantho sikder
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
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MICROPROCESSOR 8085

LECTURE 30
8251 PROGRAMMABLE COMMUNICATION INTERFACE
Sukantho Sikder
PARALLEL I/O MODE
0
1
1
8085 MPU 0
I/O Device
0
1

SERIAL I/O MODE


0
1
1 Parallel to 100110
8085 MPU 0 Serial
0 Converter To I/O
1
Device
INTERFACING REQUIREMENTS

Parallel Seria
Serial l
8085 MPU
Peripheral IC
Communicat Communicat
ion ion

• The Peripheral IC accepts data in parallel format from


the microprocessor and converts them into serial
data for transmission to I/O device.
• It also receives serial data from I/O device and
converts them into parallel and send data in parallel
format to the CPU.
8251 USART (UNIVERSAL
SYNCHRONOUS ASYNCHRONOUS
RECEIVER TRANSMITTER)
ARCHITECTURE OF 8251
DATA BUS BUFFER
D0-D7 : 8 bit data bus buffer used to read or write status,
command word or data from or to the 8251.

REGISTERS OF CONTROL LOGIC BLOCK


16 bit registers for a control word consist of two independent
bytes namely mode word and command word.
Mode Word: Specifies the general characteristics of operation
such as baud rate, parity, number of bits etc.
Command Word: Enables the data transmission or reception.
STATUS REGISTER
• Checks the ready status of the peripheral.
• Status words in the status register provides the information
concerning register status and transmission errors.

DATA REGISTER
CS C/𝐷 𝑊𝑅 𝑅𝐷 Operation
0 0 1 0 Microprocessor reads data from data
buffer
0 0 0 1 Microprocessor writes data to data buffer
0 1 0 1 Microprocessor writes a word to control
register
0 1 1 0 Microprocessor reads a word from status
register
1 X X X Chip is not enabled
COMMAND
REGISTER
MODE WORD
(ASYNCHRONOUS)
MODE WORD
(SYNCHRONOUS)
STATUS REGISTER
MODEM CONTROL
𝐷𝑆𝑅- Data Set Ready: Checks if the data set is ready when
communicating with modem
𝐷𝑇𝑅- Data Terminal Ready: Indicates that the device is ready to
accept data when the 8251 is communicating with modem.
𝐶𝑇𝑆- Clear to Send: A low on this pin enables 8251 to transmit
serial data
𝑅𝑇𝑆- Request to send data: Low signal indicates the modem is
ready to receive data byte from modem
TRANSMITTER SECTION
• The CPU deposits (when TXRDY = 1,
meaning that the transmitter buffer
register is empty) data into the transmitter
buffer register, which is subsequently put
into the output register (when TXE = 1,
meaning that the output buffer is empty).
• In the output register, the eight bit data is
converted into serial form and comes out
via TXD pin.
• The serial data bits are preceded by
START bit
and succeeded by STOP bit, which are
known as framing bits. But this happens
only if transmitter is enabled and the CTS
is low.
RECEIVER
SECTION
• Serial data from outside world is
delivered to the input register
via RXD line, which is
subsequently put into parallel
form and placed in the receiver
buffer register.
• Serial data from outside world is
delivered to the input register
via RXD line, which is
subsequently put into parallel
form and placed in the receiver
buffer register.

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