Introduction and AVR Architecture
Introduction and AVR Architecture
Chapter 1
General Serial
IO
Purpose RAM ROM Timer COM
Port
Micro Port
processor Address BUS
Control BUS
• Microcontrollers
Serial
Timer I/O
Port
Most common microcontrollers
• 8-bit microcontrollers
– AVR
– PIC
– HCS12
– 8051
• 32-bit microcontrollers
– ARM
– PIC32
AVR internal architecture
40 PIN DIP
(XCK/T0) PB0 1 40 PA0 (ADC0)
(T1) PB1 2 RAM 39 EEPROM
PA1 (ADC1) Timers
(INT2/AIN0) PB2 3 38 PA2 (ADC2)
PROGRAM
(OC0/AIN1) PB3 4 MEGA32 37 PA3 (ADC3)
(SS) PB4 5 36 PA4 (ADC4)
ROM (MOSI) PB5 6 35 PA5 (ADC5)
(MISO) PB6 7 34 PA6 (ADC6)
Program (SCK) PB7 8 33 PA7 (ADC7)
RESET 9 32 AREF
Bus Bus 10
VCC 31 AGND
CPU
GND 11 30 AVCC
XTAL2 12 29 PC7 (TOSC2)
XTAL1 13 28 PC6 (TOSC1)
(RXD) PD0 14 27 PC5 (TDI)
(TXD) PD1 15 26 PC4 (TDO)
(INT0) PD2 16 25 PC3 (TMS)
(INT1) PD3 17 24 PC2 (TCK)
(OC1B) PD4 18
Interrupt 23 PC1 (SDA) Other
OSC
(OC1A) PD5 19 22 Ports
PC0 (SCL)
(ICP) PD6 20 Unit 21 PD7 (OC2) Peripherals
I/O
PINS
AVR different groups
• Classic AVR
– e.g. AT90S2313, AT90S4433
• Mega
– e.g. ATmega8, ATmega32, ATmega128
• Tiny
– e.g. ATtiny13, ATtiny25
• Special Purpose AVR
– e.g. AT90PWM216,AT90USB1287
Let’s get familiar with the AVR part numbers
ATmega128
Atmel group
Flash =128K
ATtiny44 AT90S4433
Atmel
Tiny Flash =4K Atmel Classic
Flash =4K
group group
AVR Architecture (pp 55 - 75)
Chapter 2
Notes\AVRStudio4\Installer\WinAVR-20100110.
Refer Overview on the AVR Instructions and Directive.pdf in \Lecture
Notes\E-Books and Reference folder
Refer page 696 thru 732 of Microcontroller and Embedded Systems E-
book in folder \Lecture Notes\E-Books and Reference for AVR
Instruction Explained.
Topics
AVR’s CPU
Its architecture
Some simple programs
Data Memory access
Program memory RAM EEPROM Timers
Program Data
Bus Bus
CPU
Interrupt Other
OSC Ports
Unit Peripherals
I/O
PINS
AVR’s CPU
AVR’s CPU
ALU
32 General Purpose
R0
registers (R0 to R31) R1
ALU
PC register R2
…
Instruction decoder SREG: I T H S V N Z C
R15
CPU R16
R17
…
PC
R30
Instruction decoder
R31
Instruction Register
registers
Some simple instructions
1. Loading values into the general purpose registers
…
R16 = 53 SREG: I T H S V N Z C
CPU
R15
LDI R19,132 R16
R17
LDI R23,0x27 PC
…
R23 = 0x27 Instruction decoder
R30
R31
Instruction Register
registers
Some simple instructions
2. Arithmetic calculation
There are some instructions for doing Arithmetic
and logic operations; such as:
ADD, SUB, MUL, AND, etc.
ADD Rd,Rs
Rd = Rd + Rs R0
ALU R1
Example: R2
…
ADD R25, R9 SREG: I T H S V N Z C
CPU
R15
R25 = R25 + R9 R16
R17
ADD R17,R30 PC
…
R17 = R17 + R30 Instruction decoder
R30
R31
Instruction Register
registers
A simple program
Write a program that calculates 19 + 95
R0
ALU R1
R2
…
SREG: I T H S V N Z C
CPU
R15
R16
R17
PC
…
R30
Instruction decoder
R31
Instruction Register
registers
A simple program
Write a program that calculates 19 + 95 + 5
LDI R16, 19 ;R16 = 19
LDI R20, 95 ;R20 = 95
LDI R21, 5 ;R21 = 5
ADD R16, R20 ;R16 = R16 + R20
ADD R16, R21 ;R16 = R16 + R21
…
R17 = R17 - R30 SREG: I T H S V N Z C
CPU
R15
R16
R17
PC
…
R30
Instruction decoder
R31
Instruction Register
registers
R0 thru R15
Only registers in the range R16 to R31 can be
loaded immediate. We cannot load a constant
into the registers R0 to R15 directly. It would
have to be loaded into a valid register first then
copied. To load the value of 10 into register zero
(R0):
Code:
…
DEC Rd SREG: I T H S V N Z C
CPU
R15
Rd = Rd - 1 R16
R17
Example: PC
…
R30
DEC R23 Instruction decoder
R31
Instruction Register
R23 = R23 - 1 registers
Address
I/O
$00
Mem.
$20
Name
TWBR
I/O
$16
Data Address Space
Address
Mem.
$36
Name
PINB
Address
I/O
$2B
Mem.
$4B
Name
OCR1AH
$01 $21 TWSR $17 $37 DDRB $2C $4C TCNT1L
$02 $22 TWAR $18 $38 PORTB $2D $4D TCNT1H
$03 $23 TWDR $19 $39 PINA $2E $4E TCCR1B
$04 $24 ADCL $1A $3A DDRA $2F $4F TCCR1A
$05 $25 ADCH $1B $3B PORTA $30 $50 SFIOR
$06 $26 ADCSRA $1C $3C EECR OCDR
$07 $27 ADMUX $1D $3D EEDR $31 $51 General RAM EEPROM Timers
OSCCAL
$08 $28 ACSR $1E $3E EEARL $32 $52 Purpose
TCNT0
$09 $29 UBRRL $1F $3F PROGRAM
EEARH $33 $53 Registers
TCCR0
$0A $2A UCSRB UBRRCROM $34 $54 MCUCSR
$20 $40
$0B $2B UCSRA UBRRH $35 $55 MCUCR
Program CPU
$0C $2C UDR $21 $41 WDTCR $36 $56 TWCRData
$0D $2D SPCR $22 $42 ASSR Bus
$37 $57 SPMCRBus address bus
$0E $2E SPSR $23 $43 OCR2 $38 $58 TIFR data bus
control bus
$0F $2F SPDR $24 $44 TCNT2 $39 $59 TIMSK Data
$10 $30 PIND $25 $45 TCCR2 $3A $5A GIFR
$11 $31 DDRD 8 bit $46
$26 ICR1L $3B $5B GICR Bus
Data Address
$12 $32 PORTD $27R0 $47 ICR1H $3C $5C OCR0
Space
$13 $33 PINC $28R1 $48 OCR1BL $3D $5D SPL
$14
$0000 $34 DDRC $29R2 $49 OCR1BH $3E $5E SPH Interrupt Other
General
$0001 $35
$15 PORTC OSC Ports
$2A $4A OCR1AL $3E $5E SREG Unit Peripherals
...
Purpose
...
Registers R31
$001F I/O Address I/O
$0020 Example:
TWBR
TWSR
$00 Add contents
$01
of location
Example: 0x90
Store to contents
0x53 into the of location
PINS SPH 0x95
register.
Standard I/O Example:
and store What doesinthe
the result following
location
The
LDS
STS (Load
(Store instruction
0x313.
address of
directSPH do?space)
isdata
from
direct to 0x5E
data space)
Example: Write a program that stores 55 into location 0x80 of RAM.
...
Registers
Solution:
SPH $3E
$005F
$0060
of LDS
RAM
SREG $3FR20,2
into location 0x81.
LDS
STS Rd, addr ;[addr]=Rd
addr,Rd ;Rd = [addr]
General
LDS R20, 0x90 Solution:
Solution: ;R20 = [0x90]
purpose Answer:
...
RAM
(SRAM) LDS R20,
Solution:
LDI R21, 55 Example:
0x95 LDI R20, 0x53
;R20 =;R21
55 = [0x95]
;R20 = 0x53
It copies
ADD
the contents
R20, R21
of
STSR2 ;R20
into R20;
0x5E,= R20as+ 2R21
R20
is the;SPH
address
= R20of R2.
STS
LDS 0x80, R20 LDS
R20, 0x80 STS R1,
0x60,R15
;[0x80] =0x60
;R20 R20 ; [0x60] = R15
= 55
= [0x80]
STS 0x313, R20 ;[0x313] = R20
$FFFF
STS 0x81, R20 ;[0x81] = R20 = [0x80]
Data Address Space
Purpose
of the SRAM
...
Registers R31
$001F I/O Address I/O
TWBR
Solution:
$00
OUT IOAddr,Rd
PINS
;[addr]=Rd
IN Rd,IOaddress
Names of;Rd = [addr]
$0020
TWSR $01
Standard I/O Using IO registers
...
...
Registers
SPH $3E
IN R20,PINC ;R20 = PINC
$005F SREG $3F
$0060
General
IN R21,PIND Example:
;R21 = PIND
Example:
purpose
...
...
LDI LDILDI 0x38
LDI
R16, R20,
R20,
R20, 0x9C
0xA5
R0 0x9C ;R16 = 0x38 Registers
0x52
$001F IO Address
ALU LDI 0x2F
LDI R1
R21,
R21, 0x9C
0x23
0x73 TWBR $00
LDI LDI
R17, R21, 0x64
;R17 = $0020
0x2F TWSR $01
R2
Standard IO
SUB R17R20,
SUB
ADD R20, R21
R20, R21;add R17;add
R21 ;subtract
;subtract
R21 toR21R21 from R20
R20from R20
...
ADD R16, to Registers
R16
...
…
SPH
SREG: I T H S V N Z C $3E
Solution:
Solution:
Solution:
$005F SREG $3F
CPU
Solution: R15 11
$0060
$52
$9C
$A5 0101
R16 0010
1001 1100
1010 1100
0101
$38
$9C 0011
1001 1000 General
- $23
$73 0111
R17 0011 purpose
+-- +$64
$9C 1001 0100
0010 1100
0011
...
$2F 0110 1111 RAM
PC $DF 1101 1111 R20 = $DF
…
$00
$82
$67
$100 1 00000000
1000
0110
0000 0000
0010
0111 R20 =
R20
R16
R20 == 00
$00
$82
0x67
(SRAM)
C = 1 because R21 is bigger than R20 and there is a borrow from D8 bit.
CC===100because
C becausethere
because R21 is
R21 is not
isnot bigger
bigger
a carry
R30 than R20
than
beyond R20 andbit.
and
the D7 there is
there is no
no borrow
borrow from
from D8
D8 bit.
bit.
Z
C == 00 decoder
because
because the
thereR20
is has
no a value
carry otherthe
beyond than
D7zero after the subtraction.
Instruction
ZZ =
H == 1
01 because
because there
because the R20
the R20 iscarry
is ahaszero after
a value
from the D3
other
the than 0 bit.
subtraction.
to theafter the subtraction.
D4 bit.
H = 1 because there isR31 a borrow
carry from
from D4D3
the toto
D3.
the D4 bit.
ZH===100Register
H
Instruction
becausethe
because
because there
there
R20 is(the
is no
no borrow
borrow from
result) from
has D4
aD4 to D3.
to
value D3.
0 in it after the addition.
Z = 0 because the R16 (the result) has a value other than 0 after the addition.
registers
$FFFF
Writing Immediate Value to SRAM
You cannot copy immediate value directly into
SRAM location in AVR.
This must be done via GPRs
Example: The following program adds content of
location 0x220 to location 0x221
Exercise
Implement the program that calculates 19 + 95 +
5 on AVR Studio.