Microcontroller Overview &

The 8051 Architecture

The 8051 Architecture
 Microprocessors and microcontrollers

 The 8051 microcontroller: a brief history

 Block diagram of the original 8051

 Is 8-bit still relevant?

 Harvard and von Neumann architectures

 Memory organization

 Special function registers

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Microprocessors and Microcontrollers
 Microprocessor: general-purpose CPU
 Emphasis is on flexibility and performance
 Generic user-interface such as keyboard, mouse, etc.
 Used in a PC, PDA, cell phone, etc.

 Microcontroller: microprocessor + memory on a single chip

 Emphasis is on size and cost reduction
 The user interface is tailored to the application, such as the buttons
on a TV remote control
 Used in a digital watch, TV remote control, car and many common
day-to-day appliances

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Microcontroller Architectures
 Microcontroller architecture refers to the internal hardware
organization of a microcontroller

 Each hardware architecture has its own set of software

instructions called assembly language that allows
programming of the microcontroller

 Some of the popular microcontroller architectures

 Intel 8051
 Zilog Z80
 Atmel AVR
 ARM

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Some Microcontroller Producers
 Texas Instruments
 Microchip
 Silicon Labs
 Intel Corporation
 Analog Devices
 Atmel Corporation
 Dallas Semiconductor
 Fujitsu Semiconductor Europe
 National Semiconductor
 STMicroelectronics
 ZiLog
 Freescale Semiconductor
 Infineon Technologies
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The 8051 Microcontroller—A Brief History
 In 1980, Intel introduced the 8051, relevant today after more
than two decades
 First device in the MCS-51® family of 8-bit microcontrollers
 In addition to Intel there are other second source suppliers
of the ICs, who make microcontrollers that are compatible
with the 8051 architecture.
 In recent years some companies have incorporated many
different and additional features into 8051
 In 2000, Silicon Laboratories introduced a field
programmable, mixed-signal chip (C8051F020) based on
the 8051 core CPU

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Is 8-bit Still Relevant?
 “n-bit” – the “n” refers to the data bus width of the CPU, and
is the maximum width of data it can handle at a time
 PCs with 64-bit microprocessors are becoming common
 Over 55% of all processors sold per year are 8-bit
processors, which comes to over 3 billion of them per year!*
 8-bit microcontrollers are sufficient and cost-effective for
many embedded applications
 More and more advanced features and peripherals are
added to 8-bit processors by various vendors
 8-bit MCUs are well-suited for low-power applications that
use batteries

*Note: Statistics from Embedded.com Article ID# 9900861, Dec 2002

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Example System: RC Car
Antenna Antenna

Front Electric
Forward RF RF Receiver Microcontroller
Microcontroller Motor (Left/Right)
Transmitter
Reverse

Rear Electric Motor

Left Power Power (Fwd/Reverse)
Voltage Regulator Voltage Regulator
Right
Car lights (LEDs)
Batteries
Controls Batteries

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Block Diagram of the Original 8051

/INT0 /INT1 T0 T1

Other
interrupts

128 bytes Timer/Counter

4K byte Program
Data Memory (Timer 0 &
Memory (ROM)
(RAM) Timer 1)

8051 CPU

64 K Bus I/O ports Serial Port

Oscillator Expansion Control
&Timing

From Crystal
Oscillator or RC ALE /PSEN P3 P2 P1 P0 TxD RxD
network (Address/data)

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Harvard and von Neumann Architectures
 Harvard Architecture—a type of computer architecture
where the instructions (program code) and data are stored
in separate memory spaces
 Example: Intel 8051 architecture

 von Neumann Architecture—another type of computer

architecture where the instructions and data are stored in
the same memory space
 Example: Intel x86 architecture (Intel Pentium, AMD Athlon, etc.)

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MCU Fetch-Execute Cycle
 Fetch operation—retrieves
an instruction from the Program
Counter
location in code memory (PC)
pointed to by the program
counter (PC)
+
F
 Execute operation— Code Memory
e
t
executes the instruction c
that was fetched during the h

fetch operation. In addition CPU

to executing the instruction,

the CPU also adds the
appropriate number to the To other
peripherals
PC to point it to the next
instruction to be fetched.

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8051 and 8052
 The feature set of the 8052 is the superset of the 8051

 In addition to all the features of the 8051, the 8052 includes

 128 bytes internal RAM (total of 256 bytes)
 A third 16-bit timer, with new modes of operation
 Additional SFRs to support the third timer

 The Silicon Labs C8051F020 builds upon the 8052, and

adds further features

 The term “8051” is typically used in place of “8052”, and also

refers to the 8051 architecture

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C8051F020 Data Memory (RAM)
 Internal Data Memory space is
divided into three sections
 Lower 128
 Upper 128
 Special function register (SFR)

 There are 256 bytes of memory

space physically, the Upper 128
and SFRs share the same
addresses from location 80H to
FFH.

 Appropriate instructions should

be used to access each
memory block

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Lower 128—Register Banks and RAM

General
Purpose RAM
(80 bytes)

Bit-addressable
Area (16 bytes)

Register Banks
(8 bytes per
bank; 4 banks)

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Special Function Registers (SFRs)

 SFRs provide control and

data exchange with the
microcontroller’s resources
and peripherals
 Registers which have their
byte addresses ending with
0H or 8H are byte- as well as
bit- addressable
 Some registers are not bit-
addressable. These include
the stack pointer (SP) and
data pointer register (DPTR)

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Summary of SFRs
 Accumulator (ACC) and B register
 ACC (also referred to as A) is used implicitly by several instructions
 B is used implicitly in multiply and divide operations
 These registers are the input/output of the arithmetic and logic unit (ALU)

 Program status word—PSW

 Shows the status of arithmetic and logical operations using multiple bits such as Carry
 Selects the Register Bank (Bank 0 - Bank 3)

 Stack pointer—SP
 Data pointer—DPTR (DPH and DPL)
 16-bit register used to access external code or data memory

 Timer Registers—TH0, TL0, TH1, TL1, TMOD, TCON

 Used for timing intervals or counting events

 Parallel I/O Port Registers—P0, P1, P2 and P3

 Serial Communication Registers—SBUF and SCON

 Interrupt Management Registers—IP and IE

 Power Control Register—PCON

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