Fully-differential asynchronous non-binary 12-bit SAR-ADC in SKY130, free to re-use under Apache-2.0 license
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Updated
Mar 13, 2025 - Verilog
Fully-differential asynchronous non-binary 12-bit SAR-ADC in SKY130, free to re-use under Apache-2.0 license
A simple MOSFET model with only 5-DC-parameters for circuit simulation
Design of Differential Input Single Ended Output Single Stage Amplifier
The SPI Slave with Single Port RAM project demonstrates the implementation of a high-performance SPI slave interface with integrated single-port RAM. The design utilizes a finite state machine (FSM) with different encoding styles to achieve optimal timing performance.
Inter-OS Migration of CAD Tools for IC Design
Design analog ICs tailored to system requirements with a solid grasp of CMOS technology. Gain proficiency in circuit analysis and master tools like ngspice, xschem, Magic, and Python for full custom design and verification.
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