Computer Structure Scholar Notes
Computer Structure Scholar Notes
Topic 2
Computer Structure
Contents
2.1 Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33
2.2 Computer Organisation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33
2.2.1 Calculating machines - from Babbage to integrated circuits . . . . . . . 34
2.2.2 Computer organisation . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35
2.2.3 The stored program concept . . . . . . . . . . . . . . . . . . . . . . . . 39
2.2.4 Fetch-execute cycle . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 39
2.2.5 Two-state machine . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 43
2.2.6 Review questions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 43
2.2.7 Structure of a small computer system . . . . . . . . . . . . . . . . . . . 43
2.2.8 Computer components and their function . . . . . . . . . . . . . . . . . 44
2.3 Memory . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 45
2.3.1 Random access memory . . . . . . . . . . . . . . . . . . . . . . . . . . 46
2.3.2 Read only memory . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 46
2.3.3 Review questions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 47
2.3.4 Cache memory . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 47
2.3.5 Memory maps . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 48
2.3.6 External memory . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 50
2.4 Central processing unit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 51
2.4.1 The architecture of the microprocessor . . . . . . . . . . . . . . . . . . . 51
2.4.2 Accessing memory . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 52
2.4.3 Control unit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 53
2.4.4 Arithmetic logic unit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 55
2.4.5 Registers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 56
2.4.6 Review questions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 56
2.5 Buses . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 57
2.5.1 Address bus . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 58
2.5.2 Data bus . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 60
2.5.3 Review questions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 61
2.6 Summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 61
2.7 End of topic test . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 61
32 TOPIC 2. COMPUTER STRUCTURE
Prerequisite knowledge
Before studying this topic you should be able to:
Represent the data flow between the component devices of a computer system;
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Describe the features and uses of Random Access Memory (RAM) and Read Only
Memory (ROM).
Learning Objectives
By the end of this topic, you will be able to:
Describe the purpose and function of the ALU and the Control Unit within a
processor;
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Describe the purpose and function of the data bus and address bus;
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Describe the purpose of read, write and timing functions of control lines;
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Describe and make distinctions between registers, cache memory, main memory
and backing store in terms of function and speed of access.
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Revision
The following exercise tests the prerequisites for this topic. Ensure that you are happy
with your responses before progressing.
Q1: What type of memory stores programs that must not be lost when the power to
the system is removed?
Q2: A processor will frequently transfer data. Where is the data transferred to and
from
a) Output devices
b) Input devices
c) Clock
d) Memory
2.1 Introduction
This unit on Computer Structure describes in detail the function of the component parts
of a processor in the manipulation of data.
This is extended to the methods of transferring data within a processor and between a
processor and memory.
The concept of a stored program is considered and the steps in the fetch-execute cycle
to access and run programs. Memory types are considered, from registers to backing
storage and how memory is defined and addressed.
If computers have made such a significant impact, then it makes sense to find out a little
more about how they work and how you can make use of them. For instance, how are
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they structured? How do they operate internally? How is data represented? Why are
some computers faster and more powerful than others? What devices can you attach to
them and how can you get them to communicate?
These are some of the questions we will be looking at in this topic. There are others.
First let us take a closer look at the basic structure of a small computer system and at
how it operates internally.
Learning Objective
At the end of this topic you will know:
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the program was a set of instructions that, if followed, would accomplish a task -
an algorithm.
These ideas were not developed further until electro-mechanical relay technology
produced computers in the 1930s. By today’s standards these machines were large
and slow.
Vacuum tube technology in the 1940s increased the speed of the computers and by the
1960s transistor technology reduced the size and power requirements.
From about 1965 to the present, the
circuits for many operations have
been incorporated into a single chip as
Integrated Circuits (ICs). Chip fabrication
techniques also improved, allowing further
integration to the extent that we now have
Very Large Scale Integration (VLSI) and
a complete processor on a chip. This made
possible the Personal Computer.
Review Questions
Q5: What technical development in the 1940s and 1950s helped reduce the size and
power requirements of computers?
Q6: What affect did the development of the integrated circuit have on computers?
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Until now we have been looking at how we can use simple logic gates to produce devices
such as adders, decoders and flip-flops. Although we have looked at simplified versions
of these logic devices, it is devices such as this that are combined together to create a
computer. We will now step back a level and look at the basic architecture of a simple
computer.
A simple computer consists of the following components (see Figure 2.1):
Processor;
Memory;
Input/output device;
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purposes at different times. For example, one moment sending an address to memory
and the next transmitting data from the addressed memory location to the CPU.
A more detailed diagram of the main components of a simple computer are shown in
Figure 2.2.
Central Processing Unit (CPU). Carries out computation and has overall control
of the computer.
Main memory. Stores programs and data while the computer is running. Has fast
access, is directly accessible by the CPU, is limited in size and non-permanent.
External memory. Holds substantial quantities of information too large for storage
in main memory. Slower access than main memory, not accessible directly by the
CPU but can be used to keep a permanent copy of programs and data.
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input data from an external device (e.g. the keyboard) travelling from the device to
main memory
The speed of the system bus is very important since, if it is too slow, the speed of the
CPU is restricted by having to wait for data.
The CPU typically consists of
A Control Unit (CU) which exerts overall control over the operation of the CPU;
The Program Counter (PC) which holds the address in memory of the next
instruction in the program;
The Instruction Register (IR) which holds the instruction currently being
executed.
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Q12: All CPUs contain two particular registers. What are these registers and for what
are they used?
Being able to load and execute different programs allows the computer to become a
general purpose problem solving machine.
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Earlier we introduced the fetch-execute cycle and described the stored program concept
where machine code instructions are repeatedly transferred from main memory to the
CPU for execution.
We would now like to show you how the address bus, data bus, control bus and internal
registers take part in reading a program instruction from main memory - essentially the
fetch phase of the fetch-execute cycle. Figure 2.3 below illustrates in more detail the
fetch-execute cycle.
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The first of the two main phases of the fetch-execute cycle is the fetch phase, and
consists of the following steps:
2. The contents of memory at the location designated by the MAR are copied into
the MDR;
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3. The PC is incremented;
Remember that the PC is used to keep track of where execution has reached. Thus the
first step is concerned with establishing the location of the next instruction to execute.
The second step is to get the value into the MDR.
The third step is to ensure that the PC points to the next instruction to be executed:
if we did not increment the PC at some point, we would continually execute the same
instruction over and over again!.
The fourth step ensures that there is a copy of the instruction in the IR ready for
execution to begin.
Once the execute phase has completed, the fetch phase will be carried out again.
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2.2. COMPUTER ORGANISATION 43
Learning Objective
At the end of this sub-topic you will know:
The purpose of the Address Bus, the Data Bus and the Control Bus;
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We want to look at the internal organisation of the computer at a level of abstraction that
describes the system as interacting, high-level components. For now, we are not that
interested in the lower level detail of shunting bits around the machine.
To get a feel for this component level, imagine you are a car driver. When you step into
the car, what is visible to you are interfaces to the components that allow you to drive it.
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2.3 Memory
Main memory (RAM and ROM) stores programs and data while the computer is
operating.
Memory used to be soldered onto the system board
of the processor (motherboard). The need to
provide more readily upgradable computers led to
the development of Single In-Line Memory Modules
(SIMMs). These plug into a SIMM socket on the
motherboard. Each SIMM contains a number of DRAM
chips and varies depending on the type of computer
and the amount of RAM required.
Later, we will take a closer look at the characteristics
of RAM and ROM chips and the differences between
DRAM and SRAM.
Main memory consists of a large sequence of bytes
(typically 64 Mbytes in a PC) each of which may be
directly accessed using its memory address. In a byte-
wide memory, the first byte in memory has address
0 and subsequent bytes have addresses 1,2,3, etc.
as shown in a simplified representation of RAM in
Figure 2.5
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SRAM chips are very fast but are not suited for very large amounts of memory. They are
more suited to cache memory, where only small amounts are required. You will learn
more about cache memory when we look at factors that affect system performance.
DRAM chips are more widely used. They are much cheaper to produce, can hold larger
amounts of data in a smaller physical area and require less power. They are dynamic,
requiring a continuous signal to refresh the contents of the chip.
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ROMs are used to store programs and data that do not change during the operation of
the system. These are known as mask programmed ROM.
Where different software and/or data is needed on a ROM chip, manufacturers produced
a chip that allows existing data to be erased and new data written. These are known
as electrically programmable read-only memory chips (EPROMs). Data is erased by
shining ultraviolet light onto the chip.
EPROMs have the disadvantage that all the chip contents are removed during erasure.
The entire chip has to be reprogrammed, even if only a single memory word needs to
be changed.
Another type of ROM technology where the contents of the chip can be altered is the
electrically erasable programmable read-only memory (EEPROM). By applying suitable
electrical pulses, this chip can be selectively reprogrammed which means that the entire
contents need not be erased.
ROM technologies
On the web is an activity that asks you to match ROM technologies to their descriptions.
You should now carry out this activity.
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Different processors have different ways of organising information in RAM, the BIOS and
part of the operating system will always be in the same protected areas. Certain areas
are allocated for user applications.
Memory addresses are often written in hexadecimal as they would otherwise be
awkwardly long binary strings.
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system from position 016 to 80016 , and a 32 Kb program starts at position 4000 16 , is
there enough free memory space for a 1 Kb block of data starting at position C000 16 ?
Solution:
O/S Program Data
Step 1
There are 16 address lines. The maximum number of address locations = 2 16 = 65536
= 64 K.
Mark 64K on the memory map.
Step 2
O/S from 016 to 80016.
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50 TOPIC 2. COMPUTER STRUCTURE
There are device drivers positioned from 2000 16 for 8 Kb A program runs from 32 K to
the top of memory.
Identify where, in memory, there is free space and how much there is.
Q24:
A processor has 32 address lines. There is BIOS data from 0 to 8 Kb The DOS kernel
lies between 300016 and 6000 16 There is a program from F0000 16 using 24 Kb There
is a data block from F00 000016 using 32 K.
Draw the memory map clearly identifying the start and end of each used memory area.
hard disk;
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floppy disk;
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zip disk;
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CD-R;
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magnetic tape;
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flash drive.
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Control unit;
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Registers.
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Memory Address Register (MAR) - specifies the address in memory for the next
read or write operation from or to memory;
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The MAR register is connected to the address portion of the system bus and the MDR
register is connected to the data portion of the system bus.
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To read data from memory, the CPU places the address of the required memory
location into the MAR and activates the memory-read control line of the system
bus. This will cause the required data to be transmitted from memory via the data
bus to the MDR;
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To write from the CPU to memory, the CPU places the data to be written in the
MDR; the address of the memory location where they are to be written is placed
in the MAR; and the memory-write control line is activated.
The MAR and MDR registers have a large part to play in the fetch-execute cycle.
When fetching an instruction from memory during the fetch-execute cycle, the address
contained in the PC will be copied to the MAR using the processor’s internal bus. When
the memory-read control line is activated, the instruction will be sent to the MDR using
the data bus. From the MDR it will be copied to the IR using the processor’s internal
bus.
When executing an add to accumulator instruction, the address part of the instruction
will be sent to the MAR so that the operand can be obtained from memory. The operand
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is then placed in the MDR from where it can be sent to the ALU, via the CPU internal
bus, for adding to the contents of the accumulator.
When data is to be read from a memory location then the control unit will initiate a read
signal on the control bus and when data is to be written to a memory location then the
control unit will initiate a write signal. These operations are described later in greater
detail when we take a closer look how an instruction is fetched from main memory.
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2.4.3.2 Polling
The first is known as polling. This is what certain types of door to door salespeople do.
They ensure that all their customers have a copy of the company catalogue and then
they visit every house on a rota basis to ask if the customer would like to place an order.
This means that the salesperson will visit every house, say, every month.
They may know that the average time between orders is about 3 months but they
can’t take the risk of leaving the customer unattended when they might want to place
a big order. This means that the salesperson may be wasting a lot of time making
unnecessary calls. From the customer’s point of view this is not ideal either, because
they might realise a week after the last visit that they have forgotten something important
and there is no way to shorten the waiting time until next month.
For a computer system this would work quite satisfactorily if the processor was running
a microwave oven because the processor would be dedicated to that one task and
efficiency would be a meaningless concept.
The life of the door to door salesperson would be simpler and they would be able
to handle far more customers, if the customer was given a phone number or e-mail
address and asked to initiate contact when they wanted to order. This would provide
the customer with a much better service and also allow the salesperson more time to do
other things.
2.4.3.3 Interrupts
In computer terms, the signal from a peripheral device or program that the attention of
the processor is needed is known as an interrupt. Every time a keyboard key is pressed
an interrupt is generated. When the machine is designed, the handling of interrupts is
planned for.
In an IBM type PC there is an allowance for 256 different types of interrupt. When one of
these occurs the system is able to identify its type. With this information the processor
then looks at an area in memory in which an address for each of the 256 interrupts is
stored. At this address there is a program known as an Interrupt Service Routine. The
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address table is used to furnish addresses indirectly because this makes it possible for
a programmer to control. Many of the ISRs are stored in ROM.
When an interrupt is received, the processor will:
store the contents of its internal registers in an area of memory called the stack;
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There are different priority levels assigned to interrupts. If an interrupt arrives while
the processor is already dealing with one, it can do one of two things. If the second
interrupt is of a lower priority the processor will carry on until the current interrupt has
been serviced then it will service the second. If the new interrupt is of a high priority
the processor will store it’s current state on the stack and start to process the newer
interrupt. When that one is finished it will complete the processing of the first interrupt
and then revert to the original process. This is known as nesting interrupts.
Interrupts can be generated by hardware or software.
Any signal coming from a peripheral device will prompt an interrupt. Each I/O connection
has a physical link called an IRQ line. This serves to carry the interrupt signal and in turn
to identify the source of the interrupt. Internal devices connected via the motherboard
also use IRQ lines. There is a limited number of IRQ lines and this can be a limiting
factor in adding hardware to a computer system. However the newer systems using USB
(Universal Serial Bus) or Firewire can accept a number of hardware devices sharing IRQ
lines.
A software interrupt is one generated from within a program. This includes routine
activities like sending a character to the keyboard or the screen. A software fault like
trying to divide by zero, or trying to write into a protected area of memory, will also call
an interrupt.
Generally the processor can mask or delay the servicing of interrupts until it is ready.
There is, however, a group of interrupts that cannot be ignored. These are known non-
maskable interrupts (NMIs). Typically this interrupt would indicate a problem such as
loss of power, requiring the computer to shut down immediately.
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The ALU may also perform logical operations such as a logical OR operation. This
requires in-built logic elements.
The ALU uses arithmetic registers which are storage locations used to hold data and
temporary results of calculations. One special storage register used by the ALU is the
accumulator which it uses to hold the results of additions. Typical operations performed
by the ALU include:
addition;
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subtraction;
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shift left;
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shift right;
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logical OR;
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logical AND;
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increment;
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decrement.
2.4.5 Registers
A register is a storage location used to hold instructions,
memory addresses, data or the temporary results of
calculations. Because registers are internal to the
processor, they can be accessed at high speed.
The CPU has a set of general and special purpose
registers and the number and type of registers in
any one CPU will be different from those in another
CPU. Special purpose registers typically found within
a processor are listed below:
memory address register (MAR) is used to hold the address of a location in main
memory.
memory buffer register (MBR) is used to hold data that has just been read from main
memory or is to be written to main memory.
instruction register (IR) is used to hold the current instruction that is being executed.
program counter (PC) holds the address of the next instruction to be fetched from
memory.
The processor also has a set of general purpose registers. They are called general
purpose because their role is not defined at manufacture and can be used by
programmers as appropriate.
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a) ALU
b) RAM
c) Special purpose registers
Q27: How does the control unit synchronise operations within the computer?
Q28: Which of the following describes how the ALU performs multiplication?
Q29: Why are general purpose registers provided within the CPU?
2.5 Buses
The system bus is a group of parallel wires, each
carrying a single bit of data.
In a single bus system, input/output devices (I/O) and
memory use the same communications channel.
A two bus system has a separate I/O channel and memory transfer channel. Larger
systems make use of several I/O buses for more effective operation.
A single bus system is typical of small computer systems.
The system bus must provide components with the use of a Data Bus, Address Bus and
Control Bus.
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Now add another address line. There are now 2 lines, each of which can represent 2
distinct values. This results in 4 possible unique addresses shown below.
Now add another address line. There are now 3 lines, each of which can represent 2
distinct values, resulting in 8 unique addresses.
Can you think of a general formula to relate the number of directly addressable memory
locations to the width of the address bus? If not, try answering the questions below and
then think through the problem again.
Q30: How many memory locations can be directly addressed using 5 bits?
a) 10
b) 7
c) 32
Q31: How many memory locations can be directly addressed using 8 bits?
a) 8
b) 256
c) 16
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Generally then,
The number of memory locations = 2width of address bus
Thus, a 24-bit address bus will be able to distinguish between:
224 = 16,777,216 memory locations.
2.5.1.1 Addressability
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60 TOPIC 2. COMPUTER STRUCTURE
write to memory;
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write to I/O.
Therefore to fetch an instruction or data item from memory all 3 buses are used.
Control bus
CPU
Address bus
I/O interface
Memory
Figure 2.7:
In a single bus system, the data bus is shared by main memory and external devices
such as screens, printers and disk drives.
You can appreciate why this bus needs to be bi-directional if you consider some typical
operations that are carried out. For instance, the CPU must fetch instructions from
main memory which requires transfer in the direction from main memory to the CPU. If
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the stored program has instructions to calculate values and update variables, then the
results of the calculations need to be stored in main memory. This requires a transfer of
data from the CPU registers to main memory.
In the case of communicating with an external device, such as a hard disk, data must be
loaded from the device and also saved to the device. This requires bi-directional data
transfer.
2.6 Summary
The following summary points are related to the learning objectives in the topic
introduction:
The storage of data using registers, cache, memory and backing storage;
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Accessing memory.
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Topic 3
Computer Performance
Contents
3.1 Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 65
3.2 Measuring performance . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 65
3.2.1 Clock speed . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 66
3.2.2 MIPS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 67
3.2.3 FLOPS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 68
3.2.4 Benchmark tests . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 68
3.3 Performance factors . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 69
3.3.1 Data bus width . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 69
3.3.2 Data exchange with peripherals . . . . . . . . . . . . . . . . . . . . . . . 69
3.3.3 Main memory . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 74
3.3.4 Cache memory . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 76
3.3.5 Virtual storage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 77
3.3.6 Review questions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 77
3.4 Summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 78
3.5 End of topic test . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 78
Prerequisite knowledge
Before studying this topic you should be able to:
Describe the uses and compare the features of embedded, palmtop, laptop,
desktop and mainframe computers;
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Make comparisons in terms of processor speed, main memory, backing store and
peripherals;
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Learning Objectives
By the end of this toipc you will be able to:
Describe the factors affecting system performance including data bus width, cache
memory and data transfer rates between peripherals;
64 TOPIC 3. COMPUTER PERFORMANCE
Describe the effects of increases in clock speed, memory and storage capacity.
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Revision
The following exercise tests the prerequisites for this topic. Ensure that you are happy
with your responses before progressing.
Q1: What supplies regular control signals to the processor that controls the timing of
the data transfers and processes?
a) ALU
b) clock
c) control bus
d) control unit
Q2: A palmtop computer system is an example of a :
a) Embedded computer
b) Mainframe computer
c) Minicomputer
d) Microcomputer
Q3: Which of the following gives an indication of a computer’s performance?
a) Modem speed
b) Modem bandwidth
c) Clock speed
d) VDU replenishing rate
3.1 Introduction
This unit on Computer Performance considers the factors that affect the performance
of a computer system. Individual factors may well have an effect, but it is important
to consider all factors collectively to allow for a meaningful analysis of a system’s
performance.
Different measurements of performance are considered along with current trends in
improving computer specifications that aim for higher performance.
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3.2.2 MIPS
In an earlier topic you met the clock when we introduced the functions of the control unit.
You learned that it was an electronic pulse, similar to a musical metronome, generated
at a constant frequency and that on each pulse, machine operations were carried out.
Clock speed will clearly have an impact on performance. If more pulses can be
generated per second, with machine operations carried out on each pulse, then it is
safe to conclude that more machine operations are carried out as clock speed increases.
This is readily observed in the slower performance of older PCs, running at clock speeds
of 200 MHz, with most modern PCs, typically operating at around 1.2GHz.
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Mip rate
A clock speed of 200 MHz does not mean that 200 million instructions are executed per
second. It can take at least five clock pulses to execute an instruction. One to load
the instruction, one to decode it, one to get any data that the instruction needs, one to
execute the instruction and one to store the result. In this case, a 200 MHz processor
would be capable of executing 40 million instructions per second. This is known as the
machine cycle time, often expressed in mips (millions of instructions per second).
It may therefore be the case that two processors have the same clock speed but different
mip rates.
3.2.3 FLOPS
Floating point operations per second
You should be aware that using mip rate as a comparison factor also has problems.
What sort of instructions are being carried out? There is no standard set and so
some manufacturers could use simpler and faster instructions than others. A better
measure of performance is the Flop (floating point operations per second). The
procedures involved in doing a floating point multiplication are basically the same for
every processor. As these kinds of operations are used in most software they provide
the basis of a reasonable comparison of system performance.
In the past 10 years processor clock speeds have increased at a phenomenal rate. The
laws of Nature, however, limit how far clock speeds can be increased.
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64-bit computers appeared around 1993, however most of today’s processors have a
32-bit word size. Increases in data bus widths and clock speeds of the Intel processor
series, from 1st generation to the current 7th generation are shown in Table 3.2
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recorders, mice, keyboards etc. They also include mass storage devices such as
magnetic tape drives and disk drives.
Each device has an operational speed, uses its own language and deals with different
amounts of data at a time.
In order for these devices to communicate with
the CPU they need to be interfaced. An
interface is a unit that sits between the CPU
and a peripheral device and compensates for
the differences in speed, codes etc. to ensure
compatibility.
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serial
both with at least one parallel port.
The keyboard and mouse connect through
a serial interface, while printers, zip drives
and CD-ROMs (requiring larger amounts
and much faster transfer rates) connect to
a parallel interface. prin
ter
zip
Over longer distances there is a possibility of skewing, where the individual bits may
arrive at their destination at different times. The data will lose its integrity. For longer
distances, where speed is not essential, serial communication is more practical.
Parallel data transmission is illustrated in Figure 3.1
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1 0 1 0
1 0 1 0
each bit is transmitted on
single unit
single line at the same time
of data
1 0 1 0
1 0 1 0
bit-time
The interface also contains a set of status wires that can be used to signal events such
as:
serial DB9 or DB25 connector. A universal serial bus (USB) may also be used. A USB
interface is a typical port used to connect many devices.
Solution:
1. A single data bit at a time sent to the CPU - typical rate of 1200 bits per second.
2. The interface converts this stream of bits to parallel to send on system bus.
3. Once the byte ready interface asserts an interrupt request.
4. CPU acknowledges request and interface places the byte on the system bus.
The CPU may choose to ignore the interrupt request which may lead to data loss. This
is known as data overrun. In this case the interface must tell the CPU that data has
been lost.
speed of access;
word size;
amount of memory;
cache memory.
The first two aspects are dictated by the processor and logic board (motherboard). We
will look in more detail at how the amount of memory and the use of cache memory
affects system performance.
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Amount of memory
Main memory is a mixture of random access
memory (RAM), read only memory (ROM)
and empty space. Empty space means there
is less physical memory present than can be
directly addressed.
Physical memory can therefore be expanded
by adding more memory modules as and
when required. This is known as a
memory upgrade.
Empty RAM
If your computer is struggling to run some
software or you cannot load all the software
you want at the one time, then adding extra
memory will improve your system’s
performance. For example, if you are using an
application that needs to manipulate large
graphic files, video or sound then you should
be thinking of upgrading RAM to the
computer’s maximum capability.
Machines typically come with 32 Mbytes or
more RAM which can be upgraded to 256
Mbytes or even more.
Full RAM
When there is insufficient main memory then the hard disk can be used as an extension.
This is known as virtual memory and results in slower performance since swapping
data from main memory to hard disk and loading from the hard disk to main memory is
much slower than directly accessing main memory.
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Cache memory
Main memory bus speeds are not able to
match the speed of the CPU and
cache memory is used to speed up this
transfer. This is a small amount of very fast
SRAM that can reside inside the processor or
sit between the processor and main memory.
When writing to main memory the CPU uses the cache to deposit data and then
resumes its operations immediately. The data is transferred to main memory by the
cache controller circuitry.
When reading from memory the CPU first checks whether the information is already
available in the cache memory. If so then it can transfer this at high speed to the CPU.
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something the processor has a greater need for. There are 2 different ways to update
cache memory.
Write through cache. When cache is updated memory is updated at the same time.
Write back cache. Cache is updated, but RAM is not updated until the content of cache
is being cleared. Write back requires fewer write operations but there is an overhead in
managing the selected updates. Write back cache is generally about 10% faster than
write through cache.
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Q6: Explain why an increase in the width of the data bus can improve system
performance.
Q7: A 24-bit address bus allows how many directly addressable locations?
a) 2 X 24
b) 26
c) 224
Q8: Explain why an increase in the width of the address bus have an affect on system
performance?
Q10: How would you calculate the number of memory locations that could be directly
addressed using a 16-bit address bus?
3.4 Summary
The following summary points are related to the learning objectives in the topic
introduction:
Other factors affecting performance include: data bus width, cache memory and
data transfer rates;
Increasing clock speed, memory and storage capacity may improve performance.
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