instruction-set-architecture

💻 An assembler for custom, user-defined instruction sets! https://hlorenzi.github.io/customasm/web/

Database of CPU Opcodes

Assembly program with the MIPS instruction set

UME::SIMD A library for explicit simd vectorization.

XCrypto: a cryptographic ISE for RISC-V

Implementation of a simple SIMD processor in Verilog, core of which is a 16-bit SIMD ALU. 2's compliment calculations are implemented in this ALU. The ALU operation will take two clocks. The first clock cycle will be used to load values into the registers. The second will be for performing the operations. 6-bit opcodes are used to select the functions. The instruction code, including the opcode, will be 18-bit.

RISC-V Assembly code assembler package for Python.

🖥️ An assembler and hardware simulator for the Mano Basic Computer, a 16 bit computer.

HF-RISC SoC

💾 The LC3 virtual machine

Super scalar Processor design

SCARV: a side-channel hardened RISC-V platform

A multi-cycle RISC CPU (processor) like MIPS-CPU architecture in VHDL ( a hardware-side implementation )

Katamaran is a semi-automated separation logic verifier for the Sail specification language. It works on an embedded version of Sail called μSail and verifies separation logic-based contracts of functions by generating (succinct) first-order verification conditions.

Modular Graphical Simulator for Teaching Microprogramming

Instruction Set Architecture Description Format

RISCAL is a 32-bit reduced instruction-set computer (RISC) designed for learning and research purposes. It is named after my dog, Rascal.

Microprocessor without Interlocked Pipeline Stages with the extra JR, DIV and MFLO instructions implemented.

Stack Based Virtual Machine in Golang

Assembly Compiler

6502 virtual machine written in C

Assembly program

A modular general 2-pass assembler written in Python.

SUTD 2020 50.002 Computation Structures Code Dump

yaye is Yet Another y86 Emulator

Multi-Threaded Simulation of Process Switching in Operating System.

Tutorial on Instruction Set Architecture

A simple instruction set architecture.

This is the implementation of an instruction-set architecture (ISA) simulator in Python. It deals with small machine language programs in order to understand the functionality and the structure of a simple processor.