Intelligent Boundary Scan Solutions®

Why should you care about

JTAG / Boundary Scan / IEEE 1149.x

GOEPEL Boundary Scan Seminar

Heiko Ehrenberg
[email protected]

© 2007 - GOEPEL Electronics - www.goepel.com

Why do we need DFT ? Intelligent Boundary Scan Solutions®

! Shrinking device geometries, device pitch

! New packaging technologies
! Diminishing test access
! Rising UUT complexity
! Rising test time

© 2007 - GOEPEL Electronics - www.goepel.com

Test obstacles Intelligent Boundary Scan Solutions®

• UUT complexity
• Test access
• Test time
UUT complexity / Test access / Test time

Test time

UUT complexity

Test access

time

© 2007 - GOEPEL Electronics - www.goepel.com

UUT complexity Intelligent Boundary Scan Solutions®

! Highly integrated components

! More functionality on one board
! Reduced testability

And at the same time …

! Shorter NPI and PLC
! High product mix

© 2007 - GOEPEL Electronics - www.goepel.com

Reduced test access Intelligent Boundary Scan Solutions®

! New device packaging (!BGA, CSP, COP, …)

! Passive components embedded in PCB
! Denser board layouts
! Fewer, smaller test points

Diminishing test access

with probe based test systems

© 2007 - GOEPEL Electronics - www.goepel.com

Cost of Test Intelligent Boundary Scan Solutions®

! Requirement to lower cost because of

! Inflation
! Shorter PLC
! Smaller profit margins

! Test DOES “add value” by

! Catching defects
! Helping control the manufacturing process
! Reducing field returns and warranty issues

© 2007 - GOEPEL Electronics - www.goepel.com

How do we test? Intelligent Boundary Scan Solutions®

Automated
Optical /
X-Ray
Inspection Manufacturing
(AOI/AXI) Defect Analyser Flying Probe
(MDA) Test (FPT)

Functional Test Manual Inspection

(FT) In-Circuit Test
(ICT)
most likely: a combination of those methods
© 2007 - GOEPEL Electronics - www.goepel.com
Common test solutions Intelligent Boundary Scan Solutions®

FPT

MDA
Rework
AOI

AOI

AXI ICT Func-

Screen Placement Reflow tional
Print Solder Test

Combination
Test
Rework
Rework Rework

© 2007 - GOEPEL Electronics - www.goepel.com

Frequent problems Intelligent Boundary Scan Solutions®

$
High density, small footprint components
(BGA, microBGA, Chip On Board, Chip Scale Packages)
$
Loss of test access
$
Ballooning Fixture Costs
$
Long test development time
$
Reduced diagnostic resolution
Is there a way out?

© 2007 - GOEPEL Electronics - www.goepel.com

Can Boundary Scan help? Intelligent Boundary Scan Solutions®

$
Regain test access
$
Improve time to market
$
Use Boundary Scan throughout the whole
product life cycle (reuse test applications)
$
Supports chip, board, and system level test
$
Reduce fixture cost
$
Improve diagnostic resolution
$
Shorten debug time
Reduce cost of test
© 2007 - GOEPEL Electronics - www.goepel.com
Case Study A Intelligent Boundary Scan Solutions®

Type 1: single PCB, predominantly digital circuits

$
components with relatively small pin count, no BGA’s;
$
Some components with Boundary Scan capabilities;
$
well suited for In-Circuit-Test;
$
cost saving potential in combination
of Boundary Scan with ICT
$
Example:
$
~ 1200 component leads
$
200 nets
$
3 BScan compliant components
$
54 BScan accessible nets (27%)
$
Bed-Of-Nail adapter with 200 nails: about $5,000
(80% of the total account for nails, or $4,000)
$
reducing the number of nails by 54 (27% of all 200 nets)
achievable savings: 27% of $4,000, or $1,080
$
50 different kinds of such PCB's: save ~ $54,000 annually
© 2007 - GOEPEL Electronics - www.goepel.com
Case Study B Intelligent Boundary Scan Solutions®

Type 2: single PCB, predominantly digital circuits

$
components with high pin count, few BGA’s;
$
Some components provide Boundary Scan capabilities;
$
High product mix, low volume Flying Prober most useful
$
Example (average unit):
$
560 nets, 3200 pins,
$
2 BScan compliant BGA’s (total of 688 Pins),
$
other high-pin components, total of 956 pins,
$
230 low pin count components;
$
total of 5114 Flying Probe test steps,
13 test steps per second test time of 6.5 minutes;
$
BScan can eliminate 1937 Flying Probe test steps
(38% of all 5114 steps) cost saving of $2.74 per assembly
$
50,000 PCBs per year savings potential is $137.000 annually

© 2007 - GOEPEL Electronics - www.goepel.com

Case Study C Intelligent Boundary Scan Solutions®

Type 3: single PCB, predominantly digital circuits

$
components with high pin count, many BGA’s,
$
Most components provide Boundary Scan capabilities.
BScan testing is a “no-brainer”
$
Example:
only alternative: X-ray inspection, however:
$
average investment (in-line AXI): $300,000
$
test execution time: AXI >> BScan test;
430mm x 380mm PCB with 50 BGA’s:
$
Inspection by AXI: 75 seconds
$
~ 10 seconds via BScan
$
average costs per test minute calculated as $1
$
production volume of 50,000 PCB's per year,
reduction in test execution time: > $50,000 savings annually

© 2007 - GOEPEL Electronics - www.goepel.com

Is BScan right for you? Intelligent Boundary Scan Solutions®

What can BScan potentially do for you?

$
Simplify your test
$
Lower your cost of test
$
Improve your test strategy

Let's find out for sure by doing a

Design For Testability analysis
... free of charge [contact [email protected]]

© 2007 - GOEPEL Electronics - www.goepel.com

In-Circuit Test Intelligent Boundary Scan Solutions®

+ Short test execution

+ Relatively fast test program development
- Expensive test fixtures, maintenance, storage
- New fixtures needed when layout changes
- Typically not available during prototyping
- Test fixtures take weeks to design and build
- Test access limited on modern PCB's

© 2007 - GOEPEL Electronics - www.goepel.com

Flying Probe Test Intelligent Boundary Scan Solutions®

+ No bed-of-nail fixture required

+ Relatively fast test program development
- Very long test execution time
- Modifications of test programs required
when layout changes
- Typically not usable in production test
- Test access limited on modern PCB's

© 2007 - GOEPEL Electronics - www.goepel.com

Functional Test Intelligent Boundary Scan Solutions®

+ Very good at-speed test to verify UUT func-

tionality
- Very long test development times (cost!)
- Poor diagnostic capabilities
- Difficult fault isolation
- Test of all functions (to cover all faults)
practically impossible

© 2007 - GOEPEL Electronics - www.goepel.com

MDA Intelligent Boundary Scan Solutions®

+ Short test execution

+ Fast test program development
- Expensive test fixtures, maintenance, storage
- New fixtures needed when layout changes
- Typically not available during prototyping
- Test fixtures take weeks to design and build
- Test access limited on modern PCB's

© 2007 - GOEPEL Electronics - www.goepel.com

AOI / AXI Intelligent Boundary Scan Solutions®

+ No bed-of-nail fixture required

+ Relatively fast test program development
+ Test of non-electrical properties, such as
alignment
- Long test execution time
- No test of electrical properties
- Only visible features can be verified (AOI)
- Very expensive test equipment (AXI)

© 2007 - GOEPEL Electronics - www.goepel.com

Boundary Scan / JTAG Intelligent Boundary Scan Solutions®

! Potential to enhance time to market;

! Available throughout product life cycle;
! Early, easy and fast test development;
! Test for connectivity problems
(stuck-at 1/0, open pins, shorted nets);
! Value-adding:
! In-System Programming,
! BIST and Debug access,
! System Test;

© 2007 - GOEPEL Electronics - www.goepel.com

ICT vs. Boundary Scan Intelligent Boundary Scan Solutions®

In Circuit Test Boundary

bed of nails Flying Probe Scan

speed + –– o
analog devices (power) + ++ (–)
(IEEE 1149.4)

digital devices o (–) +

(functional
description not ne-
cessary)

net contacting – – +
(mechanically) (mechanically) (via test bus)

flexibility –– + ++
costs per new UUT –– o o
(nail adapter) (test creation) (test creation)

costs fortest equipment – o ++

© 2007 - GOEPEL Electronics - www.goepel.com

BScan in Product Life Cycle Intelligent Boundary Scan Solutions®

© 2007 - GOEPEL Electronics - www.goepel.com

Boundary Scan / JTAG Intelligent Boundary Scan Solutions®

! Regain test access (BGA, CSP, etc.)

! Quick test execution;
! Inexpensive test equipment;
! No or very simple test fixture;

© 2007 - GOEPEL Electronics - www.goepel.com

Boundary Scan applications Intelligent Boundary Scan Solutions®

! Providing test access for ...

! Checking interconnections
! Debugging / emulating circuitry
! Supporting functional test
! Enabling remote test / verification
! Programming devices
! ...

© 2007 - GOEPEL Electronics - www.goepel.com

Extended Boundary Scan Intelligent Boundary Scan Solutions®

POWER IEEE1149.1 IEEE1149.1

RAM 1...4 DISPLAY

TDI
A (LED / LCD)
A
D D !P
TDI
C C (RAM) D A
CION
CLK A D
TDO
TDO

FLASH 1...2

A RS232 RS232
TDI
D
CION
C
TDO
TDI
C (FLASH)

PLD TDI

CLK CION
TDO
TDO

version?
customized adapter
CLUSTER or GÖPEL CION module(s)
UUT
or SCANFLEX® module(s)

Testable device Boundary Scan compliant device

© 2007 - GOEPEL Electronics - www.goepel.com

Limits of Boundary Scan Intelligent Boundary Scan Solutions®

! IEEE 1149.1 limited to digital interconnect test

! No at-speed test (exception: BIST)

New standards (dot4, dot6, ...)

Combination of Boundary Scan and
other Test Methodologies

© 2007 - GOEPEL Electronics - www.goepel.com

Fault spectrum Intelligent Boundary Scan Solutions®

Discussion topics:

What kind of faults do you see most in your

production ?

When and how to you test ?

What is your yield ?

What is your slip-through rate ?

© 2007 - GOEPEL Electronics - www.goepel.com

Fault spectrum Intelligent Boundary Scan Solutions®

Test Coverage models for structural defects:

! MPS - Philips Research
(Material, Placement, Solder)
! PPVS - ASTER Ingénierie
(Presence, Polarity, Value, Solder)
! PCOLA/SOQ - Agilent Technologies
(Presence, Correctness, Orientation, Live, Alignment,
Short, Open, Quality)

Of concern for functional test coverage:

! Design defects
! Functional defects

© 2007 - GOEPEL Electronics - www.goepel.com

Intelligent Boundary Scan Solutions®

What is Boundary Scan ?

© 2007 - GOEPEL Electronics - www.goepel.com

What is Boundary Scan ? Intelligent Boundary Scan Solutions®

A little bit of history (and outlook) ...

© 2007 - GOEPEL Electronics - www.goepel.com

BScan – PCOLA/SQL Intelligent Boundary Scan Solutions®

Component properties:
" Presence
" Correctness (correct device)
" Orientation
" Live (the device is basically alive)
! Alignment (device is centered, no skews or small rotations)

Connections:
" Shorts
" Opens
! Quality

© 2007 - GOEPEL Electronics - www.goepel.com

Basics of IEEE 1149.1 Intelligent Boundary Scan Solutions®

Boundary Scan
IEEE 1149.1 specifies ... Cells
! Test resources to be
implemented in
devices
! Boundary Scan Core Logic
Description Language (digital)
(BSDL)

BIST

TDI TAP controller

TDO
TCK Instruction Register and Decoder
TMS

© 2007 - GOEPEL Electronics - www.goepel.com

Basics of IEEE 1149.1 Intelligent Boundary Scan Solutions®

Mandatory features:
! Test Access Port (TAP):
TCK, TMS, TDI, and TDO
! TAP Controller
! Instruction Register (2 bit or more)
! Bypass Register (1 bit)
! Boundary Scan Register (1 bit or more)

© 2007 - GOEPEL Electronics - www.goepel.com

Basics of IEEE 1149.1 Intelligent Boundary Scan Solutions®

Optional features:
! Fifth Test Access Port (TAP) signal:
/TRST
! IDCode Register (32 bit)
! UserCode Register (32 bit)
! Other via TAP accessible resources
(such as BIST circuitry,
in-circuit programming controller,
etc.)

© 2007 - GOEPEL Electronics - www.goepel.com

IEEE 1149.1 in practice Intelligent Boundary Scan Solutions®

Typical applications (only a few examples):

! Check for shorts between BScan accessible nets
! Check for opens on a BScan pin
! Check for stuck-at-0/1 faults at a net level
! Check for missing resistors
! Check connections to memory devices
! Detect faults in non-BScan circuit clusters
! Control optical indicators (e.g. LED's)
! Provide easy test access for mixed-signal and
functional tests
! Use SAMPLE mode to capture signal pattern

© 2007 - GOEPEL Electronics - www.goepel.com

IEEE 1149.1 in practice Intelligent Boundary Scan Solutions®

© 2007 - GOEPEL Electronics - www.goepel.com

IEEE 1149.1 in practice Intelligent Boundary Scan Solutions®

Fault detection, diagnostics depend on BScan resources

connected to a particular net:

© 2007 - GOEPEL Electronics - www.goepel.com

IEEE 1149.1 in practice Intelligent Boundary Scan Solutions®

Fault detection, diagnostics depend on BScan resources

connected to a particular net: VDD

R1
IC1 IC2
net11
net21

net12
net22

net13

IC3 IC4
net31

net32

net33

© 2007 - GOEPEL Electronics - www.goepel.com

IEEE 1149.1 in practice Intelligent Boundary Scan Solutions®

Test pattern without and with fault (open pin):

© 2007 - GOEPEL Electronics - www.goepel.com

IEEE 1149.1 in practice Intelligent Boundary Scan Solutions®

How about non-BScan devices?

GND GND

IC1 IC2
R1 R2
net11
net54 net510
1 4 10

net12 2 3 5 6 9 8
net56 net58
net53
net13 IC5.1 IC5.2 IC5.3
SN74_125 SN74_125 SN74_125

CS
IC3 OE IC4
net31
EN WE
DIR
A[19:0]
net32

A[8:1] B[8:1] D[7:0]

net33 IC7
SRAM
IC6
SN74_245

© 2007 - GOEPEL Electronics - www.goepel.com

Board Level applications Intelligent Boundary Scan Solutions®

© 2007 - GOEPEL Electronics - www.goepel.com

Board Level applications Intelligent Boundary Scan Solutions®

! Infrastructure Test
! Interconnection Test
! Memory Cluster Test
! Logic Cluster Test
! Other Cluster Tests
! ISP for FLASH
! ISP for serial EEPROM
! ISP for PLD/FPGA
! BIST
! Emulation, Debugging, Fault Insertion, ...

© 2007 - GOEPEL Electronics - www.goepel.com

BScan / Functional Test Intelligent Boundary Scan Solutions®

! Low cost, flexible, powerful

! Very good test coverage, diagnostics:
! Boundary Scan for structural test
! Functional Test for parametric and at-speed test
! BScan for simplified access in functional tests
! Integrated, highly automated test flow
! Combination through API's; off-the-shelf
or ad-hoc software

© 2007 - GOEPEL Electronics - www.goepel.com

Basics of IEEE 1149.4 Intelligent Boundary Scan Solutions®

Boundary Scan Cell Internal Analog Test Bus

AB
M
Core Logic
Control
(mixed signal) AB
M Re-
gisters
AB
M
BIST AB1 AB2
AT1
TBIC AT2 ATAP

TDI TAP controller

TDO
TCK Instruction Register and Decoder
TMS

© 2007 - GOEPEL Electronics - www.goepel.com

Basics of IEEE 1149.4 Intelligent Boundary Scan Solutions®

! Parametric Test for

! Passive components (resistors, capacitors, inductors, etc.)
and/or passive elements intrinsic to the interconnect
! Pull- or termination resistors
! Active components (diodes, transistors, sensors, etc.)
! Impedance networks

! Extended Interconnect Test

! Limited number of devices available
! Emerging tool support

© 2007 - GOEPEL Electronics - www.goepel.com

Basics of IEEE 1149.4 Intelligent Boundary Scan Solutions®

Second Internal First Internal

Test Bus Test Bus

BScan Chain
Core logic
Extension
Third Internal
section 1 Base section
Test Bus
bus-to- bus-to- bus-to- Logic
Extension bus bus bus value
section 2 switching switching switching selection

AT1
ATAP
AT2

Control Registers for Extensions 2 and Control Register

1 for
(2 bit each) Base section (4 bit)

© 2007 - GOEPEL Electronics - www.goepel.com

Basics of IEEE 1149.4 Intelligent Boundary Scan Solutions®

VH VTH AB1 AB2

C C
DQ
Device Core

C D -
DQ
+

IN or OUT pin

VL C
DQ ABUS2
VG ABUS1
C
DQ

© 2007 - GOEPEL Electronics - www.goepel.com

Basics of IEEE 1149.6 Intelligent Boundary Scan Solutions®

! Extending Interconnect Test to AC-coupled

networks
! Standard approved in 2003
! Devices are emerging
! Tool support is available

© 2007 - GOEPEL Electronics - www.goepel.com

Purpose of IEEE 1149.6 Intelligent Boundary Scan Solutions®

! Extending IEEE-Std. 1149.1 capabilities

by providing test methodology for
! Differential interconnections
! AC coupled networks

! Defines hardware structure and

two new instructions

© 2007 - GOEPEL Electronics - www.goepel.com

Principle of IEEE 1149.6 Intelligent Boundary Scan Solutions®

! Operates in parallel with 1149.1 and 1149.4

! Proposes a way of testing AC coupled net-
works by providing AC Test Signal on out-
put and recovering signal on inputs
! Access to test resources through IEEE-
1149.1 TAP

© 2007 - GOEPEL Electronics - www.goepel.com

Signal coupling Intelligent Boundary Scan Solutions®

DC coupled Interconnect AC coupled Interconnect

Core
Logic
+
- Core
Logic
+
-

DC coupled and AC
coupled
differential Interconnects
Shown above are just a few sample coupling schemes
Coupling capacities could also be implemented inside the IC

© 2007 - GOEPEL Electronics - www.goepel.com

1149.6 Main Features Intelligent Boundary Scan Solutions®

! A IEEE-1149.6 compliant device is also

1149.1 compliant
! New AC-Test instructions defined in 1149.6:
! EXTEST_PULSE (mandatory)
! EXTEST_TRAIN (mandatory)

! AC-pins receiving data have test receiver:

! Single ended AC-pin: one test receiver
! Differential channel: two test receiver

! AC outputs use mission driver

© 2007 - GOEPEL Electronics - www.goepel.com

Basics of IEEE 1532 Intelligent Boundary Scan Solutions®

! Standardized in-system programming (ISP)

method
! Formal extension to IEEE-1149.1b-1994
! Access to on-chip programming resources via
TAP
! Unified programming approach for devices from
different vendors
! Concurrent programming of multiple devices from
different vendors, reducing cost related to ISP
! Data and programming algorithm in separate files

© 2007 - GOEPEL Electronics - www.goepel.com

Basics of IEEE 1532 Intelligent Boundary Scan Solutions®

PLD Design
BSDL file Data file Environment
(1532) (1532)

IEEE1532 Programmer (SW)

BScan Controller

TCK
TMS

1532 1149.1 1532 1532 TDO

TDI
TDI TDO TDI TDO TDI TDO TDI TDO

© 2007 - GOEPEL Electronics - www.goepel.com

New standards / initiatives Intelligent Boundary Scan Solutions®

! IEEE P1581
! IEEE P1149.7 (cJTAG)
! SJTAG
! IEEE P1687 (IJTAG)
! other

© 2007 - GOEPEL Electronics - www.goepel.com

Basics of IEEE P1581 Intelligent Boundary Scan Solutions®

! To test connectivity to non-BScan devices

easily
! Solve test problems for devices such as
DDR-SDRAM, DDR2-SDRAM, FLASH, etc.
# 1149.1 not built in !
# Controllability, complexity
# Test time
# Test conditions
(use of untested resources to test the DUT)
! Simple, quasi-static interconnect test
(no need for at-speed access or initialization)
! Multiple P1581 devices in bus structure

© 2007 - GOEPEL Electronics - www.goepel.com

Basics of IEEE P1581 Intelligent Boundary Scan Solutions®

Device is a
“slave”

Test Control:
! Optional
Test Pin
Or
! Test Control
Circuitry
(various
proposals)

© 2007 - GOEPEL Electronics - www.goepel.com

P1581 test logic circuitry Intelligent Boundary Scan Solutions®

• XOR/XNOR, or Inverters/AND
• Only combinational, non-sequential logic
• Easy to implement, simple test vectors
• Faults on pins don't inhibit test of other pins
• Fault detection guaranteed
• Fault diagnostics depends on implementation,
test vectors
• Patented vs. public domain

© 2007 - GOEPEL Electronics - www.goepel.com

Basics of IEEE P1149.7 Intelligent Boundary Scan Solutions®

Boundary Scan
JTAG
Applications TAPs

1149.7 Bulk Data Transfer

Narrow (2) BDX Instrumentation Sources
or
Custom Data Transfer
Wide (4) Debug/Test
CDX BDM (Freescale)/ SWD (ARM)/other
Framework
Power down test logic
Power when not used

Test and Private

Test Interface Modes

% IEEE 1149.1 signaling used at start-up % SW directed mode switches between JTAG modes
and advanced modes. Software drivers always use
IEEE state sequences.
% SW directed mode switches between JTAG modes
and advanced modes % Framework for multiple debug and other technologies

© 2007 - GOEPEL Electronics - www.goepel.com

Basics of IEEE P1687 Intelligent Boundary Scan Solutions®

Focus on
! Documentation:
Documentation architectural descriptions
! Identify accessible embedded instruments,
! Specify characteristics of the instrument;
! Access protocols:
protocols procedure descriptions
! How to communicate with an instrument,
! Facilitate re-use through portability;
! “Enhanced”, secondary access/interface:
access/interface
! Access instruments not easily handled solely
by the TAP (i.e. use high bandwidth I/O)
! Simplify hierarchical test architectures
© 2007 - GOEPEL Electronics - www.goepel.com
Basics of IEEE P1687 Intelligent Boundary Scan Solutions®

© 2007 - GOEPEL Electronics - www.goepel.com

Basics of SJTAG Intelligent Boundary Scan Solutions®

Goal:
to standardize data contents and formats for
communication:
between external Test Manager platforms and
internal Embedded Test Controllers,
and
between Embedded Test Controllers and the
UUTs they serve
for all variants of XBST and EBST
XBST - external Boundary Scan Test
EBST - embedded Boundary Scan Test

© 2007 - GOEPEL Electronics - www.goepel.com

References Intelligent Boundary Scan Solutions®

Books:
!
Boundary Scan Handbook, 3rd Edition, Ken P. Parker,
Kluwer Academic Publishers, ISBN 1-4020-7496-4
! Analog and Mixed-Signal Boundary-Scan, Adam Osseiran,
Kluwer Academic Publishers, ISBN 0-7923-8686-8
! Digital Systems Testing and Testable Design, Miron Abramovici
et.al., IEEE Press, Wiley Interscience, ISBN 0-7803-1093-4

Websites:
! www.goepelusa.com
! www.freeDFT.info
! www.DFTdigest.com

Other publications:
! ITC Proceedings (papers on the topic; there are plenty ...)
! Testability Guidelines, SMTA TP-101C (2002), www.smta.org

© 2007 - GOEPEL Electronics - www.goepel.com

Intelligent Boundary Scan Solutions®

For further information, please:

Visit our website at www.goepelusa.com
Contact your local sales representative
Call us at 1-888-4GOEPEL
Email us at [email protected]

© 2007 - GOEPEL Electronics - www.goepel.com