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Navila Rahman Nadi

The SAP-2 instruction set has been expanded from the SAP-1 with a larger 64k RAM, 16-bit program counter, and 42 instructions. Key components include an 8-bit accumulator, ALU, flags, and additional registers like B, C, and TMP. Memory instructions allow loading from and storing to memory locations, while register instructions allow arithmetic operations and data movement between registers.

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MuhammadHaque
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64 views19 pages

Navila Rahman Nadi

The SAP-2 instruction set has been expanded from the SAP-1 with a larger 64k RAM, 16-bit program counter, and 42 instructions. Key components include an 8-bit accumulator, ALU, flags, and additional registers like B, C, and TMP. Memory instructions allow loading from and storing to memory locations, while register instructions allow arithmetic operations and data movement between registers.

Uploaded by

MuhammadHaque
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
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Download as PDF, TXT or read online on Scribd
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SAP-2

Navila Rahman Nadi


What is New?
• The SAP-2 adds a lot of functionality to the SAP-1
hardware, but the important additions are to the
instruction set.
• Data path is bigger, but operation remains the
same means the accumulator is 8 bit.
• The RAM is 64k now, so huge memory address
area of 65,536 bytes
• Control sequencer is much bigger as a result of all
the extra registers we added, but we won’t worry
about what’s inside.
Architecture
Input port
• Hexadecimal keyboard encoder -receives the
data from outer environment and converts it
into hexadecimal form.
• The system can understand and send them to
the input port 1.
• It has two input ports.( port 1 and 2)
Program Counter
• 16 bit address, thus can count from
PC= 0000 0000 0000 0000 (0000H)
to
PC= 1111 1111 1111 1111(FFFFH)
• Before each computer run, a low CLR signal
resets the PC so that the data processing
starts with the instruction stored in memory
location 0000H
Memory Address Register(MAR) and
MEMORY
• MAR Receives 16- bit address from PC.
• MAR’s output addresses the desired memory
location.
• Memory is 64K (1,024 × 64 = 65,536 bytes).
• With 2K ROM ( addresses of 0000H to 07FFH)
• 2K ROM(addresses from 0000H-07FFH)
• 62K RAM(addresses from 0800H-FFFFH)
Memory Data Register (MDR)
• 8-bit Register
• it stores the data or operand that is fetched
from the memory which is needed for
computation.
Instruction Register
• holds the complete format of the Instruction
that is to be executed.
• 8-bit op code for each instruction
• SAP 2 consists of total 42 instructions
Controller Sequencer
• It provides necessary timing signals like T0, T1,
T2, ….. and control signals providing the
direction for executing the program.
• Generates the control words
(microinstructions)
• Control Word is bigger (CON)
Accumulator
Same as SAP-1
• The result of all the mathematical operations
is stored in accumulator.
• It is one of the operand of ADD, OUT, SUB
instruction.
• It is also known as processor register.
ALU and Flags
• ALU :- Includes both arithmetic and logical
operation
• Flag: Represent the status of the arithmetic
and logical operation.
• Zero Flag(Z)= When the accumulator content
becomes zero.
• Sign Flag(S)= When the accumulator contents
become negative during the execution of the
instructions
TMP, B and C registers
• Temporary register (TMP).
• They are the second operand of the
mathematical operations.
• Register B and C are used to move data during
program run.
• The register B and C is accessible to the
programmer.
Output Ports
2 output ports(3 and 4)

Port 3 : Drives Hexadecimal display- processed


data.

Port 4: sends ACKNOWLEDGE signals used to


hexadecimal encoder.(Handshaking)
Memory Reference Instruction
• LDA ( Load the accumulator)
 LDA 2000H means to load the accumulator with the contents of memory location
of 2000H

• STA (Store the accumulator)


 STA 7FFFH means to store the accumulator contents at memory location of 7FFFH
If Acc=8AH then the execution of 7FFFH stores 8AH at address 7FFFh
 3 byte instruction

• MVI (Move Immediate)


 It tells the computer to load a designated register with the byte that immediate
follows the opcode.
 MVI A, 37H tells the computer to load the accumulator with 37H , After this
instruction has been executed the binary contents of the accumulator are:
Acc=0011 0111
 2 byte instruction
Opcodes
Register Instruction
• MOV
 The mnemonic for MOVE. It tells the computer
to move data from one register to another.
MOV A,B
 Tells the computer to move the data in the B
register to the accumulator.
 The operation is nondestructive, meaning that
the data in B register is copied but not erased.
 1 byte instruction
Register Instruction
• ADD and SUB
 ADD stands for add the data in the designated register to
the accumulator.
 ADD B means to add the contents of the B register to the
accumulator.
 If A= 04H and B=02H then the execution of ADD B results in
A=06H
 Similarly SUB means subtract the data in the designated
register from the accumulator.
 SUB C will subtract the contents of the C register from the
accumulator.
 1 byte instruction
Register Instruction
• INR and DCR
 INR means increment the contents of the register
 DCR means decrement the contents of the
register
If B=56H and C=8AH the execution of INR B results
in B= 57H
And the execution of a DCR C produces
C=89H
 1 byte instruction

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