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Applied Electronics

1. The document discusses digital logic circuits including theorems of Boolean algebra like duality theorem and DeMorgan's theorem. It also discusses half adders, full adders, encoders, decoders, multiplexers and demultiplexers. 2. Specific circuit examples covered include a 2-4 decoder, 4-2 encoder, half subtractor and applications of adders. Truth tables are given for various logic gates and circuits. 3. Methods to simplify Boolean expressions using theorems and implement logic functions using gates are demonstrated.
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0% found this document useful (0 votes)
78 views

Applied Electronics

1. The document discusses digital logic circuits including theorems of Boolean algebra like duality theorem and DeMorgan's theorem. It also discusses half adders, full adders, encoders, decoders, multiplexers and demultiplexers. 2. Specific circuit examples covered include a 2-4 decoder, 4-2 encoder, half subtractor and applications of adders. Truth tables are given for various logic gates and circuits. 3. Methods to simplify Boolean expressions using theorems and implement logic functions using gates are demonstrated.
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as PDF, TXT or read online on Scribd
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APPLIED

ELECTRONICS

ASSAM SCIENCE AND TECHNOLOGY UNIVERSITY


B.Tech : 4thSemester: Mechanical Engineering
Sub code : ECE181407
Module 04: DIGITAL OR LOGIC CIRCUITS

Theorems of Boolean Algebra


The following two theorems are used in
Boolean algebra.

 Duality theorem
 DeMorgan’s theorem
Duality Theorem
Group1 Group2

x+0=x x.1 = x

x+1=1 x.0 = 0

x+x=x x.x = x

x + x’ = 1 x.x’ = 0

x+y=y+x x.y = y.x

x + y+z = x+y + z x.y.z = x.y.z

x.y+z = x.y + x.z x + y.z = x+y . x+z


DeMorgan’s Theorem
 It states that the complement of logical OR of at least two
Boolean variables is equal to the logical AND of each
complemented variable.
 DeMorgan’s theorem with 2 Boolean variables x and y can
be represented as
 (x+y)’ = x’.y’

 The dual of the above Boolean function is


 (x.y)’ = x’ + y’

 Therefore, the complement of logical AND of two Boolean


variables is equal to the logical OR of each complemented
variable. Similarly, we can apply DeMorgan’s theorem for
more than 2 Boolean variables also
DeMorgan’s Theorem
Using the above laws, simplify the
following expression: (A + B)(A + C)
Q= (A + B).(A + C)

A.A + A.C + A.B + B.C – Distributive law

A + A.C + A.B + B.C – Idempotent AND law (A.A = A)

A(1 + C) + A.B + B.C – Distributive law

A.1 + A.B + B.C – Identity OR law (1 + C = 1)

A(1 + B) + B.C – Distributive law

A.1 + B.C – Identity OR law (1 + B = 1)

Q= A + (B.C) – Identity AND law (A.1 = A)


Construct a Truth
Table for the
logical functions at
points C, D and Q
Inputs Output at
in the following
A B C D Q circuit
0 0 1 0 0

0 1 1 1 1

1 0 1 1 1

1 1 0 0 1
Find the Boolean
algebra expression
for the following
system.

Inputs Intermediates Output

B A A.B A+B Q

0 0 0 1 1

0 1 0 0 0

1 0 0 0 0

1 1 1 0 1
Find output Y?
1.

2.
Find output Y?
3.

4.

This Boolean
function is
in Sum of
Products form.
Find output Y?
5.

6.

This Boolean function


is in Product of
Sums form
ADDER…
 An adder is a digital circuit that performs
addition of numbers.
 In many computers and other kinds of
processors adders are used in the
arithmetic logic units or ALU.
 They are also used in other parts of the
processor, where they are used to
calculate addresses, table indices,
increment and decrement operators and
similar operations.
 Binary Adders are of 2 types:
1. Half adder and 2. Full Adder

 Adders supporting multiple bits are:


1. Ripple-carry adder
2. Carry-lookahead adder
Half adder

 The half adder adds two single binary digits A


and B.
 It has two outputs, sum (S) and carry (C). The
carry signal represents an overflow into the
next digit of a multi-digit addition.
 The simplest half-adder design, incorporates an
XOR gate for S and an AND gate for C.
 The Boolean logic for the sum (in this case S)
will be A′B + AB′ whereas for the carry (C) will
be AB.
Half adder
 The truth table for the
half adder is:
 Sum (S)= A XOR B;
Carry (C) = A AND B

Inputs Outputs
A B C S
0 0 0 0
0 1 0 1
1 0 0 1
1 1 1 0
Full adder

 The full adder circuit has three inputs:


A, B and Cin, which add three input
numbers and generates a carry and sum.
Full adder
 The truth table for the
full adder is:
 S=A⊕B⊕Cin; Cout=AB+(A⊕B)Cin
Inputs Outputs
A B Cin Cout S
0 0 0 0 0
0 0 1 0 1
0 1 0 0 1
0 1 1 1 0
1 0 0 0 1
1 0 1 1 0
1 1 0 1 0
1 1 1 1 1
This adder is called as Full adder because for
implementing one Full adder, we require two
Half adders and one OR gate.
If Cin is zero, then Full adder becomes Half
adder. We can verify it easily from the above
circuit diagram or from the Boolean
functions of outputs of Full adder.
Applications:
 The binary bits addition can be done by half adder using ALU
within the computer because it uses adder.
 Half adder combination can be used for designing a full adder
circuit.
 Half adders are used in the calculators and to measure the
addresses as well as tables
 These circuits are used to handle different applications within
digital circuits.
 A FA circuit is used as an element in many large circuits such as
Ripple Carry Adder. This adder adds the number of bits
simultaneously.
 FAs are used in Arithmetic Logic Unit (ALU)
 FAs are used in graphics-related applications like GPU (Graphics
Processing Unit)
 These are used in the multiplication circuit to execute Carryout
Multiplication.
Half subtractor

 The half subtractor is a combinational


circuit which is used to perform
subtraction of two bits.
 It has two inputs, the minuend X and
subtrahend Y and two outputs the
difference D and borrow out Bout
Half subtractor

 The truth table for the half subtractor is:


 D=X⊕Y; Bout = X’.Y

Inputs Outputs
X Y D Bout
0 0 0 0
0 1 1 1
1 0 1 0
1 1 0 0
Encoders and Decoders
 In the digital domain, for ease of
transmission of data, the data is often
encrypted or placed within codes and then
this secured code is transmitted. At the
receiver, the coded data is decrypted or
gathered from the code and is processed to
be displayed or given to the load accordingly.
 This task of encrypting the data and
decrypting the data is done by Encoders and
Decoders.
Decoders
 Decoder is a combinational circuit that has
‘n’ input lines and maximum of 2n output
lines.
 One of these outputs will be active High
based on the combination of inputs present,
when the decoder is enabled. That means
decoder detects a particular code.
 The outputs of the decoder are nothing but
the min terms of ‘n’ input variables
Decoder : 2 to 4
Decoder

 Let 2 to 4 Decoder has two inputs A1 & A0


and four outputs Y3,Y2,Y1 & Y0. The block
diagram of 2 to 4 decoder is shown in the
following figure.
 One of these four outputs will be ‘1’ for each
combination of inputs when enable, E is ‘1’.
Decoder : 2 to 4 Decoder

Enable Inputs Outputs

E A A0 Y Y2 Y1 Y0
1 3

0 x x 0 0 0 0

1 0 0 0 0 0 1

1 0 1 0 0 1 0

1 1 0 0 1 0 0

1 1 1 1 0 0 0
Decoder : 2 to 4 Decoder
 From Truth table, we can write the Boolean
functions for each output as :
 Y3=E.A1.A0
 Y2=E.A1.A0′
 Y1=E.A1′.A0
 Y0=E.A1′.A0′
 Each output is having one product term. So,
there are four product terms in total. We can
implement these four product terms by using
four AND gates having three inputs each & two
inverters.
Decoder : 2 to 4 Decoder
The circuit diagram of 2 to 4 decoder is shown
in the following figure.

 3 to 8 decoder
 4 to 16 decoder
Encoder
 An Encoder is a combinational circuit that
performs the reverse operation of Decoder.
 It has maximum of 2n input lines and ‘n’
output lines. It will produce a binary code
equivalent to the input, which is active High.
 Therefore, the encoder encodes 2n input lines
with ‘n’ bits. It is optional to represent the
enable signal in encoders.
Encoder : 4 to 2 Encoder
 Let 4 to 2 Encoder has four inputs Y3,Y2,Y1 &
Y0 and two outputs A1 & A0. The block
diagram of 4 to 2 Encoder is shown in the
following figure.
 At any time, only one of these 4 inputs can
be ‘1’ in order to get the respective binary
code at the output.
Encoder : 4 to 2 Encoder
Inputs Outputs

Y3 Y2 Y1 Y0 A1 A0

0 0 0 1 0 0

0 0 1 0 0 1

0 1 0 0 1 0

1 0 0 0 1 1

From Truth table, we can write the Boolean functions for each
output as

A1=Y3+Y2
A0=Y3+Y1
Encoder : 4 to 2 Encoder
 We can implement the above two
Boolean functions by using two input OR
gates. The circuit diagram of 4 to 2
encoder is shown in the following figure.
Multiplexer and Demultiplexer
 In-network transmission, both the
multiplexer and demultiplexer are
combinational circuits.
 A multiplexer selects an input from several
inputs then it is transmitted in the form of a
single line. An alternative name of the
multiplexer is MUX or data selector.
 A demultiplexer uses one input signal and
generates many. So it is known as Demux or
data distributor.
Multiplexer

The multiplexer is a device that has multiple inputs and single line
output. The select lines determine which input is connected to the
output, and also increase the amount of data that can be sent over
a network within a certain time. It is also called a data selector.
Multiplexers are capable of handling both analog and digital
applications. In analog applications, multiplexers are made up of
relays and transistor switches, whereas in digital applications, the
multiplexers are built from standard logic gates. When the
multiplexer is used for digital applications, it is called a digital
multiplexer.
Multiplexer Types
Multiplexers are classified into four types:

 2-1 multiplexer ( 1select line)


 4-1 multiplexer (2 select lines)
 8-1 multiplexer(3 select lines)
 16-1 multiplexer (4 select lines)
4x1 Multiplexer

 4x1 Multiplexer has four data inputs I3, I2, I1 &


I0, two selection lines s1 & s0 and one output
Y. The block diagram of 4x1 Multiplexer is
shown.
 One of these 4 inputs will be connected to
the output based on the combination of
inputs present at these two selection lines.
4x1 Multiplexer
Selection Lines Output
S1 S0 Y
0 0 I0
0 1 I1
1 0 I2
1 1 I3

From Truth table, we can directly write the Boolean


function for output,Y as

Y=S1′S0′I0+S1′S0I1+S1S0′I2+S1S0I3
4x1 Multiplexer
 We can
implement this
Boolean
function using
Inverters, AND
gates & OR
gate. The circuit
diagram of 4x1
multiplexer is
shown in the
following figure.
Applications of Multiplexer
1. Communication System
2. Telephone Network
3. Computer Memory
4. Transmission from the Computer
System of a Satellite
Demultiplexer

 De-multiplexer is also a device with one input


and multiple output lines. It is used to send a
signal to one of the many devices. The main
difference between a multiplexer and a de-
multiplexer is that a multiplexer takes two or
more signals and encodes them on a wire,
whereas a de-multiplexer does reverse to what
the multiplexer does.
1x4 De-Multiplexer

 1x4 De-Multiplexer has one input I, two


selection lines, s1 & s0 and four outputs Y3,
Y2,Y1 &Y0. The block diagram of 1x4 De-
Multiplexer is shown in the following figure.
 The single input ‘I’ will be connected to one
of the four outputs,Y3 to Y0 based on the
values of selection lines s1 & s0
1x4 De-Multiplexer

Selection Inputs Outputs

S1 S0 Y3 Y2 Y1 Y0

0 0 0 0 0 I

0 1 0 0 I 0

1 0 0 I 0 0

1 1 I 0 0 0
1x4 De-Multiplexer
 From the above Truth table, we can
directly write the Boolean functions for
each output as

 Y3=s1s0I
 Y2=s1s0′I
 Y1=s1′s0I
 Y0=s1′s0′I
1x4 De-Multiplexer
 We can implement
these Boolean
functions using
Inverters & 3-input
AND gates. The
circuit diagram of
1x4 De-
Multiplexer is
shown in the
following figure.

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