Basic Architecture

ia32 – x86
Main Features
• CISC, “Backward Compatible”
• Extended 8008, 8080
• 32 bit wordsize
• Little Endian
• Unaligned Memory Access
• Instructions have one memory and one (r/imm)
Operating modes of ia32
• Real address mode
• Protected mode
• System management mode
History
• 8086 – first 16bit micropro.
• 80286 – more addressing modes(obsolete)
• i386 – 32 bit arch, flat addressing model
• i486 – added fpu
• Pentium – performance +++ isa =
• Pentium pro – p6 microarch. (conditional move)
• P2 – p6++
• P3 – sse for vectors
• P4 – sse 2 ( added float cap. In sse)
• P4e – hyperthreading + 64 bit ext
• Core 2 – b2 p6 + multicore
• Core i7 – hyperthreading + multicore
*Eight in
32-bit Architecture

Floating point formats,

Integers, BCD format

stores the lower and upper

SIMD; Operate on 64-bit
bounds associated with the
integer numbers
pointer to a memory buffer
SIMD; Operate on single
precision floating-point data

SIMD; Single and double

precision formats
-6
-1
- 10
Special Purpose Registers – Count
# SPRs ~ 80+
• 6 memory segment registers
• 8 control registers
• 8 debug registers
• 14 floating point registers
• 4 test registers
• 8 simd registers
Addressing modes in
intel x86
Registers - GPRs
The 8 GPRs are as follows:
1. Accumulator register (AX). Used in arithmetic operations. Opcodes
combining constants into accumulator are 1-byte.
2. Counter register (CX). Used in shift/rotate instructions and loops.
3. Data register (DX). Used in arithmetic operations and I/O operations.
4. Base register (BX). Used as a pointer to data (located in segment register
DS, when in segmented mode).
5. Stack Pointer register (SP). Pointer to the top of the stack.
6. Stack Base Pointer register (BP). Used to point to the base of the stack.
7. Source Index register (SI). Used as a pointer to a source in stream
operations.
8. Destination Index register (DI). Used as a pointer to a destination in stream
operations.
Registers (Segment)

The 6 Segment Registers are:

1. Stack Segment (SS). Pointer to the stack ('S' stands for 'Stack').
2. Code Segment (CS). Pointer to the code ('C' stands for 'Code').
3. Data Segment (DS). Pointer to the data ('D' stands for 'Data').
4. Extra Segment (ES). Pointer to extra data ('E' stands for 'Extra').
5. F Segment (FS). Pointer to more extra data ('F' comes after 'E').
6. G Segment (GS). Pointer to still more extra data ('G' comes after 'F').
Register mode

In this type of addressing mode both the operands are registers

Eg:

MOV AX, BX

XOR AX, DX

ADD AL, BL
Immediate mode

In this type of addressing mode the source operand is a 8 bit or 16 bit data.
Destination operand can never be immediate data.

Eg:

MOV AX, 2000

MOV CL, 0A

ADD AL, 45

AND AX, 0000

Displacement / direct mode

In this type of addressing mode the effective address is directly given in the
instruction as displacement.

Eg:

MOV AX, [DISP] -> (constant value)

MOV AX, [0500]

Register indirect mode

In this addressing mode the effective address is in SI, DI or BX.

Physical Address = Segment Address + Effective Address

Eg:

MOV AX, [DI]

ADD AL, [BX]

MOV AX, [SI]

Based indexed mode

In this the effective address is sum of base register and index register.
Base register: BX, BP
Index register: SI, DI
The physical memory address is calculated according to the base register.
Eg:
MOV AL, [BP+SI]
MOV AX, [BX+DI]
Indexed mode

In this type of addressing mode the effective address is sum of index

register and displacement.

Eg:

MOV AX, [SI+2000]

MOV AL, [DI+3000]

Based mode

In this the effective address is the sum of base register and displacement.

Eg:

MOV AL, [BP+ 0100]

Based indexed displacement mode

In this type of addressing mode the effective address is the sum of index
register, base register and displacement.

Eg:

MOV AL, [SI+BP+2000]

String mode

This addressing mode is related to string instructions. In this the value of SI

and DI are auto incremented and decremented depending upon the value of
directional flag.

Eg:

MOVS B -> Moves a byte from the source location to the destination
location

MOVS W -> Moves a word (2 bytes) from the source location to the
destination location.
Input/Output mode

This addressing mode is related with input output operations.

IN destination_register, port_number

OUT port_number, source_register

Eg:

IN AL, 45

OUT 50, AL
Relative mode

In this the effective address is calculated with reference to instruction

pointer.

JNZ destination

Eg:

JNZ(Jump if Not Zero) 8 bit address

IP=IP+8 bit address

Types of Instruction
• Data Movement Instructions
• Arithmetic/Logic Instructions
• Control Flow Instructions

Source: https://www.cs.virginia.edu/~evans/cs216/guides/x86.html
eax – program
Data Movement Instructions: counter

• Move : mov (right to left) • Push : push

• Syntax • Explanation: decrement the stack
mov <reg>,<reg> pointer and pushes the operand into the
mov <reg>,<mem> stack
mov <mem>,<reg> • Syntax
mov <reg>,<const> push <reg32>
mov <mem>,<const> push <mem>
• Examples push <con32>
mov eax, ebx — copy the value in ebx • Examples
into eax push eax — push eax on the stack
• Limitation push [var] — push the 4 bytes at
Direct memory to memory movement address var onto the stack
is not possible
Data Movement Instructions:
• Pop : pop • Load eff. add :
• Explanation: first copies 4 byte data • Explanation: places the add specified by
from top of stack to specified register the 2nd operand into the reg. specified
and then increments the SP. by 1st operand
• Syntax • Syntax
pop <reg32> lea <reg32>,<mem>
pop <mem> • Examples
• Examples lea eax, [val] — the value val is placed in
pop edi — pop the top element of the EAX
stack into EDI.
pop [ebx] — pop the top element of the
stack into memory at the four bytes
starting at location EBX.
Arithmetic and Logic Instruction
• Integer addition : add : add eax, 10 --- EAX ← EAX + 10
• Integer Subtraction: sub : sub al, ah --- al  al –ah
• Increment: inc (increments the content of its operand by one)
• Decrement: dec (opposite of inc)
• Integer Multiplication: imul : 2-types:
a) Two operand format: both multiplied and result in 1st
operand
• imul eax, [var]
b) Three operand format: last 2 multiplies and result in
1st op
• imul esi, edi, 25 — ESI → EDI * 2
• Integer Divison: idiv :
Arithmetic and Logical instructions
• and <reg>,<reg> • Bitwise Logical Not
and <reg>,<mem> • not <reg>
and <mem>,<reg> not <mem>
and <reg>,<con>
and <mem>,<con> • Negate: neg : 2’s complement
• neg <reg>
neg <mem>
• or <reg>,<reg>
or <reg>,<mem> • Shift Left: shl ; Shift Right: shr
or <mem>,<reg> • shl <reg>,<con8>
or <reg>,<con> shl <mem>,<con8>
or <mem>,<con> shl <reg>,<cl>
shl <mem>,<cl>
• xor <reg>,<reg> • shr <reg>,<con8>
xor <reg>,<mem> shr <mem>,<con8>
xor <mem>,<reg> shr <reg>,<cl>
xor <reg>,<con> shr <mem>,<cl>
xor <mem>,<con>
Control Flow Instructions
• Unconditional Jump: jmp : jmp begin — Jump to the instruction labeled begin.
• Conditional Jump: jcondition:
• je <label> (jump when equal)
jne <label> (jump when not equal)
jz <label> (jump when last result was zero)
jg <label> (jump when greater than)
jge <label> (jump when greater than or equal to)
jl <label> (jump when less than)
jle <label> (jump when less than or equal to)
• Compare: cmp
• cmp <reg>,<reg> cmp <reg>,<con>
cmp <reg>,<mem> cmp <mem>,<reg>
• cmp DWORD PTR [var], 10
jeq loop : If the 4 bytes stored at location var are equal to the 4-byte integer constant 10,
jump to the location labeled loop.
Control Flow Instructions
• Subroutine Call and return
• call <label> : stores the current instruction counter value in stack then
unconditional jump
• ret: pops the the location value from the stack then unconditional jump
Floating Point Instructions- (Data Movement)
Solaris Mnemonic Intel/AMD Mnemonic Description
fbld FBLD load BCD
fbstp FBSTP store BCD and pop
fcmovb FCMOVB floating-point conditional
move if below
fcmovbe FCMOVBE floating-point conditional
move if below or equal
fcmove FCMOVE floating-point conditional
move if equal
fcmovnbe FCMOVNBE floating-point conditional
move if not below or
equal
Floating Point Instructions-(Arithmetic)
Table 3-14 Basic Arithmetic Instructions (Floating-Point)

Solaris Mnemonic Intel/AMD Mnemonic Description

fabs FABS absolute value

fadd FADD add floating-point

faddp FADDP add floating-point and

pop
Floating Point Instructions-(Arithmetic)
Solaris Mnemonic Intel/AMD Mnemonic Description

fdiv FDIV divide floating-point

fdivp FDIVP divide floating-point
and pop

fdivr FDIVR divide floating-point

reverse

fdivrp FDIVRP divide floating-point

reverse and pop
Caller – Callee convention
(cdecl For C programming language)
Types of calls:
• Caller clean-up
• Callee clean-up
• thiscall
• stdcall
• fastcall
…..(many more)