CSE231 - Lecture 5
CSE231 - Lecture 5
Logic Circuits • Use parity generators and checkers to detect bit errors
in digital systems
Half
Adder
Logic
Symbol
Half
Adder
Logic
Diagram
Full
Adder
Logic
Symbol
Full
Adder
Logic
Diagram
A voting system
using full adders
and binary adders
Half Full
Subtractor Subtractor
In order to decode
all possible
combinations of
four bits, sixteen
decoding gates are
required (24 = 16).
For any given code
on the inputs, one
of the sixteen
outputs is
activated. A list of
the sixteen binary
codes and their
corresponding
decoding functions
is given in Table.
Can be implemented by
OR gates
The Gray code is unweighted and is not an arithmetic code; that is, there are no
specific weights assigned to the bit positions. The important feature of the Gray code is
that it exhibits only a single bit change from one code word to the next in sequence.
A multiplexer (MUX) is a device that allows digital information from several sources to
be routed onto a single line for transmission over that line to a common destination.
Latches,
Flip-Flops
and Timers
CSE231 Lecture 5 Page 33/33