MICROPROCESSORS

Addressing Modes

Some slides adapted from slides by Prof. Levent Eren

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Outline

• Machine language
• Instruction components and format
• Data-addressing modes
• Program memory-addressing modes
• Stack memory-addressing modes
• Sampling of addressing modes
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Machine Language
• Machine language is the native binary code that the
microprocessor understands and uses as the instructions
that control its operation
• Interpretation of machine’s language allows debugging or
modification at the machine language level
• Microprocessor requires an assembler program, which
generates machine code
• the machine language instructions are too complex to generate by
hand
• Machine language instructions for the 8086-80486, vary in
length from 1 to as many as 13 bytes
• there are over 20000 variations of machine language instructions
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Machine Language (cont.)

• 16 -bit instruction mode
• if the machine operates in the real mode the instructions for Intel
family of microprocessors are 16 -bit instructions
• this means that instructions use 16-bit offset address and 16-bit
registers
• In the protected mode the D bit in the descriptor (within a
look-up table of descriptors) indicates how the
80386/80486 instructions access register and memory
data in protected mode
• D = 0, the 80386/80486 assumes 16 bit instructions
• D = 1, the 80386/80486 assumes 32 bit instructions
• the 32-bit instruction mode assumes all offset addresses are 32 bits as
well as all registers
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Instruction Components and Format

Data
Opcode Mode Displacement
Immediate value

Instruction Components
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Data-Addressing Modes
• Register - transfers a copy of a byte, word, doubleword, or
quadword from the source register to the destination register
MOV BX, CX (64-bit) MOV RDX, RCX

• Immediate - transfers an immediate byte , word, doubleword,

or quadword of data into the destination register or memory
location
MOV AX, 3456h (32-bit) MOV EBX, 12345678H

• Direct - moves a byte, word, doubleword, or quadword

between a memory location and a register
MOV AX, [1234h] (1234h is treated as a displacement within
data segment) copies the word-sized contents
MOV ESI, [1234h] copies the doubleword-sized contents
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Data-Addressing Modes(cont.)

• Register Indirect transfers a byte, word or doubleword of data

between a register and the memory location addressed by an
index (DI or SI) or base register (BP or BX)
MOV AX, [BX]
(80386 and above ) MOV AL, [ECX] (any register)

• Base-Plus-Index transfers a byte, word or doubleword of data

between a register and the memory location addressed by a
base register (BP or BX) plus index (DI or SI) register
MOV DX, [BX + DI]
(80386 and above ) MOV [EAX+ECX ], CL (any two registers)
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Data-Addressing Modes(cont.)

Register Relative - transfers a byte or word of data between a

register and the memory location addressed by an index (DI or
SI) or base register (BP or BX) plus displacement
MOV AX, [BX + 4] MOV AX, ARRAY[BX]
MOV AX, [ECX+4 ] MOV AX, ARRAY[EBX]
(80386 and above use any 32-bit register except ESP to address memory)
• Base Relative-Plus-Index transfers a byte or word of data
between a register and the memory location addressed by a
base register (BP or BX) and an index register (DI or SI) plus
displacement
MOV AX, [BX + DI + 4] MOV AX, ARRAY[BX + DI]
(80386 and above) MOV EAX, ARRAY[EBX+ECX]
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Data-Addressing Modes(cont.)

• Scaled-index (80386 and above) The second register of a

pair of registers is modified by the scale factor of 2*,4*, 8*
to generate the operand memory address
MOV EDX, [EAX+4*EBX]
MOV AL, [EBX+ECX] same as MOV AL, [EBX+1*ECX]

• RIP relative (64-bit extensions) allows access to any

location in the memory system by adding a 32-bit
displacement to the 64-bit contents of the 64-bit instruction
pointer
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Examples of Register-Addressed Instructions

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Examples of Immediate Addressing

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Direct-Data Addressing
• There are two basic forms of direct data addressing:
• (1) direct addressing, which applies to a MOV between a memory
location and AL, AX, or EAX, and
• (2) displacement addressing, which applies to almost any
instruction in the instruction set
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Direct Addressed Instructions

using EAX, AX, and AL and RAX
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Examples of Direct Data Addressing

using a Displacement
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Register Indirect Addressing

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Examples of Register Indirect Addressing

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Base-Plus-Index Addressing
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Base-Plus-Index Addressing
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Examples of Base-plus-index Addressing

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Register Relative Addressing

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Examples of Register Relative Addressing

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Base Relative-Plus-Index Addressing

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Base Relative-Plus-Index Addressing

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Examples of Base Relative-plus-index instructions

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Examples of Scaled-Index Addressing

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Program Memory-Addressing Modes

• Program memory-addressing modes, used with the JMP (jump)
and CALL instructions, consist of three distinct forms: direct,
relative, and indirect.
• The instructions for direct program memory addressing store
the address with the opcode.

• Relative program memory addressing is relative to the

instruction pointer (IP). Relative JMP and CALL instructions
contain either an 8-bit , 16-bit or 32-bit signed displacement
that allows a forward memory reference or a reverse memory
reference.
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Indirect Program Memory Addressing

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Stack Memory-Addressing Modes

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Push & Pop

Examples
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Instruction Components

Instructions have four components that specify the

operation to execute, and how to treat the associated
data.
DW

MOD REG R/M

OPCODE
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Instruction Components
OPCODE

• Opcode (one or two bytes) selects the operation (e.g.,

addition, subtraction, move) performed by the
microprocessor
D - direction of the data flow
D W D = 0 data flow to R/M field from register field
D = 1 data flow to the register field from R/M in
the next byte of the instruction
OPCODE
W - data size
W = 0 data size is a byte
W = 1 data size is a word/double word
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Instruction Components
MOD
• MOD field specifies the addressing mode for the selected
instruction and whether the displacement is present with
the specified addressing mode

MOD FUNCTION

00 no displacement
01 8-bit sign-extended displacement
MOD REG R/M
10 16-bit displacement
11 R/M is a register (register addressing
mode)
• If the MOD filed contains a 00, 01, or 10, the R/M field
selects one of the data memory-addressing modes, e.g.,
• MOV AL, [DI] (no displacement)
• MOV AL, [DI + 2] (8-bit displacement)
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Instruction Components
REG & R/M in Register Assignment

Register assignment for the REG and R/M fields

Code W = 0 (Byte) W = 1(Word) W =1 (Double Word)

000 AL AX EAX
001 CL CX ECX
010 DL DX EDX
011 BL BX EBX
100 AH SP ESP
101 CH BP EBP
110 DH SI ESI
111 BH DI EDI
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Register Assignment
Example
• Consider 2 byte instruction 8BECh in the machine
language program (assuming 16-bit instruction mode)

binary representation: 1000 1011 1110 1100, from this we

have
opcode: 100010 => MOV
D=W 1 => a word moves into the register
specified in the REG field
MOD 11 => R/M field also indicates register
REG 101 => indicates register BP
R/M 100 => indicates register SP

consequently the instruction is: MOV BP, SP

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Use of R/M Filed in Determining

Addressing Mode
• If the MOD field contains a 00, 01, or 10, the R/M field
takes on a new meaning
• Examples: Code Function
1. if MOD = 00 and R/M = 101
000 DS:[BX+SI]
the addressing mode is [DI] 001 DS:[BX+DI]
Base plus
Index
2. if MOD = 01 or 10 and R/M = 101 010 SS:[BP+SI]
011 SS:[BP+DI]
the addressing mode is 100 DS:[SI]
[DI + 33h] or LIST[DI + 22H], 101 DS:[DI] Register
110 SS:[BP] indirect
where 33h, LIST, 22h are arbitrary values
111 DS:[BX]
for displacement
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Example
• Consider machine language instruction 8A15h

binary representation is: 1000 1010 0001 0101

opcode: 100010 => MOV
D 1 => a word moves into the register
specified in the REG field
W 0 => byte
MOD 00 => no displacement
REG 010 => indicates register DL
R/M 101 => indicates addressing mode [DI]

the instruction is: MOV DL, [DI]

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Direct Addressing Mode

• Direct Addressing mode (for 16-bit instructions) occurs
whenever memory data are referenced by only the
displacement mode of addressing, e.g.,
MOV [1000h], DL moves the contents of DL into data
segment memory location 1000h
MOV NUMB, DL moves the contents of DL into
symbolic data segment memory location NUMB

OPCODE D W MOD REG R/M MOV [1000h], DL

1 0 0 0 1 0 0 0 0 0 0 1 0 1 1 0
Whenever the instruction has
Byte 1 Byte 2 only a displacement:
Displacement-low Displacement-high

0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 MOD is always 00
R/M is always 110
Byte 3 Byte 4
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Immediate Instruction
• Consider an instruction: MOV word PTR[BX + 1000h],
1234h
Moves 1234h into the word-sized memory
location addressed by the sum of
OPCODE W MOD R/M 1000h, BX, and DS x 10h
1 1 0 0 0 1 1 1 1 0 0 0 0 1 1 1
WORD PTR directive indicates to the
Byte 1 Byte 2 assembler that the instruction uses a word-sized
Displacement-low Displacement-high memory pointer
0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0
(if the instruction moves a byte of immediate data,
then BYTE PTR directive is used.
Byte 3 Byte 4
The above directive are only needed when it is not
Data-low Data-high
clear if the operation is a byte or a word, e.g.,
0 0 1 1 0 1 0 0 0 0 0 1 0 0 1 0 MOV [BX], AL clear a byte move
MOV [BX], 1 not clear, can be byte-, word, or
Byte 5 Byte 6 double word-sized move
should be for instance
MOV BYTE PTR [BX], 1
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Segment MOV Instructions

• The contents of a segment register are moved by MOV,
PUSH, POP
• Segment registers are selected by appropriate setting of
register bits (REG field)
Code Segment Register Example: MOV BX, CS

000 ES OPCODE MOD REG R/M

001 CS 1 0 0 0 1 1 0 0 1 1 0 0 1 0 1 1
010 SS
011 DS
100 FS REG is 001 => selects CS
101 GS R/M is 011 => selects BX

Note: MOV CS, ?? and POP CS Note that the opcode for this instruction is
are not allowed different for the prior MOV instructions
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Sampling of Addressing Modes

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Sampling of Addressing Modes

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Sampling of Addressing Modes