Last Time Notes for 8086
Last Time Notes for 8086
8086 microprocessor
Intel 8086
Definition of Microprocessor:
Microprocessor is an integrated circuit that contains all the functions of a central
processing unit of a computer.
Microprocessor is a multipurpose, programmable device that accepts digital
data as input, processes it according to instructions stored in its memory, and
provides results as output.
Examples of Microprocessors include Intel 4004, 8085, 8086, Pentium IV, Dual Core,
Core 2 Duo, i3, i5, i7 etc.
The BIU:
o Instruction Queue: When EU executes instructions, the BIU gets 6-bytes of the
next instruction and stores them in the instruction queue and this process is known
as instruction pre fetch. This process increases the speed of the processor.
o Segment Registers
o Instruction Pointer
o The execution unit of the 8086 tells the BIU where to fetch instructions or data
from, decodes instructions, and executes instructions.
o The EU contains control circuitry, which directs internal operations.
o A decoder in the EU translates instructions fetched from memory into a series of
actions, which the EU carries out.
o The EU has a 16-bit arithmetic logic unit (ALU) which can add, subtract, AND, OR,
XOR, increment, decrement, complement or shift binary numbers.
o The main functions of EU are:
a. Decoding of Instructions
b. Execution of instructions
Steps
EU extracts instructions from top of queue in BIU
Decode the instructions
Generates operands if necessary
Passes operands to BIU & requests it to perform read or write bus cycles
to memory or I/O
Perform the operation specified by the instruction on operands
o The BIU and EU operate in parallel independently. This makes processing faster.
o General purpose registers, stack pointer, base pointer and index registers, ALU, flag
registers (FLAGS), instruction decoder and timing and control unit constitute
execution unit (EU).
Register organization:
8086 has a powerful set of registers known as general purpose registers and
special purpose registers.
All of them are 16-bit registers.
Segment Registers
A segment register contains the addresses of instructions and data in memory
which are used by the processor to access memory locations. It points to the
starting address of a memory segment currently being used.
There are 4 segment registers. They are:
o Code Segment Register(CS): Code segment of the memory holds
instruction codes of a program.
o Data Segment Register(DS): The data, variables and constants given
in the program are held in the data segment of the memory.
o Extra Segment Register(ES): Extra segment holds the destination
addresses of some data of certain string instructions.
o Stack Segment Register(SS): Stack segment holds addresses and
data of subroutines. It also holds the contents of registers and
memory locations given in PUSH instruction.
While addressing any location in the memory bank, the physical address is
calculated from two parts:
Physical address= segment address + offset address
The first is segment address, the segment registers contain 16-bit segment
base addresses, related to different segment.
The second part is the offset value in that segment.
o SF- Sign Flag: This flag is set, when the result of any computation is
negative. For signed computations the sign flag equals the MSB of
the result.
o ZF- Zero Flag: This flag is set, if the result of the computation or
comparison performed by the previous instruction is zero.
o PF- Parity Flag: This flag is set to 1, if the lower byte of the result
contains even number of 1’s.
o CF- Carry Flag: This flag is set, when there is a carry out of MSB in
case of addition or a borrow in case of subtraction.
o AF-Auxilary Carry Flag: When an operation is performed at ALU, it
results in a carry/barrow from lower nibble (i.e. D0 – D3) to upper
nibble (i.e. D4 – D7), then this flag is set, i.e. carry given by D3 bit to
D4 is AF flag. The processor uses this flag to perform binary to BCD
conversion.
o OF- Over flow Flag: This flag is set, if an overflow occurs, i.e, if the
result of a signed operation is large enough to accommodate in a
destination register. The result is of more than 7-bits in size in case of
8-bit signed operation and more than 15-bits in size in case of 16-bit
sign operations, and then the overflow will be set.
o TF- Trap Flag: If this flag is set, the processor enters the single step
execution mode. The processor executes the current instruction and
the control is transferred to the Trap interrupt service routine.
o IF- Interrupt Flag: If this flag is set, the mask able interrupts are
recognized by the CPU, otherwise they are ignored.
o D- Direction Flag: This is used by string manipulation instructions. If
this flag bit is ‘0’, the string is processed beginning from the lowest
address to the highest address, i.e., auto incrementing mode.
Otherwise, the string is processed from the highest address towards
the lowest address, i.e., auto decrementing mode.
The 8086 microprocessors have 8 addressing modes. Two addressing modes have been
provided for instructions which operate on register or immediate data.
Register Addressing: In register addressing, the operand is placed in one of the 16-bit
or 8-bit general purpose registers. In this type of addressing mode both the operands are
registers.
Example
o MOV AX, CX
o ADD AL, BL
o ADD CX, DX
Example
The remaining 6 addressing modes specify the location of an operand which is placed in
a memory.
Direct Addressing: In direct addressing mode, the operand’s offset (effective address) is
directly given in the instruction as an 8-bit or 16-bit displacement element.
Example
o ADD AL, [0301]
The instruction adds the content of the offset address 0301 to AL. the operand is placed
at the given offset (0301) within the data segment DS.
Register Indirect Addressing: In this addressing mode the effective address is in SI, DI
or BX.
Example
MOV AX, [BX]: It moves the contents of memory locations addressed by the register BX
to the register AX.
Other examples:
Based Addressing: In this the effective address is sum of base register and index
register. BX is used as base register for data segment, and the BP is used as a base
register for stack segment.
Example
Indexed Addressing: The offset of an operand is the sum of the content of an index
register SI or DI and an 8-bit or 16-bit displacement.
Example
Based Indexed Addressing: The offset of operand is the sum of the content of a base
register BX or BP and an index register SI or DI.
Here, BX is used for a base register for data segment, and BP is used as a base register for
stack segment.
Example
Based Indexed with Displacement: In this mode of addressing, the operand's offset is
given by:
Effective Address (Offset) = [BX or BP] + [SI or DI] + 8-bit or 16-bit displacement
Example
Instruction Description
MOV Moves data from register to register, register to memory, memory to register,
memory to accumulator, accumulator to memory, etc.
For ex:
PUSH Pushes (sends, writes or moves) the content of a specified register or memory
location(s) onto the top of the stack.
POP Pops (reads) two bytes from the top of the stack and keeps them in a specified
register, or memory location(s).
Arithmetic Instructions
Instructions of this group perform addition, subtraction, multiplication, division,
increment, decrement, comparison, ASCII and decimal adjustment etc.
Instruction Description
a. ADD r2, r1: The data in the two registers are added and output is stored
in register 2.
b. ADD r, data: The immediate data in the operand is added with the data
present in the register and the result is stored in that particular register.
a. SUB r2,r1 : The data of the register 1 is subtracted from register 2 and
the result is stored in register 2.
b. SUB mem, data: The immediate data in the operand is subtracted from
the data in the memory and memory stores the result of the operation.
a. INC r/mem: The data of the register or memory specified in the operand
is incremented by 1.
Logical Instructions
Instruction of this group perform logical AND, OR, XOR, NOT and TEST operations. The
following instructions come under this category:
Instruction Description
AND Performs bit by bit logical AND operation of two operands and places the result
in the specified destination.
a. AND r2,r1: AND operation over each bit of two registers is performed
and register 2 stores the result.
OR Performs bit by bit logical OR operation of two operands and places the result
in the specified destination.
a. OR mem, r1: The data in register 1 is logically ORed with the data in
memory and the result is stored in that memory location.
XOR Performs bit by bit logical XOR operation of two operands and places the result
in the specified destination.
Rotate Instructions
The following instructions come under this category:
Instruction Description
RCL Rotate all bits of the operand left by specified number of bits through carry
flag.
a. RCL r/mem: The data byte of register or memory is rotated left the LSB
is loaded with CF and CF is loaded with MSB.
RCR Rotate all bits of the operand right by specified number of bits through carry
flag.
a. RCR r/mem: The data byte in register or memory is rotated right, the CF
is transferred to MSB and LSB is transferred to CF.
Shift Instructions
The following instructions come under this category:
Instruction Description
SHL Shifts each bit of operand left by specified number of bits and put zero in LSB
position.
a. SHL r/mem: The data byte of register or memory given in the operand
is shifted to the left. The MSB of the data shifts to carry flag and LSB
becomes 0.
SHR Shift each bit of operand right by specified number of bits and put zero in MSB
position.
a. SHR r/mem: The data byte is shifted to the right. So, now LSB shifts to
carry flag and MSB becomes 0.
Instruction Description
JMP r/mem
CALL This instruction transfers the control to the effective address within the
segment stored in the register or memory location specified in the
operand.
CALL r/mem
RET
CLC Clear Carry Flag: This instruction resets the carry flag CF to 0.
CLI Clear Interrupt Flag: This instruction resets the interrupt flag IF to 0.
String Instructions
String is series of bytes or series of words stored in sequential memory locations. The
8086 provides some instructions which handle string operations such as string movement,
comparison, scan, load and store.
Instruction Description
MOVS Moves 8-bit or 16-bit data from the memory location(s) addressed by
SI register to the memory location addressed by DI register.