0% found this document useful (0 votes)
18 views

Last Time Notes for 8086

Uploaded by

2024sl70006
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as PDF, TXT or read online on Scribd
0% found this document useful (0 votes)
18 views

Last Time Notes for 8086

Uploaded by

2024sl70006
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as PDF, TXT or read online on Scribd
You are on page 1/ 17

UNIT VI

8086 microprocessor

Intel 8086
Definition of Microprocessor:
 Microprocessor is an integrated circuit that contains all the functions of a central
processing unit of a computer.
 Microprocessor is a multipurpose, programmable device that accepts digital
data as input, processes it according to instructions stored in its memory, and
provides results as output.

 A microprocessor may also be called a processor or central processing unit, but it


is actually more advanced in terms of architectural design and is built over a silicon
microchip.

 A microprocessor is a multipurpose, programmable, clock-driven, register-based


electronic device that reads binary instructions from a storage device called
memory accepts binary data as input and processes data according to instructions,
and provides result as output.

Examples of Microprocessors include Intel 4004, 8085, 8086, Pentium IV, Dual Core,
Core 2 Duo, i3, i5, i7 etc.

Features of 8086 microprocessor


o Intel 8086 microprocessor is the enhanced version of Intel 8085 microprocessor. It was
designed by Intel in 1976.
o The 8086 microprocessor is a16-bit, N-channel, HMOS microprocessor. Where the HMOS
is used for "High-speed Metal Oxide Semiconductor".
o Intel 8086 is built on a single semiconductor chip and packaged in a 40-pin IC package.
The type of package is DIP (Dual Inline Package).
o It is 16-bit microprocessor
o It has a 16-bit data bus, so it can read data from or write data to memory and ports either
16-bit or 8-bit at a time.
o It has 20 bit address bus and can access up to 220 memory locations (1 MB).
o It can support up to 64K I/O ports
o It provides 14, 16-bit registers
o It has multiplexed address and data bus AD0-AD15 & A16-A19
o Prefetches up to 6 instruction bytes from memory and queues them in order to speed up
the processing.
o 8086 supports 2 modes of operation a. Minimum mode b. Maximum mode
o It consists of a powerful instruction set, which provides operation like division and
multiplication very quickly.

Functional units of 8086


8086 contains two independent functional units: a Bus Interface Unit (BIU) and
an Execution Unit (EU).
Fig: Block Diagram of Intel 8086 Microprocessor (8086 Architecture)

Bus Interface Unit (BIU)


The segment registers, instruction pointer and 6-byte instruction queue are associated
with the bus interface unit (BIU).

The BIU:

o Handles transfer of data and addresses,


o Fetches instruction codes, stores fetched instruction codes in first-in-first-out
register set called a queue,
o Reads data from memory and I/O devices,
o Writes data to memory and I/O devices,
o It relocates addresses of operands since it gets un-relocated operand addresses
from EU. The EU tells the BIU from where to fetch instructions or where to read
data.

It has the following functional parts:

o Instruction Queue: When EU executes instructions, the BIU gets 6-bytes of the
next instruction and stores them in the instruction queue and this process is known
as instruction pre fetch. This process increases the speed of the processor.
o Segment Registers
o Instruction Pointer

Execution Unit (EU)

o The execution unit of the 8086 tells the BIU where to fetch instructions or data
from, decodes instructions, and executes instructions.
o The EU contains control circuitry, which directs internal operations.
o A decoder in the EU translates instructions fetched from memory into a series of
actions, which the EU carries out.
o The EU has a 16-bit arithmetic logic unit (ALU) which can add, subtract, AND, OR,
XOR, increment, decrement, complement or shift binary numbers.
o The main functions of EU are:

a. Decoding of Instructions
b. Execution of instructions
Steps
 EU extracts instructions from top of queue in BIU
 Decode the instructions
 Generates operands if necessary
 Passes operands to BIU & requests it to perform read or write bus cycles
to memory or I/O
 Perform the operation specified by the instruction on operands

o The BIU and EU operate in parallel independently. This makes processing faster.
o General purpose registers, stack pointer, base pointer and index registers, ALU, flag
registers (FLAGS), instruction decoder and timing and control unit constitute
execution unit (EU).

Register organization:

 8086 has a powerful set of registers known as general purpose registers and
special purpose registers.
 All of them are 16-bit registers.

 General purpose registers:


o These registers can be used as either 8-bit registers or 16-bit registers.
o They may be either used for holding data, variables and intermediate
results temporarily or for other purposes like a counter or for storing
offset address for some particular addressing modes etc.

 Special purpose registers:


o These registers are used as segment registers, pointers, index
registers or as offset storage registers for particular addressing
modes.

 The 8086 registers are classified into the following types:


o General Data Registers
o Segment Registers
o Pointers and Index Registers
o Flag Register

General Data Registers:


 AX register − This is the 16 bit accumulator. It is of 16 bits and is divided into
two 8-bit registers AH and AL to also perform 8-bit instructions. The lower 8-bit
is designated as AL and higher 8-bit is designated as AH. It is generally used for
arithmetical and logical instructions. Example:
ADD AX, AX (AX = AX + AX)
It is also known as accumulator register. It is used to store operands for
arithmetic operations.
 BX register − This is the base register. It is of 16 bits and is divided into two 8-
bit registers BH and BL to also perform 8-bit instructions. It is used to store the
value of the offset. Example:
MOV BL, [500] (BL = 500H)
It is used as a base register. It is used to store the starting base address of the
memory area within the data segment.
 CX register − This is the counter register. It is of 16 bits and is divided into two
8-bit registers CH and CL to also perform 8-bit instructions. It is used in looping
and rotation. Example:
MOV CX, 0005
LOOP
It is referred to as counter. It is used in loop instruction to store the loop
counter.
 DX register − This is the data register. It is of 16 bits and is divided into two 8-
bit registers DH and DL to also perform 8-bit instructions. It is used in the
multiplication and input/output port addressing. Example:
MUL BX (DX, AX = AX * BX)
This register is used to hold I/O port address for I/O instruction.

Segment Registers
A segment register contains the addresses of instructions and data in memory
which are used by the processor to access memory locations. It points to the
starting address of a memory segment currently being used.
 There are 4 segment registers. They are:
o Code Segment Register(CS): Code segment of the memory holds
instruction codes of a program.
o Data Segment Register(DS): The data, variables and constants given
in the program are held in the data segment of the memory.
o Extra Segment Register(ES): Extra segment holds the destination
addresses of some data of certain string instructions.
o Stack Segment Register(SS): Stack segment holds addresses and
data of subroutines. It also holds the contents of registers and
memory locations given in PUSH instruction.
 While addressing any location in the memory bank, the physical address is
calculated from two parts:
Physical address= segment address + offset address
The first is segment address, the segment registers contain 16-bit segment
base addresses, related to different segment.
The second part is the offset value in that segment.

Pointers and Index Registers:


 The index and pointer registers are given below:
o Instruction Pointer (IP): The instruction pointer in the 8086
microprocessor acts as a program counter. It indicates to the address
of the next instruction to be executed.
o Stack Pointer (SP): This is the stack pointer. It is of 16 bits. It points
to the topmost item of the stack. If the stack is empty the stack
pointer will be (FFFE)H. Its offset address is relative to the stack
segment.
o Base Pointer (BP): This is the base pointer. It is of 16 bits. It is
primarily used in accessing parameters passed by the stack. Its offset
address is relative to the stack segment.
o Source Index (SI): This is the source index register. It is of 16 bits. It
is used in the pointer addressing of data and as a source in some
string-related operations. Its offset is relative to the data segment.
o Destination Index (DI): This is the destination index register. It is of
16 bits. It is used in the pointer addressing of data and as a
destination in some string-related operations. Its offset is relative to
the extra segment.

Flag register and its functions:


 A 16 bit flag register is used in 8086. It is divided into two parts.
o Condition code or status flags: The condition code flag register is
the lower byte of the 16-bit flag register. The condition code flag
register is identical to 8085 flag register, with an additional overflow
flag.
o Machine control flags: The control flag register is the higher byte of
the flag register. It contains three flags namely direction flag (D),
interrupt flag (I) and trap flag (T)

Flag register configuration


The description of each flag bit is as follows:

o SF- Sign Flag: This flag is set, when the result of any computation is
negative. For signed computations the sign flag equals the MSB of
the result.
o ZF- Zero Flag: This flag is set, if the result of the computation or
comparison performed by the previous instruction is zero.
o PF- Parity Flag: This flag is set to 1, if the lower byte of the result
contains even number of 1’s.
o CF- Carry Flag: This flag is set, when there is a carry out of MSB in
case of addition or a borrow in case of subtraction.
o AF-Auxilary Carry Flag: When an operation is performed at ALU, it
results in a carry/barrow from lower nibble (i.e. D0 – D3) to upper
nibble (i.e. D4 – D7), then this flag is set, i.e. carry given by D3 bit to
D4 is AF flag. The processor uses this flag to perform binary to BCD
conversion.
o OF- Over flow Flag: This flag is set, if an overflow occurs, i.e, if the
result of a signed operation is large enough to accommodate in a
destination register. The result is of more than 7-bits in size in case of
8-bit signed operation and more than 15-bits in size in case of 16-bit
sign operations, and then the overflow will be set.
o TF- Trap Flag: If this flag is set, the processor enters the single step
execution mode. The processor executes the current instruction and
the control is transferred to the Trap interrupt service routine.
o IF- Interrupt Flag: If this flag is set, the mask able interrupts are
recognized by the CPU, otherwise they are ignored.
o D- Direction Flag: This is used by string manipulation instructions. If
this flag bit is ‘0’, the string is processed beginning from the lowest
address to the highest address, i.e., auto incrementing mode.
Otherwise, the string is processed from the highest address towards
the lowest address, i.e., auto decrementing mode.

Addressing modes of 8086


The way for which an operand is specified for an instruction in the accumulator, in a
general purpose register or in memory location, is called addressing mode.

The 8086 microprocessors have 8 addressing modes. Two addressing modes have been
provided for instructions which operate on register or immediate data.

These two addressing modes are:

Register Addressing: In register addressing, the operand is placed in one of the 16-bit
or 8-bit general purpose registers. In this type of addressing mode both the operands are
registers.

Example

o MOV AX, CX
o ADD AL, BL
o ADD CX, DX

Immediate Addressing: In immediate addressing, the operand is specified in the


instruction itself.

Example

o MOV AL, 35H


o MOV BX, 0301H
o ADD AX, 4836H

The remaining 6 addressing modes specify the location of an operand which is placed in
a memory.

These 6 addressing modes are:

Direct Addressing: In direct addressing mode, the operand’s offset (effective address) is
directly given in the instruction as an 8-bit or 16-bit displacement element.

Example
o ADD AL, [0301]

The instruction adds the content of the offset address 0301 to AL. the operand is placed
at the given offset (0301) within the data segment DS.

Register Indirect Addressing: In this addressing mode the effective address is in SI, DI
or BX.

Example: Physical Address = Segment Address + Effective Address

Example

MOV AX, [BX]: It moves the contents of memory locations addressed by the register BX
to the register AX.

Other examples:

o MOV AX, [DI]


o ADD AL, [BX]
o MOV AX, [SI]

Based Addressing: In this the effective address is sum of base register and index
register. BX is used as base register for data segment, and the BP is used as a base
register for stack segment.

Base register: BX, BP


Index register: SI, DI

Effective address (Offset) = [BX + 8-bit or 16-bit displacement].

Example

o MOV AL, [BX+05]; an example of 8-bit displacement.


o MOV AL, [BX + 1346H]; example of 16-bit displacement.

Indexed Addressing: The offset of an operand is the sum of the content of an index
register SI or DI and an 8-bit or 16-bit displacement.

Offset (Effective Address) = [SI or DI + 8-bit or 16-bit displacement]

Example

o MOV AX, [SI + 05]; 8-bit displacement.


o MOV AX, [SI + 1528H]; 16-bit displacement.

Based Indexed Addressing: The offset of operand is the sum of the content of a base
register BX or BP and an index register SI or DI.

Effective Address (Offset) = [BX or BP] + [SI or DI]

Here, BX is used for a base register for data segment, and BP is used as a base register for
stack segment.

Example

o ADD AX, [BX + SI]


o MOV CX, [BX + SI]

Based Indexed with Displacement: In this mode of addressing, the operand's offset is
given by:

Effective Address (Offset) = [BX or BP] + [SI or DI] + 8-bit or 16-bit displacement

Example

o MOV AX, [BX + SI + 05]; 8-bit displacement


o MOV AX, [BX + SI + 1235H]; 16-bit displacement

Instruction Set of 8086


Instructions are classified on the basis of functions they perform. They are categorized
into the following main types:
Data Transfer instruction
This group includes the instructions used for moving the data from one place to another. In data
transfer group of instructions data or address can be transferred to either register, memory or I/O
ports. These instructions involve two operands i.e., the source and the destination. The source
holds either the immediate data, register or memory location. While the destination holds either
the address of any memory location or register. The following instructions come under this
category:

Instruction Description

MOV Moves data from register to register, register to memory, memory to register,
memory to accumulator, accumulator to memory, etc.

For ex:

a. MOV mem/r2, r1: The data present in register 1 is transferred to register


2 or memory location given in the operand.
b.MOV r2, mem : The data present in the memory is transferred to register
2.
c. MOV r/mem, data: The immediate data is present in the operand is
transferred to the memory location or the given register.

PUSH Pushes (sends, writes or moves) the content of a specified register or memory
location(s) onto the top of the stack.

POP Pops (reads) two bytes from the top of the stack and keeps them in a specified
register, or memory location(s).

IN Transfers data from a port to the accumulator or AX, DX or AL register.

OUT Transfers data from accumulator or AL or AX register to an I/O port identified


by the second byte of the instruction.

Arithmetic Instructions
Instructions of this group perform addition, subtraction, multiplication, division,
increment, decrement, comparison, ASCII and decimal adjustment etc.

The following instructions come under this category:

Instruction Description

ADD Adds data to the accumulator i.e. AL or AX register or memory locations.

a. ADD r2, r1: The data in the two registers are added and output is stored
in register 2.
b. ADD r, data: The immediate data in the operand is added with the data
present in the register and the result is stored in that particular register.

SUB Subtract immediate data from accumulator, memory or register.

a. SUB r2,r1 : The data of the register 1 is subtracted from register 2 and
the result is stored in register 2.
b. SUB mem, data: The immediate data in the operand is subtracted from
the data in the memory and memory stores the result of the operation.

MUL Unsigned 8-bit or 16-bit multiplication.


a. MUL r: The unsigned data in the register is multiplied with the unsigned
data in the accumulator and the AX register holds result in 8-bit
operation and AX and DX stores the result in 16-bit operation.

DIV Unsigned 8-bit or 16-bit division.

a. DIV r: The unsigned binary data in the accumulator is divided by the


unsigned binary data in the register.

INC Increment Register or memory by 1.

a. INC r/mem: The data of the register or memory specified in the operand
is incremented by 1.

DEC Decrement register or memory by 1.

a. DEC r/mem: he data in the specified register or memory location is


decremented by 1.

CMP Compare Immediate data, register or memory with accumulator, register or


memory location(s).

Logical Instructions
Instruction of this group perform logical AND, OR, XOR, NOT and TEST operations. The
following instructions come under this category:

Instruction Description

AND Performs bit by bit logical AND operation of two operands and places the result
in the specified destination.

a. AND r2,r1: AND operation over each bit of two registers is performed
and register 2 stores the result.

OR Performs bit by bit logical OR operation of two operands and places the result
in the specified destination.

a. OR mem, r1: The data in register 1 is logically ORed with the data in
memory and the result is stored in that memory location.
XOR Performs bit by bit logical XOR operation of two operands and places the result
in the specified destination.

a. XOR r2, r1: Exclusive OR operation is performed by this instruction on


the data present in register 1 and 2 and register 2 holds the result of
the operation.

NOT Takes one's complement of the content of a specified register or memory


location(s).

a. NOT r/mem: It generates a complement of data present in register or


memory.

Rotate Instructions
The following instructions come under this category:

Instruction Description

RCL Rotate all bits of the operand left by specified number of bits through carry
flag.

a. RCL r/mem: The data byte of register or memory is rotated left the LSB
is loaded with CF and CF is loaded with MSB.

RCR Rotate all bits of the operand right by specified number of bits through carry
flag.

a. RCR r/mem: The data byte in register or memory is rotated right, the CF
is transferred to MSB and LSB is transferred to CF.

Shift Instructions
The following instructions come under this category:

Instruction Description

SHL Shifts each bit of operand left by specified number of bits and put zero in LSB
position.
a. SHL r/mem: The data byte of register or memory given in the operand
is shifted to the left. The MSB of the data shifts to carry flag and LSB
becomes 0.

SHR Shift each bit of operand right by specified number of bits and put zero in MSB
position.

a. SHR r/mem: The data byte is shifted to the right. So, now LSB shifts to
carry flag and MSB becomes 0.

Control Transfer or Branch Instructions


It is also called program execution transfer instruction. Instructions of this group transfer
program execution from the normal sequence of instructions to the specified destination
or target. The following instructions come under this category:

Instruction Description

JMP Causes the program execution to jump unconditionally to the memory


address or label given in the instruction.

JMP r/mem

CALL This instruction transfers the control to the effective address within the
segment stored in the register or memory location specified in the
operand.

CALL r/mem

RET Returns program execution from a procedure (subroutine) to the next


instruction or main program.

RET

LOOP Jump to defined label until CX = 0.

Flag Manipulation and Processor Control Instructions


Instructions of this instruction set are related to flag manipulation and machine control.
The following instructions come under this category:
Instruction Description

CLC Clear Carry Flag: This instruction resets the carry flag CF to 0.

CLI Clear Interrupt Flag: This instruction resets the interrupt flag IF to 0.

CMC This instruction take complement of carry flag CF.

STC Set carry flag CF to 1.

HLT Halt processing. It stops program execution.

String Instructions
String is series of bytes or series of words stored in sequential memory locations. The
8086 provides some instructions which handle string operations such as string movement,
comparison, scan, load and store.

The following instructions come under this category:

Instruction Description

MOVS Moves 8-bit or 16-bit data from the memory location(s) addressed by
SI register to the memory location addressed by DI register.

CMPS Compares the content of memory location addressed by DI register


with the content of memory location addressed by SI register.

SCAS Compares the content of accumulator with the content of memory


location addressed by DI register in the extra segment ES.

You might also like