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Direct Memory Access (Dma)

Direct Memory Access (DMA) is a method used to transfer large blocks of data between memory and I/O devices without CPU intervention, utilizing a DMA controller. The CPU initiates the transfer by providing the starting address and word count, while the DMA controller manages the data transfer and signals completion via interrupts. Although DMA improves efficiency, it may not be used in all systems due to cost and performance considerations, especially in low-end computers where the CPU can handle tasks more quickly.

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Reema Joshi
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8 views

Direct Memory Access (Dma)

Direct Memory Access (DMA) is a method used to transfer large blocks of data between memory and I/O devices without CPU intervention, utilizing a DMA controller. The CPU initiates the transfer by providing the starting address and word count, while the DMA controller manages the data transfer and signals completion via interrupts. Although DMA improves efficiency, it may not be used in all systems due to cost and performance considerations, especially in low-end computers where the CPU can handle tasks more quickly.

Uploaded by

Reema Joshi
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as PDF, TXT or read online on Scribd
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DIRECT MEMORY ACCESS (DMA)

Problems With Direct Transfer Between The Processor And I/O


 No matter whether a CPU does or does not have memory-mapped I/O, it
needs to address the device controllers to exchange data with them.
 The CPU can request data from an I/O controller one byte at a time, but
doing so wastes the CPU’s time, so a different scheme, called DMA (Direct
Memory Access) is often used.
 Direct transfer between the processor and I/O devices happen using
instructions such as
Move DATAIN, R0
 An instruction to transfer data in and out happens only after the processor
determines that the device is ready.
 Poll a flag in the device interface (increment memory address, keep track of the
word count), or wait for an interrupt.
 Either way, an overhead is incurred.
DIRECT MEMORY ACCESS (DMA)

 To transfer large blocks of data, a special interface may be


provided for direct transfer between memory and the I/O devices.
 This interface is called DMA.
 DMA transfers are performed by a special circuit called the DMA
controller, that is a part of each device’s interface.
 For each word transferred, it provides the memory address and bus
signals that control data transfer. Memory address is incremented
for each transfer.
 The DMA controller must be under the control of a program
executed by the CPU, although it performs transfer without CPU
intervention.
DIRECT MEMORY ACCESS (DMA)

 The processor sends the starting address, the number of words in the
block and the direction of the transfer.
 The DMA controller then proceeds to perform the requested
operation.
 Upon completion of the transfer, the DMA controller raises an
interrupt signal to the CPU.
 The current program for which the DMA transfer is taking place is
suspended, and the processor is allotted another program to
execute. Post I/O transfer, the CPU returns to that program.
BLOCK DIAGRAM OF A DMA
TRANSFER
 Fig 1. DMA Controller in a Computer System.
Steps Involved in a DMA Transfer
1. A program writes the address and word count information into registers of the
corresponding channel of the DMA controller.
2. Provides disk controller with information to identify the data for future retrieval.
3. The DMA controller proceeds independently to perform the specified information.
4. When the transfer is completed, the status bits of the DMA are updated by setting the
done bit to 1.
5. If the IE bit is set, the controller sends an interrupt request to the processor and sets the IRQ
bit.
6. The status register can also be used to record other information, such as whether transfer
took place correctly or errors occurred.
Steps Involved in a DMA Transfer
 Requests by DMA devices for using the bus are always given higher priority than processor
requests.
 Among different DMA devices, top-priority is given to high-speed peripherals (disk, network
interfaces, graphics display).
 Since the processor originates most memory cycles, the DMA controller can be said to
“steal” memory cycles from the processor. This interweaving technique is called cycle
stealing.
 The DMA controller may be given access to transfer a block of data without interruption, in
burst mode.
 Most DMA controllers incorporate a data storage buffer, and the data transmitted over the
network.
 A conflict may arise if the processor and the DMA or two DMA controllers try to use the bus at
the same time.
 To resolve such conflicts, an arbitration procedure is used.
1. CYCLE STEALING.
2. FLY-BY MODE.
CONCLUSION

 Not all computers use DMA.


 Reason: The main CPU is often far faster than the DMA controller and can do the job much faster (when
the limiting factor is not the speed of the I/O device).
 If there is no other work for it to do, having the (fast) CPU wait for the (slow) DMA controller to finish is
pointless.
 Also, getting rid of the DMA controller and having the CPU do all the work in software saves money,
important on low-end (embedded) computers.

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