MEERUT INSTITUTE OF ENGINEERING & TECHNOLOGY

Microprocessor (BEE 602)

UNIT 1
Introduction to Microprocessor:
 “The microprocessor is a multipurpose, clock driven, register based, digital-integrated circuit which
accepts binary data as input, processes it according to instructions stored in its memory, and
provides results as outpMicroprocessor is a computer Central Processing Unit (CPU) on a single
chip that contains millions of transistors conneutcted by wires.”

Components of Microprocessor
 Microprocessor is capable of performing various computing functions and making decisions to
change the sequence of program execution.
 The microprocessor can be divided into three segments as shown in the figure, Arithmetic/logic
unit (ALU), register array, and control unit.
 These three segment is responsible for all processing done in a computer.

Arithmetic and logic unit (ALU)

 It is the unit of microprocessor where various computing functions are performed on the data.
 It performs arithmetic operations such as addition, subtraction, and logical operations such as OR,
AND, and Exclusive-OR.
 It is also known as the brain of the computer system.

Register array
 It is the part of the register in microprocessor which consists of various registers identified by
letters such as B, C, D, E, H, and L.
 Registers are the small additional memory location which are used to store and transfer data and
programs that are currently being executed.

Control unit
 The control unit provides the necessary timing and control signals to all the operations in the
microcomputer.
 It controls and executes the flow of data between the microprocessor, memory and peripherals.
 The control bus is bidirectional and assists the CPU in synchronizing control signals to internal
devices and external components.
 This signal permits the CPU to receive or transmit data from main memory.

System Bus (data, address and control bus)

 This network of wires or electronic pathways is called the 'Bus'.
 A system bus is a single computer bus that connects the major components of a computer system.
 It combines the functions of a data bus to carry information, an address bus to determine where it
should be sent, and a control bus to determine its operation.
 The technique was developed to reduce costs and improve modularity.

Address Bus
 It is a group of wires or lines that are used to transfer the addresses of Memory or I/O devices.
 It is unidirectional.
 The width of the address bus corresponds to the maximum addressing capacity of the bus, or the
largest address within memory that the bus can work with.
 The addresses are transferred in binary format, with each line of the address bus carrying a single
binary digit.
 Therefore the maximum address capacity is equal to two to the power of the number of lines present
(2^lines).

Data Bus
 It is used to transfer data within Microprocessor and Memory/Input or Output devices.
 It is bidirectional as Microprocessor requires to send or receive data.
 Each wire is used for the transfer of signals corresponding to a single bit of binary data.
 As such, a greater width allows greater amounts of data to be transferred at the same time.

Control Bus
 Microprocessor uses control bus to process data, i.e. what to do
with the selected memory location.
 Some control signals are Read, Write and Opcode fetch etc.
 Various operations are performed by microprocessor with the help of control bus.
 This is a dedicated bus, because all timing signals are generated according to control signal.

Classification of Memory
ROM (Read Only Memory):
The first classification of memory is ROM. The data in this memory can only be read, no writing is
allowed. It is used to store permanent programs. It is a non-volatile type of memory.
The classification of ROM memory is as follows:
1. Masked ROM: the program or data are permanently installed at the time of manufacturing as per
requirement. The data cannot be altered. The process of permanent recording is expensive but
economic for large quantities.

2. PROM (Programmable Read Only Memory): The basic function is same as that of masked
ROM. but in PROM, we have fuse links. Depending upon the bit pattern, the fuse can be burnt or
kept intact. This job is performed by PROM programmer.
To do this, it uses high current pulse between two lines. Because of high current, the fuse will get
burnt; effectively making two lines open. Once a PROM is programmed we cannot change
connections, only a facility provided over masked ROM is, the user can load his program in it. The
disadvantage is a chance of re-growing of the fuse and changes the programmed data because of
aging.
3. EPROM (Erasable Programmable Read Only Memory): the EPROM is programmable by the user. It uses
MOS circuitry to store data. They store 1’s and 0’s in form of charge. The information stored can be
erased by exposing the memory to ultraviolet light which erases the data stored in all memory
locations. For ultraviolet light, a quartz window is provided which is covered during normal
operation. Upon erasing it can be reprogrammed by using EPROM programmer. This type of
memory is used in a project developed and for experiment use. The advantage is it can be
programmed erased and reprogrammed. The disadvantage is all the data get erased even if you want
to change single data bit.

4. EEPROM: EEPROM stands for electrically erasable programmable read only memory. This is similar
to EPROM except that the erasing is done by electrical signals instead of ultraviolet light. The main
advantage is the memory location can be selectively erased and reprogrammed. But the
manufacturing process is complex and expensive so do not commonly used.

R/W Memory (Read/Write Memory):

The RAM is also called as read/write memory. The RAM is a volatile type of memory. It allows the
programmer to read or write data. If the user wants to check the execution of any program, user feeds
the program in RAM memory and executes it. The result of execution is then checked by either
reading memory location contents or by register contents.

Following is the classification of RAM memory.

It is available in two types:

1. SRAM (Static RAM): SRAM consists of the flip-flop; using either transistor or MOS. for each bit we
require one flip-flop. Bit status will remain as it is; unless and until you perform next write
operation or power supply is switched off.

Advantages of SRAM:
 Fast memory (less access time)
 Refreshing circuit is not required.
Disadvantages of SRAM:
 Low package density
 Costly

2. DRAM (Dynamic RAM): In this type of memory a data is stored in form of charge in capacitors.
When data is 1, the capacitor will be charged and if data is 0, the capacitor will not be charged.
Because of capacitor leakage currents, the data will not be held by these cells. So the DRAMs
require refreshing of memory cells. It is a process in which same data is read and written after a
fixed interval.
Advantages of DRAM:
 High package density
 Low cost
Disadvantages of DRAM:
 Required refreshing circuit to maintain or refresh charge on the capacitor, every after few
milliseconds.

Secondary Memory
 Magnetic Disk: The Magnetic Disk is Flat, circular platter with metallic coating that is rotated
beneath read/write heads. It is a Random access device; read/write head can be moved to any
location on the platter
 Floppy Disk: These are small removable disks that are plastic coated with magnetic recording
material. Floppy disks are typically 3.5″ in size (diameter) and can hold
1.44 MB of data. This portable storage device is a rewritable media and can be reused a number of
times. Floppy disks are commonly used to move files between different computers. The main
disadvantage of floppy disks is that they can be damaged easily and, therefore, are not very reliable.
The following figure shows an example of the floppy disk. Figure 3 shows a picture of the floppy
disk.

 Hard Disk: Another form of auxiliary storage is a hard disk. A hard disk consists of one or more
rigid metal plates coated with a metal oxide material that allows data to be magnetically recorded on
the surface of the platters. The hard disk platters spin at 5 a high rate of speed, typically 5400 to
7200 revolutions per minute (RPM).Storage capacities of hard disks for personal computers range
from 10 GB to 120 GB (one billion bytes are called a gigabyte).

 Optical Disks: Optical Mass Storage Devices Store bit values as variations in light reflection. They
have higher area density & longer data life than magnetic storage. They are also standardized and
relatively inexpensive. Their Uses: read-only storage with low performance requirements,
applications with high capacity requirements & where portability in a standardized format is
needed.
Types of Optical Disk
1. CD-ROM (read only)
2. CD-R: (record) to a CD
3. CD-RW: can write and erase CD to reuse it (re-writable)
4. DVD(Digital Video Disk)

I/O DEVICES AND THEIR INTERFACING

1. Input / Output (I/O)

MPU communicates with outside word through I/O device.

There are 2 different methods by which MPU identifies and communicates With I/O devices these
methods are:
 Direct I/O (Peripheral) 2- Memory-Mapped I/O
 The methods differ in terms of the
 No. of address lines used in identifying an I/O device.
 Type of control lines used to enable the device.
 Instructions used for data transfer.
2. Direct I/O (Peripheral):-
 This method uses two instructions (IN & OUT) for data transfer.
 MPU uses 8 address lines to send the address of I/O device (can identify 256 input devices & 256
output devices).
 The (I/P & O/P devices) can be differentiated by control signals I/O Read (IOR) and I/O Write
(IOW).
 The steps in communicating with an I/O device are similar to those in communicating with
memory and can be summarized as follows:
1- The MPU places an 8-bit device address on address bus then decoded.
2- The MPU sends a control signal (IOR or IOW) to enable the I/O device.
3- Data are placed on the data bus for transfer.
3. Memory-Mapped I/O:-
 The MPU uses 16 address lines to identify an I/O device.
 This is similar to communicating with a memory location.
 Use the same control signals (MEMR or MEMW) and instructions as those of memory.
 The MPU views these I/O devices as if they were memory locations.
 There are no special I/O instructions.
 It can identify 64k address shared between memory & I/O devices.

Embedded Systems - Architecture Types

The 8051 microcontrollers work with 8-bit data bus. So they can support external data memory up to
64K and external program memory of 64k at best. Collectively, 8051 microcontrollers can address
128k of external memory.
When data and code lie in different memory blocks, then the architecture is referred as Harvard
architecture. In case data and code lie in the same memory block, then the architecture is referred
as Von Neumann architecture.

Von Neumann Architecture

The Von Neumann architecture was first proposed by a computer scientist John von Neumann. In this
architecture, one data path or bus exists for both instruction and data. As a result, the CPU does one
operation at a time. It either fetches an instruction from memory, or performs read/write operation on
data. So an instruction fetch and a data operation cannot occur simultaneously, sharing a common bus.
Von-Neumann architecture supports simple hardware. It allows the use of a single, sequential memory.
Today's processing speeds vastly outpace memory access times, and we employ a very fast but small
amount of memory (cache) local to the processor.

Harvard Architecture
The Harvard architecture offers separate storage and signal buses for instructions and data. This
architecture has data storage entirely contained within the CPU, and there is no access to the
instruction storage as data. Computers have separate memory areas for program instructions and data
using internal data buses, allowing simultaneous access to both instructions and data.
Programs needed to be loaded by an operator; the processor could not boot itself. In a Harvard
architecture, there is no need to make the two memories share properties.

Von-Neumann Architecture vs Harvard Architecture

The following points distinguish the Von Neumann Architecture from the Harvard Architecture.

Von-Neumann Architecture Harvard Architecture

Single memory to be shared by both code and data. Separate memories for code and data.

Processor needs to fetch code in a separate clock cycle and Single clock cycle is sufficient, as separate
data in another clock cycle. So it requires two clock cycles. buses are used to access code and data.

Higher speed, thus less time consuming. Slower in speed, thus more time-consuming.

Simple in design. Complex in design.