Lecture Addressing Modes of Instruction
Lecture Addressing Modes of Instruction
Addressing Modes
Most of the instruction execution requires two operands, e.g., transfer of data between two
registers.
Whenever two operands are involved in an instruction, the first operand is assumed to be in
any register of the 𝜇𝑝 itself.
The second operand may be located in one of the following.
i. In any general purpose register of the microprocessor.
ii. In a particular external memory location.
iii. It can be immediately available in an instruction format.
iv. In an I/O device.
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Microprocessor: 8085A
Instruction Set
Addressing Modes
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Microprocessor: 8085A
Instruction Set
4
Microprocessor: 8085A
Instruction Set
MOV r1, r2: The opcode for the instruction is 01 DDD SSS.
The first two bits 01 specify the MOV operation e.g., MOV B, A
The opcode of the instruction is (01 000 111)2 = 47H
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Microprocessor: 8085A
Instruction Set
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Microprocessor: 8085A
Instruction Set
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Microprocessor: 8085A
Instruction Set
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Microprocessor: 8085A
Instruction Set
LDAX rp
This instruction load the accumulator with content available at memory location
pointed by internal register pair. Opcode
<B2>
Here, register pair are used as memory register pointer. <B3>
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Microprocessor: 8085A
Instruction Set
11
Thank You
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