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SAP1 Architecture and Early Computer Design

SAP1 architecture was an early microcomputer design that helped explain how microprocessors work. It had a simple 8-bit design with 16 bytes of memory, 4-bit opcodes and addresses. This allowed it to execute basic instructions like LDA, ADD, SUB, OUT, and HLT. The SAP1 could only store up to 16 instructions and perform addition and subtraction. It operated through two instruction cycles - fetch and execute. In fetch, the program counter sent memory addresses to fetch instructions and in execute, the instruction register split instructions to control execution. All timing and activities were controlled by the controller-sequencer through a 12-wire control bus.

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Tol Man Shrestha
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351 views3 pages

SAP1 Architecture and Early Computer Design

SAP1 architecture was an early microcomputer design that helped explain how microprocessors work. It had a simple 8-bit design with 16 bytes of memory, 4-bit opcodes and addresses. This allowed it to execute basic instructions like LDA, ADD, SUB, OUT, and HLT. The SAP1 could only store up to 16 instructions and perform addition and subtraction. It operated through two instruction cycles - fetch and execute. In fetch, the program counter sent memory addresses to fetch instructions and in execute, the instruction register split instructions to control execution. All timing and activities were controlled by the controller-sequencer through a 12-wire control bus.

Uploaded by

Tol Man Shrestha
Copyright
© Attribution Non-Commercial (BY-NC)
We take content rights seriously. If you suspect this is your content, claim it here.
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SAP1 architecture and Early computer design

Microprocessor is a digital electronic component with transistors on a single semiconductor integrated circuit, typically serve as a central processing unit (CPU) in a computer system that can fetch and execute instruction. Our instructor discussed on how computer works, how instruction and data are executed, and how these instruction are passed and processed from register to registers, register to memory and register back to the memory.

One example of early microcomputer design is Altair 8800 which is widely used recognized as the spark that led to the microcomputer evolution, and it plays an instrumental role in

sparking significant hobbyist interest. In Altair 8800 the input is the switches and the output is the led.It has no keyboard, no monitor - it's all those LEDs and toggle switches.The Altair, and early clones, were relatively difficult to use. The machines contained no operating system in ROM, so starting it up required a machine language program to be entered by hand via front-panel switches, one location at a time. The program was typically a small driver for an attached paper tape reader, which would then be used to read in another "real" program. Later systems added bootstrapping code to improve this process, and the machines became almost universally associated with the CP/M operating system, loaded from floppy disk.

Simple As Possible 1 architecture helps us to design a microcomputer. It also shows how a microprocessor works, interacts with the memory, register and other parts of the system. The purpose of SAP1 architecture is to develop on how instruction has been interpreted by the computer. The architecture is 8 bits and comprise of 16 X 8 memory, 4 bits for the opcode and 4 bits for the address. This opcode is machine instruction that composed and 1s os. Machine instruction are able to execute lda,add,sub,out and hlt instruction. In addition SAP1 cannot store program having more than 16 instructions, and it can only perform addition and subtraction. It has two instruction cycles, the fetch instruction and the other is execute instruction. In fetching an instruction, it needs to have a memory to set the instruction and place to hold this instruction which is the Instruction Register (IR). Program counter which is also a part of control unit which send addresses to the memory, the address of the next instruction to be fetched are executed. It has two control signal Cp, which is high if it has to be incremented and Ep instruction store in this memory. Memory address register include the address and switch register. The switch register which are part of the input unit register allow sending an address bits to the RAM. The PC asserts an addresses to the MAR then IR take hold of the instruction to the bus. Instruction register is a part of a control unit, the contents of the instruction register are split into two nibbles; upper nibbles which has two state output that goes directly to the controller, sequencer and lower nibble which has three state output that is directed onto WBUS. Almost all the instruction in fetch cycle are the same with lda,ad,sub,out ,hlt. When executing the lda instruction, a passageway from the IR to MAR is used to transfer the address from MAR. The instruction which is burdened from RAM and store intermediate result of computer operation which has two outputs, this two state output which goes directly to the adder/subtracter and the three state output which goes to the WBUS. In executing add instruction, the contented of the accumulator will be added to the content of the memory in the address placing the sum back to the accumulator. There is one common purpose register and register a buffer register used to hold one operand of the arithmetic operation while further is kept back by the accumulator register. It has control signal Lb to be able to load.

All timely moment of data or activities are performed by the controller-sequencer. Controller- sequencer controls the operation of the computer. Control Bus which has 12 wires carries the control word. In sub execution cycle, it has control signal Su which activates when we need to subtract. The outcome was placed back to the accumulator. In out execution, after the fetch cycle the contents of the RAM was loaded to accumulator. A control signal Lo is activated when it has to be display. In hlt execution it has no operation .At the end of computer run, the accumulator contains the result of operation and it store in Output Register.

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