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9A04306 Digital Logic Design3

This document provides instructions for a Digital Logic Design exam, including 8 questions on topics such as binary, octal, and hexadecimal conversion; Boolean algebra; logic gates; flip-flops; shift registers; and state reduction. Students are asked to answer any 5 of the 8 questions, which cover concepts like Demorgan's theorems, XOR gates, full adders, flip-flops, gray code converters, and state/flow table reduction.

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Mahaboob Subahan
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39 views

9A04306 Digital Logic Design3

This document provides instructions for a Digital Logic Design exam, including 8 questions on topics such as binary, octal, and hexadecimal conversion; Boolean algebra; logic gates; flip-flops; shift registers; and state reduction. Students are asked to answer any 5 of the 8 questions, which cover concepts like Demorgan's theorems, XOR gates, full adders, flip-flops, gray code converters, and state/flow table reduction.

Uploaded by

Mahaboob Subahan
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as PDF, TXT or read online on Scribd
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Code: 9A04306 R09

B.Tech II Year I Semester (R09) Supplementary Examinations, June/July 2014


DIGITAL LOGIC DESIGN
(Computer Science and Engineering)
Time: 3 hours Max. Marks: 70

Answer any FIVE questions


All questions carry equal marks
*****

1. (a) Convert the following decimal numbers in to binary, octal and hexadecimal.
(i) 76 (ii) 385 (iii) 4863 (iv) 32,767
(b) Convert the following gray code in to binary.
(i) 10110101 (ii) 11100011 (iii) 1100110011

2. (a) Prove using Demorgan’s theorems, the following expressions and


.
(b) Realize XOR gate using minimum number of NAND and NOR gates.

3. (a) Simplify the following Boolean function f (w, x, y, z) = M (4, 5, 6, 7, 8, 12). d (1, 2, 3, 9,
11, 14).
(b) Simplify the following Boolean function f(a, b, c, d) =

4. (a) Draw the circuit of a full-adder using two half adders and an OR gate. Also give the truth
table.
(b) Realize a full adder using NAND gates.

5. (a) Convert T-Flip Flop to (i) JK Flip-Flop (ii) SR Flip-Flop


(b) Draw master - slave JK Flip-Flop circuit and explain how it is used to avoid race around
problem.

6. (a) Design a serial input parallel output shift register.


(b) Design a 3-bit gray code converter.

7. (a) Design a BCD to gray code converter using a PLA. Give the PLA programming table.
(b) Design a circuit that finds the square of a 3-bit number using ROM.

8. Explain the following with examples:


(a) Reduction of state tables.
(b) Reduction of flow tables.

*****

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